Re: [PATCH v4 09/10] powerpc/watchpoint: Return available watchpoints dynamically

2020-07-20 Thread Jordan Niethe
On Tue, Jul 21, 2020 at 1:57 PM Ravi Bangoria wrote: > > > > On 7/20/20 9:12 AM, Jordan Niethe wrote: > > On Fri, Jul 17, 2020 at 2:11 PM Ravi Bangoria > > wrote: > >> > >> So far Book3S Powerpc supported only one watchpoint. Power10 is > >

Re: [PATCH v4 10/10] powerpc/watchpoint: Remove 512 byte boundary

2020-07-20 Thread Jordan Niethe
On Fri, Jul 17, 2020 at 2:11 PM Ravi Bangoria wrote: > > Power10 has removed 512 bytes boundary from match criteria. i.e. The watch > range can cross 512 bytes boundary. It looks like this change is not mentioned in ISA v3.1 Book III 9.4 Data Address Watchpoint. It could be useful to mention that

Re: [PATCH v4 09/10] powerpc/watchpoint: Return available watchpoints dynamically

2020-07-19 Thread Jordan Niethe
On Fri, Jul 17, 2020 at 2:11 PM Ravi Bangoria wrote: > > So far Book3S Powerpc supported only one watchpoint. Power10 is > introducing 2nd DAWR. Enable 2nd DAWR support for Power10. > Availability of 2nd DAWR will depend on CPU_FTR_DAWR1. > > Signed-off-by: Ravi Bangoria > --- >

Re: [PATCH v4 07/10] powerpc/watchpoint: Rename current H_SET_MODE DAWR macro

2020-07-19 Thread Jordan Niethe
On Fri, Jul 17, 2020 at 2:11 PM Ravi Bangoria wrote: > > Current H_SET_MODE hcall macro name for setting/resetting DAWR0 is > H_SET_MODE_RESOURCE_SET_DAWR. Add suffix 0 to macro name as well. > > Signed-off-by: Ravi Bangoria Reviewed-by: Jordan Niethe > --- > arch/powerpc

Re: [PATCH v4 06/10] powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit

2020-07-19 Thread Jordan Niethe
=off and it does set the CPU_FTR_DAWR1 bit. (using p10 skiboot). Tested-by: Jordan Niethe > --- > arch/powerpc/kernel/prom.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c > index 9cc49f265c86..c76c09b97bc8 1006

Re: [PATCH v4 05/10] powerpc/dt_cpu_ftrs: Add feature for 2nd DAWR

2020-07-16 Thread Jordan Niethe
On Fri, Jul 17, 2020 at 2:10 PM Ravi Bangoria wrote: > > Add new device-tree feature for 2nd DAWR. If this feature is present, > 2nd DAWR is supported, otherwise not. > > Signed-off-by: Ravi Bangoria > --- > arch/powerpc/include/asm/cputable.h | 7 +-- > arch/powerpc/kernel/dt_cpu_ftrs.c

Re: [PATCH v4 04/10] powerpc/watchpoint: Enable watchpoint functionality on power10 guest

2020-07-16 Thread Jordan Niethe
able watchpoint functionality on power10 guest (both kvm > and powervm) by adding CPU_FTR_DAWR to CPU_FTRS_POWER10. Note that > this change does not enable 2nd DAWR support. > > Signed-off-by: Ravi Bangoria I ran the ptrace-hwbreak selftest successfully within a power10 kvm gues

Re: [PATCH v3 2/9] powerpc/watchpoint: Fix DAWR exception constraint

2020-07-14 Thread Jordan Niethe
On Wed, Jul 8, 2020 at 2:52 PM Ravi Bangoria wrote: > > Pedro Miraglia Franco de Carvalho noticed that on p8, DAR value is > inconsistent with different type of load/store. Like for byte,word > etc. load/stores, DAR is set to the address of the first byte of > overlap between watch range and real

Re: [PATCH v3 1/9] powerpc/watchpoint: Fix 512 byte boundary limit

2020-07-14 Thread Jordan Niethe
ging to ALIGN_DOWN() then these tests will fail. Tested-by: Jordan Niethe > --- > arch/powerpc/kernel/hw_breakpoint.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/powerpc/kernel/hw_breakpoint.c > b/arch/powerpc/kernel/hw_breakpoint.c > index 0

Re: [PATCH v3 1/9] powerpc/watchpoint: Fix 512 byte boundary limit

2020-07-08 Thread Jordan Niethe
On Wed, Jul 8, 2020 at 2:53 PM Ravi Bangoria wrote: > > Milton Miller reported that we are aligning start and end address to > wrong size SZ_512M. It should be SZ_512. Fix that. > > While doing this change I also found a case where ALIGN() comparison > fails. Within a given aligned range, ALIGN()