Hi Ahmad,
These IPs could be enabled in the secure side. To avoid any concurrency
access, I prefer to keep all that crypto IPs status disable.
For examples, RNG can be managed in OP-TEE, so it will remain disable in
Linux.
BR,
Lionel
On 1/19/21 10:52 AM, Ahmad Fatoum wrote:
There is no
Enable CRYP1 device for cryp accelerated support on
stm32mp157C-EV1/DK2 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-dk2.dts | 4
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
2 files changed, 8
From: Nicolas Toromanoff
Enable CRC1 device for CRC-32 accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 4
2 files
Enable the crypto controllers in the STM32MP157C-EV1 and STM32MP157A-DK1
STM32MP157C-DK2 boards.
Lionel Debieve (2):
ARM: dts: stm32: enable HASH by default on stm32mp15
ARM: dts: stm32: enable CRYP by default on stm32mp15
Nicolas Toromanoff (1):
ARM: dts: stm32: enable CRC1 by default
Enable HASH1 device for HASH accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 4
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts
Enable crypto controllers enabling following flags as module:
CONFIG_CRYPTO_DEV_STM32_CRC
CONFIG_CRYPTO_DEV_STM32_HASH
CONFIG_CRYPTO_DEV_STM32_CRYP
Signed-off-by: Lionel Debieve
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs
This patch add HASH instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
This patch add HASH instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index b66f673b5038..cb39fb6d9960
Patches serie add support or RNG, CRYP and CRC IPs for stm32mp157c SoC
and add RNG default support for ev1 board.
Lionel Debieve (4):
ARM: dts: stm32: Add RNG support on stm32mp157c
ARM: dts: stm32: Enable RNG for stm32mp157c-ed1
ARM: dts: stm32: Add CRYP support on stm32mp157c
ARM: dts
Patches serie add support or RNG, CRYP and CRC IPs for stm32mp157c SoC
and add RNG default support for ev1 board.
Lionel Debieve (4):
ARM: dts: stm32: Add RNG support on stm32mp157c
ARM: dts: stm32: Enable RNG for stm32mp157c-ed1
ARM: dts: stm32: Add CRYP support on stm32mp157c
ARM: dts
This patch add CRC instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 5ce7d2
This patch add CRC instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 5ce7d28f8a1f..2962decacd87 100644
This patch add RNG instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3edd
This patch add CRYP instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
This patch add RNG instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc3eda6..bf00885971b3 100644
This patch add CRYP instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index bf00885971b3..5ce7d28f8a1f 100644
Enable stm32-hwrng for ed1 and ev1 boards
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 9f9033
Enable stm32-hwrng for ed1 and ev1 boards
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 9f90337a22e3..2a992525919c 100644
This series are fixing the default build state for stm32-rng that
activate the driver with arm multi_v7_defconfig.
Second patch is fixing the power suspend/resume behavior which was
not working.
Lionel Debieve (2):
hwrng: stm32 - define default state for rng driver
hwrng: stm32-rng: Fix
This series are fixing the default build state for stm32-rng that
activate the driver with arm multi_v7_defconfig.
Second patch is fixing the power suspend/resume behavior which was
not working.
Lionel Debieve (2):
hwrng: stm32 - define default state for rng driver
hwrng: stm32-rng: Fix
Define default state for stm32_rng driver. It will
be default selected with multi_v7_defconfig
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_
Define default state for stm32_rng driver. It will
be default selected with multi_v7_defconfig
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index d53541e96bee
When suspend is called after pm_runtime_suspend,
same callback is used and access to rng register is
freezing system. By calling the pm_runtime_force_suspend,
it first checks that runtime has been already done.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_
When suspend is called after pm_runtime_suspend,
same callback is used and access to rng register is
freezing system. By calling the pm_runtime_force_suspend,
it first checks that runtime has been already done.
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 9
Increase timeout delay to support longer timing linked
to rng initialization. Measurement is based on timer instead
of instructions per iteration which is not powerful on all
targets.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/stm32-rng.
Increase timeout delay to support longer timing linked
to rng initialization. Measurement is based on timer instead
of instructions per iteration which is not powerful on all
targets.
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 25 ++---
1 file
on specific target.
Patch #5 rework the timeout calculation for read value that was
previously defined based on loop operation and is now based on
timer.
Lionel Debieve (5):
hwrng: stm32 - add reset during probe
dt-bindings: rng: add reset node for stm32
hwrng: stm32 - allow disable clock
on specific target.
Patch #5 rework the timeout calculation for read value that was
previously defined based on loop operation and is now based on
timer.
Lionel Debieve (5):
hwrng: stm32 - add reset during probe
dt-bindings: rng: add reset node for stm32
hwrng: stm32 - allow disable clock
Add a new property that allow to disable the clock error
detection which is required when the clock source selected
is out of specification (which is not mandatory).
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/stm32-rng.c | 10 +-
1 file chan
Add a new property that allow to disable the clock error
detection which is required when the clock source selected
is out of specification (which is not mandatory).
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion
Adding optional resets property for rng.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt
b/Documentation/devi
Adding optional resets property for rng.
Signed-off-by: Lionel Debieve
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt
b/Documentation/devicetree/bindings/rng/st,stm32
Add optional property to enable the clock detection error
on rng block. It is used to allow slow clock source which
give correct entropy for rng.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 +
1 file changed, 1 ins
Add optional property to enable the clock detection error
on rng block. It is used to allow slow clock source which
give correct entropy for rng.
Signed-off-by: Lionel Debieve
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Avoid issue when probing the RNG without
reset if bad status has been detected previously
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/stm32-rng.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/char/hw_random/stm32-rng.c
b/driver
Avoid issue when probing the RNG without
reset if bad status has been detected previously
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/char/hw_random/stm32-rng.c
b/drivers/char/hw_random/stm32-rng.c
Add a new property that allow to disable the clock error
detection which is required when the clock source selected
is out of specification (which is not mandatory).
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/stm32-rng.c | 10 +-
1 file chan
Add a new property that allow to disable the clock error
detection which is required when the clock source selected
is out of specification (which is not mandatory).
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion
Add optional property to enable the clock detection error
on rng block. It is used to allow slow clock source which
give correct entropy for rng.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 +
1 file changed, 1 ins
Add optional property to enable the clock detection error
on rng block. It is used to allow slow clock source which
give correct entropy for rng.
Signed-off-by: Lionel Debieve
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Avoid issue when probing the RNG without
reset if bad status has been detected previously
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/char/hw_random/stm32-rng.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/char/hw_random/stm32-rng.c
b/driver
Avoid issue when probing the RNG without
reset if bad status has been detected previously
Signed-off-by: Lionel Debieve
---
drivers/char/hw_random/stm32-rng.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/char/hw_random/stm32-rng.c
b/drivers/char/hw_random/stm32-rng.c
on specific target.
Patch #5 rework the timeout calculation for read value that was
previously defined based on loop operation and is now based on
timer.
Lionel Debieve (5):
hwrng: stm32 - add reset during probe
dt-bindings: rng: add reset node for stm32
hwrng: stm32 - allow disable clock
on specific target.
Patch #5 rework the timeout calculation for read value that was
previously defined based on loop operation and is now based on
timer.
Lionel Debieve (5):
hwrng: stm32 - add reset during probe
dt-bindings: rng: add reset node for stm32
hwrng: stm32 - allow disable clock
Adding optional resets property for rng.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt
b/Documentation/devi
Adding optional resets property for rng.
Signed-off-by: Lionel Debieve
---
Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt
b/Documentation/devicetree/bindings/rng/st,stm32
From: Lionel Debieve <lionel.debi...@st.com>
Fixing bugs link to stress tests. Bad results are
detected during testmgr selftests executing in a
faster environment. bufcnt value may be resetted and
false IT are sometimes detected.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
From: Lionel Debieve
Fixing bugs link to stress tests. Bad results are
detected during testmgr selftests executing in a
faster environment. bufcnt value may be resetted and
false IT are sometimes detected.
Signed-off-by: Lionel Debieve
---
drivers/crypto/stm32/stm32-hash.c | 8 ++--
1
From: Lionel Debieve <lionel.debi...@st.com>
dma-maxburst is an optional value and must not return
error in case of dma not used (or max-burst not defined).
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/crypto/stm32/stm32-hash.c | 11 ++-
1 file changed,
From: Lionel Debieve
dma-maxburst is an optional value and must not return
error in case of dma not used (or max-burst not defined).
Signed-off-by: Lionel Debieve
---
drivers/crypto/stm32/stm32-hash.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers
From: Lionel Debieve <lionel.debi...@st.com>
Due to another patch, the dma fails when padding is
needed as the given length is not correct.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/crypto/stm32/stm32-hash.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
From: Lionel Debieve
Due to another patch, the dma fails when padding is
needed as the given length is not correct.
Signed-off-by: Lionel Debieve
---
drivers/crypto/stm32/stm32-hash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c
b
From: Lionel Debieve <lionel.debi...@st.com>
Hi,
This patch serie will improve global robustness for stm32-hash driver.
Patch #1 is fixing dma-burst issue when configuration is not set.
Patch #2 solves issue that occurs when irq append during final req processing.
Patch #3 is fixing an
From: Lionel Debieve
Hi,
This patch serie will improve global robustness for stm32-hash driver.
Patch #1 is fixing dma-burst issue when configuration is not set.
Patch #2 solves issue that occurs when irq append during final req processing.
Patch #3 is fixing an issue that have been
When update data reached the threshold for data processing,
we must inform that processing is on going.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/crypto/stm32/stm32-hash.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/crypto
When update data reached the threshold for data processing,
we must inform that processing is on going.
Signed-off-by: Lionel Debieve
---
drivers/crypto/stm32/stm32-hash.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c
b/drivers
Hi Arnd,
I've already push this fix for review last month, waiting the ack.
"
From: Lionel Debieve <lionel.debi...@st.com>
To: Herbert Xu <herb...@gondor.apana.org.au>, "David S . Miller"
<da...@davemloft.net>, Maxime Coquelin <mcoquelin.s
Hi Arnd,
I've already push this fix for review last month, waiting the ack.
"
From: Lionel Debieve
To: Herbert Xu , "David S . Miller"
, Maxime Coquelin ,
Alexandre
Torgue , ,
,
CC: Benjamin Gaignard , Fabien Dessenne
, Ludovic Barre
Subject: [PA
Remove err symbol as this is not used in the thread context
and the variable is not initialized.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/crypto/stm32/stm32-hash.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-
Remove err symbol as this is not used in the thread context
and the variable is not initialized.
Signed-off-by: Lionel Debieve
---
drivers/crypto/stm32/stm32-hash.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c
b/drivers/crypto/stm32
Hi Cosar,
Sorry for the delay to feedback.
This implementation is in the good way. But it should be better to use
platform data and use array with type of algs instead of
duplicating the algo description for each platform. If we add a new
platform, with another type of crc, we will again
Hi Cosar,
Sorry for the delay to feedback.
This implementation is in the good way. But it should be better to use
platform data and use array with type of algs instead of
duplicating the algo description for each platform. If we add a new
platform, with another type of crc, we will again
Hi Cosar,
- ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));
+ /* For F4 series only CRC32 algorithm will be used */
+ if (of_device_is_compatible(crc->dev->of_node, "st,stm32f4-crc"))
+ algs_size = 1;
+ else
+ algs_size =
Hi Cosar,
- ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));
+ /* For F4 series only CRC32 algorithm will be used */
+ if (of_device_is_compatible(crc->dev->of_node, "st,stm32f4-crc"))
+ algs_size = 1;
+ else
+ algs_size =
This module register a HASH module that support multiples
algorithms: MD5, SHA1, SHA224, SHA256.
It includes the support of HMAC hardware processing corresponding
to the supported algorithms. DMA or IRQ mode are used depending
on data length.
Signed-off-by: Lionel Debieve <lionel.debi...@st.
This module register a HASH module that support multiples
algorithms: MD5, SHA1, SHA224, SHA256.
It includes the support of HMAC hardware processing corresponding
to the supported algorithms. DMA or IRQ mode are used depending
on data length.
Signed-off-by: Lionel Debieve
---
drivers/crypto
/ testmgr.
Note:
Since two other set of patches (update of STM32 CRC32 and addition of STM32
CRYP) are being proposed, it may happen that there are some minor conflicts in
'Kconfig' and 'Makefile'. In that case, I will fix the issue in due course.
Lionel Debieve (2):
dt-bindings: Document STM32
/ testmgr.
Note:
Since two other set of patches (update of STM32 CRC32 and addition of STM32
CRYP) are being proposed, it may happen that there are some minor conflicts in
'Kconfig' and 'Makefile'. In that case, I will fix the issue in due course.
Lionel Debieve (2):
dt-bindings: Document STM32
This adds documentation of device tree bindings for the STM32
HASH controller.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
.../devicetree/bindings/crypto/st,stm32-hash.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devi
This adds documentation of device tree bindings for the STM32
HASH controller.
Signed-off-by: Lionel Debieve
---
.../devicetree/bindings/crypto/st,stm32-hash.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32
The complete stm32 module is rename as crypto
in order to use generic naming
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
Reviewed-by: Fabien Dessenne <fabien.desse...@st.com>
---
drivers/crypto/Makefile | 2 +-
drivers/crypto/stm32/Kconfig | 6 +++---
drivers/
The complete stm32 module is rename as crypto
in order to use generic naming
Signed-off-by: Lionel Debieve
Reviewed-by: Fabien Dessenne
---
drivers/crypto/Makefile | 2 +-
drivers/crypto/stm32/Kconfig | 6 +++---
drivers/crypto/stm32/Makefile | 3 +--
3 files changed, 5 insertions(+), 6
In case of arm soc support, readl and writel will
be optimized using relaxed functions
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
Reviewed-by: Fabien Dessenne <fabien.desse...@st.com>
---
drivers/crypto/stm32/stm32_crc32.c | 15 ---
1 file changed, 8 inse
In case of arm soc support, readl and writel will
be optimized using relaxed functions
Signed-off-by: Lionel Debieve
Reviewed-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32_crc32.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/stm32
crypto algos, HASH and CRYP are pushed
accordingly.
Lionel Debieve (3):
crypto: stm32 - CRC use relaxed function
crypto: stm32 - solve crc issue during unbind
crypto: stm32 - Rename module to use generic crypto
drivers/crypto/Makefile| 2 +-
drivers/crypto/stm32/Kconfig
Use the correct unregister_shashes function to
to remove the registered algo
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
Reviewed-by: Fabien Dessenne <fabien.desse...@st.com>
---
drivers/crypto/stm32/stm32_crc32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
crypto algos, HASH and CRYP are pushed
accordingly.
Lionel Debieve (3):
crypto: stm32 - CRC use relaxed function
crypto: stm32 - solve crc issue during unbind
crypto: stm32 - Rename module to use generic crypto
drivers/crypto/Makefile| 2 +-
drivers/crypto/stm32/Kconfig
Use the correct unregister_shashes function to
to remove the registered algo
Signed-off-by: Lionel Debieve
Reviewed-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32_crc32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/stm32/stm32_crc32.c
b/drivers
ior wrote:
>
>> On 2017-03-22 09:05:58 [-0700], Steven Rostedt wrote:
>>> On Wed, 22 Mar 2017 16:18:43 +0100
>>> Lionel Debieve <lionel.debi...@st.com> wrote:
>>>
>>>> Use raw_spin_lock in enable/disable channel as it comes from
>>>> in
ior wrote:
>
>> On 2017-03-22 09:05:58 [-0700], Steven Rostedt wrote:
>>> On Wed, 22 Mar 2017 16:18:43 +0100
>>> Lionel Debieve wrote:
>>>
>>>> Use raw_spin_lock in enable/disable channel as it comes from
>>>> interrupt context.
>>>
On 03/22/2017 07:47 PM, Julia Cartwright wrote:
> On Wed, Mar 22, 2017 at 01:30:12PM -0500, Grygorii Strashko wrote:
>> On 03/22/2017 01:01 PM, Steven Rostedt wrote:
>>> On Wed, 22 Mar 2017 12:37:59 -0500
>>> Julia Cartwright wrote:
>>>
Which kernel were you testing on, here?
On 03/22/2017 07:47 PM, Julia Cartwright wrote:
> On Wed, Mar 22, 2017 at 01:30:12PM -0500, Grygorii Strashko wrote:
>> On 03/22/2017 01:01 PM, Steven Rostedt wrote:
>>> On Wed, 22 Mar 2017 12:37:59 -0500
>>> Julia Cartwright wrote:
>>>
Which kernel were you testing on, here? From what I
On 03/22/2017 05:05 PM, Steven Rostedt wrote:
> On Wed, 22 Mar 2017 16:18:43 +0100
> Lionel Debieve <lionel.debi...@st.com> wrote:
>
>> Use raw_spin_lock in enable/disable channel as it comes from
>> interrupt context.
>>
>> BUG: sleeping function called fr
On 03/22/2017 05:05 PM, Steven Rostedt wrote:
> On Wed, 22 Mar 2017 16:18:43 +0100
> Lionel Debieve wrote:
>
>> Use raw_spin_lock in enable/disable channel as it comes from
>> interrupt context.
>>
>> BUG: sleeping function called from invalid context a
The lock is a sleeping lock and local_irq_save() is not the
standard implementation now. Working for both -RT and non
RT.
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/tty/serial/st-asc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drive
The lock is a sleeping lock and local_irq_save() is not the
standard implementation now. Working for both -RT and non
RT.
Signed-off-by: Lionel Debieve
---
drivers/tty/serial/st-asc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/st-asc.c b
OK, resend without.
BR
Lionel
-Original Message-
From: Steven Rostedt [mailto:rost...@goodmis.org]
Sent: mercredi 22 mars 2017 17:11
To: Lionel DEBIEVE <lionel.debi...@st.com>
Cc: Thomas Gleixner <t...@linutronix.de>; linux-rt-us...@vger.kernel.org;
linux-kernel@vger.kern
OK, resend without.
BR
Lionel
-Original Message-
From: Steven Rostedt [mailto:rost...@goodmis.org]
Sent: mercredi 22 mars 2017 17:11
To: Lionel DEBIEVE
Cc: Thomas Gleixner ; linux-rt-us...@vger.kernel.org;
linux-kernel@vger.kernel.org; bige...@linutronix.de; Patrice CHOTARD
; Greg
)
[] (handle_fasteoi_irq)
[] (generic_handle_irq)
[] (__handle_domain_irq)
[] (gic_handle_irq)
Signed-off-by: Lionel Debieve <lionel.debi...@st.com>
---
drivers/mailbox/mailbox-sti.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/mailbox-s
)
[] (handle_fasteoi_irq)
[] (generic_handle_irq)
[] (__handle_domain_irq)
[] (gic_handle_irq)
Signed-off-by: Lionel Debieve
---
drivers/mailbox/mailbox-sti.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/mailbox-sti.c b/drivers/mailbox/mailbox
Just to agree with Thomas.
Do you want me to resend the patch without RT tag?
BR,
Lionel
On 03/21/2017 09:15 PM, Steven Rostedt wrote:
> On Tue, 21 Mar 2017 19:51:47 +0100 (CET)
> Thomas Gleixner wrote:
>
>> On Tue, 21 Mar 2017, Steven Rostedt wrote:
/*
*
Just to agree with Thomas.
Do you want me to resend the patch without RT tag?
BR,
Lionel
On 03/21/2017 09:15 PM, Steven Rostedt wrote:
> On Tue, 21 Mar 2017 19:51:47 +0100 (CET)
> Thomas Gleixner wrote:
>
>> On Tue, 21 Mar 2017, Steven Rostedt wrote:
/*
* Disable interrupts
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