On Tuesday 26 February 2008 12:59:04 am you wrote:
> Divy Le Ray wrote:
> >> From: "Divy Le Ray" <[EMAIL PROTECTED]>
> >> Date: Wed, 20 Feb 2008 21:57:08 -0800
> >>
> >>> The driver is cxgb3 here, it uses LLTX.
> >>
> >> That's extremely unfortunate, hopefully you can update it to
> >> use a model
CPU0 CPU1
21: 11691000 11933174 IO-APIC-fasteoi eth0
It is neither IO-APIC-edge, nor IO-APIC-level.
Could it be the problem?
Marin Mitov
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On Monday 25 February 2008 10:53:01 pm you wrote:
> Marin Mitov wrote:
> > Hi all,
> >
> > I experience very rare freezes at heavy outbound traffic
> > (sending ~4GB DVD image to another host(s) on the same LAN)
> > using skge driver (NIC on the mobo) as well as (r
nk you in advance for your suggestions, help (and patches).
Regards.
Marin Mitov
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(and patches).
Regards.
Marin Mitov
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On Monday 25 February 2008 10:53:01 pm you wrote:
Marin Mitov wrote:
Hi all,
I experience very rare freezes at heavy outbound traffic
(sending ~4GB DVD image to another host(s) on the same LAN)
using skge driver (NIC on the mobo) as well as (recently tested)
using rtl8139 or dmfe NICs
CPU1
21: 11691000 11933174 IO-APIC-fasteoi eth0
It is neither IO-APIC-edge, nor IO-APIC-level.
Could it be the problem?
Marin Mitov
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On Tuesday 26 February 2008 12:59:04 am you wrote:
Divy Le Ray wrote:
From: Divy Le Ray [EMAIL PROTECTED]
Date: Wed, 20 Feb 2008 21:57:08 -0800
The driver is cxgb3 here, it uses LLTX.
That's extremely unfortunate, hopefully you can update it to
use a model like tg3 and others use.
s correct?
Thanks in advance for your answer.
Regards
Marin Mitov
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= smp_processor_id();
which is correct?
Thanks in advance for your answer.
Regards
Marin Mitov
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shared.
No, as I already explained.
The only problem :-) in my explanation is:
request_irq returns EBUSY (not -EBUSY as should be)
Marin Mitov
> When
> I have more time, I will changed the code to be a shared IRQ and try
> the noapic again.
>
> However, without the noapic /proc/interru
w message since 2.6.24-rc3. I have never try -mm tree before.
>
> These messages could indicate a timing problem. You can see the code
> that writes the messages near the end of wakeup_rh() in
> drivers/usb/host/uhci-hcd.c.
>
> The message gets written if the controller hardware hasn't turned off
() function wasn't
working right, it could cause this problem.
udelay() _is_ OK for 2.6.24-rc3, so it is not the cause of the problem
Marin Mitov
Alan Stern
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be)
Marin Mitov
When
I have more time, I will changed the code to be a shared IRQ and try
the noapic again.
However, without the noapic /proc/interrupts looks like:
[EMAIL PROTECTED]:~$ cat /proc/interrupts
CPU0
0:154 IO-APIC-edge timer
1: 10 IO-APIC
On Wednesday 21 November 2007 09:27:54 pm you wrote:
> * Marin Mitov <[EMAIL PROTECTED]> wrote:
> > Hi Ingo,
> >
> > The patch is quite good ;-) but we forget when it is needed :-( In
> > fact we need it only for PREEMPT SMP kernels - it could hurt PREEMPT
>
On Wednesday 21 November 2007 09:27:54 pm you wrote:
* Marin Mitov [EMAIL PROTECTED] wrote:
Hi Ingo,
The patch is quite good ;-) but we forget when it is needed :-( In
fact we need it only for PREEMPT SMP kernels - it could hurt PREEMPT
UP kernels (no migration possible), so no need
, to account for
possible under/overflow of left/TSC
Tested on both: 32/64 bit SMP PREEMPT kernel-2.6.24-rc3
Comments, please.
Signed-off-by: Marin Mitov <[EMAIL PROTECTED]>
=
--- a/arch/x86/lib/delay_32.c 2007-11-18 08:14:05.0 +0200
+++ b/ar
, to account for
possible under/overflow of left/TSC
Tested on both: 32/64 bit SMP PREEMPT kernel-2.6.24-rc3
Comments, please.
Signed-off-by: Marin Mitov [EMAIL PROTECTED]
=
--- a/arch/x86/lib/delay_32.c 2007-11-18 08:14:05.0 +0200
+++ b/arch/x86
sections
(more room for preemption)
3. some statements have been rearranged, to account for
possible under/overflow of left/TSC
Tested on both: 32/64 bit SMP PREEMPT kernel-2.6.24-rc3
Hope it is correct. Comments, please.
Signed-off-by: Marin Mitov <[EMAIL PROTEC
sections
(more room for preemption)
3. some statements have been rearranged, to account for
possible under/overflow of left/TSC
Tested on both: 32/64 bit SMP PREEMPT kernel-2.6.24-rc3
Hope it is correct. Comments, please.
Signed-off-by: Marin Mitov [EMAIL PROTECTED
ut all other arches?
Thanks.
Marin Mitov
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it:
/*
* Generic udelay assumes that if preemption is allowed and the thread
* migrates to another CPU, that the ITC values are synchronized across
* all CPUs.
*/
Are they really synchronized or similar patch: preempt_disable/enable()
should be applied?
What about all other arches?
Thanks.
Marin
the problem is coming from.
Best regards.
Marin Mitov
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the problem is coming from.
Best regards.
Marin Mitov
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