Add device node for SoC sleep stats driver which provides various
low power mode stats.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64
Add device node for SoC sleep stats driver which provides various
low power mode stats.
Also update the reg size of aoss_qmp device to 0x400.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 ++-
1 file
Enable SoC sleep stats driver. The driver gives statistics for
various low power modes on Qualcomm Technologies, Inc. (QTI) SoCs.
Signed-off-by: Maulik Shah
Reviewed-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs
, exit, and accumulated sleep duration in seconds.
This series adds a driver to read the stats and export to debugfs.
[1] https://lore.kernel.org/patchwork/patch/1149381/
Mahesh Sivasubramanian (2):
dt-bindings: Introduce SoC sleep stats bindings
soc: qcom: Add SoC sleep stats driver
Maulik Shah (3):
rnel/debug/qcom_sleep_stats/ddr
count = 0
Last Entered At = 0
Last Exited At = 0
Accumulated Duration = 0
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
[mkshah: add subsystem sleep stats, create one file for each stat]
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/Kconfig | 10 +
Sivasubramanian
Signed-off-by: Lina Iyer
Signed-off-by: Maulik Shah
Reviewed-by: Rob Herring
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
---
.../bindings/soc/qcom/soc-sleep-stats.yaml | 48 ++
1 file changed, 48 insertions(+)
create mode 100644
Hi,
On 2/9/2021 6:12 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2021-02-04 06:21:46)
From: Mahesh Sivasubramanian
Let's add a driver to read the stats from remote processor and
export to debugfs.
The driver creates "qcom_sleep_stats" directory in debugfs and
adds files for v
Hi,
On 3/12/2021 10:45 PM, Bjorn Andersson wrote:
On Thu 04 Feb 08:21 CST 2021, Maulik Shah wrote:
From: Mahesh Sivasubramanian
Add device binding documentation for Qualcomm Technologies, Inc. (QTI)
SoC sleep stats driver. The driver is used for displaying SoC sleep
statistic maintained
This change converts PDC interrupt controller bindings to yaml.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
---
This change depends on [1] which adds sc7280 compatible for PDC
Changes in v2:
- Document optional PDC's GIC interface reg
- Update example to mention optional reg.
[1
Hi,
On 3/17/2021 11:38 PM, Bjorn Andersson wrote:
On Wed 17 Mar 09:02 CDT 2021, Marc Zyngier wrote:
On Wed, 17 Mar 2021 09:48:09 +,
Maulik Shah wrote:
Hi Marc,
On 3/17/2021 2:47 PM, Marc Zyngier wrote:
On Wed, 17 Mar 2021 05:29:54 +,
Maulik Shah wrote:
PDC interrupt controller
Hi Marc,
On 3/17/2021 2:47 PM, Marc Zyngier wrote:
On Wed, 17 Mar 2021 05:29:54 +,
Maulik Shah wrote:
PDC interrupt controller driver do not use second reg. Remove it.
This is a DT file, not a driver. What the driver does is irrelevant.
The real question is: what does this range do
This change converts PDC interrupt controller bindings to yaml.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
---
This change depends on [1] which adds sc7280 compatible for PDC
[1] https://patchwork.kernel.org/project/linux-arm-msm/list/?series=440315
---
.../bindings/interrupt
PDC interrupt controller driver do not use second reg. Remove it.
This is in preparation to convert PDC bindings to yaml where
dtbs_check reports it as additional reg.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1
PDC interrupt controller driver do not use second reg. Remove it.
This is in preparation to convert PDC bindings to yaml where
dtbs_check reports it as additional reg.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
1 file changed, 1
Hi,
On 3/5/2021 11:12 AM, Rajendra Nayak wrote:
On 3/4/2021 5:34 AM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2021-03-03 04:17:49)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 4a56d9c..21c2399 100644
---
Hi Stephen,
On 2/23/2021 1:19 PM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2021-02-11 23:28:50)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8f2002b..3b86052 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++
rnel/debug/qcom_sleep_stats/ddr
count = 0
Last Entered At = 0
Last Exited At = 0
Accumulated Duration = 0
Signed-off-by: Mahesh Sivasubramanian
Signed-off-by: Lina Iyer
[mkshah: add subsystem sleep stats, create one file for each stat]
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/Kconfig | 10 +
Add device node for SoC sleep stats driver which provides various
low power mode stats.
Also update the reg size of aoss_qmp device to 0x400.
Cc: devicet...@vger.kernel.org
Signed-off-by: Maulik Shah
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 ++-
1 file
Maulik Shah (2):
arm64: dts: qcom: sc7180: Enable SoC sleep stats
arm64: defconfig: Enable SoC sleep stats driver
.../bindings/soc/qcom/soc-sleep-stats.yaml | 46
arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 +-
arch/arm64/configs/defconfig | 1
Sivasubramanian
Signed-off-by: Lina Iyer
Signed-off-by: Maulik Shah
Reviewed-by: Rob Herring
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
---
.../bindings/soc/qcom/soc-sleep-stats.yaml | 46 ++
1 file changed, 46 insertions(+)
create mode 100644
Enable SoC sleep stats driver. The driver gives statistics for
various low power modes on Qualcomm Technologies, Inc. (QTI) SoCs.
Signed-off-by: Maulik Shah
Reviewed-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs
Let RPMH clients call rpmh_write_sleep_and_wake() to immediately
write cached sleep and wake data to the TCSes.
Signed-off-by: Maulik Shah
---
(no changes since v1)
---
drivers/soc/qcom/rpmh.c | 16
include/soc/qcom/rpmh.h | 5 +
2 files changed, 21 insertions(+)
diff
()
to immediately write cached sleep and wake sets to TCSes from any
CPU. Conditionally check if rpmh_flush() is invoked from last CPU
then do not check for irqs disabled as such RSCs can write sleep
and wake TCSes at any point.
Signed-off-by: Maulik Shah
---
Changes in v2:
- Update rpmh_flush() to show
requests from platform drivers for state change using the RSC.
Signed-off-by: Lina Iyer
Signed-off-by: Maulik Shah
---
(no changes since v1)
---
drivers/soc/qcom/rpmh-internal.h | 5
drivers/soc/qcom/rpmh-rsc.c | 31 ++
drivers/soc/qcom/rpmh.c | 56
Hi Doug,
Thanks for the patch. Looks good to me and tested.
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
Thanks,
Maulik
On 1/8/2021 11:05 PM, Douglas Anderson wrote:
In Linux, if a driver does disable_irq() and later does enable_irq()
on its interrupt, I believe it's expecting
Hi Doug,
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
Thanks,
Maulik
On 1/8/2021 11:05 PM, Douglas Anderson wrote:
In commit 4b7618fdc7e6 ("pinctrl: qcom: Add irq_enable callback for
msm gpio") we tried to Ack interrupts during unmask. However, that
patch forgot to check &quo
Hi Doug,
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
Thanks,
Maulik
On 1/8/2021 11:05 PM, Douglas Anderson wrote:
When the Qualcomm pinctrl driver wants to Ack an interrupt, it does a
read-modify-write on the interrupt status register. On some SoCs it
makes sure that the status bit
Hi Doug,
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
Thanks,
Maulik
On 1/8/2021 11:05 PM, Douglas Anderson wrote:
There's currently a comment in the code saying function 0 is GPIO.
Instead of hardcoding it, let's add a member where an SoC can specify
it. No known SoCs use a number
Hi Stephen,
On 12/3/2020 12:31 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-11-26 02:18:18)
lockdep_assert_irqs_disabled() was added to check rpmh_flush()
can only be invoked when irqs are disabled, this is true for
APPS RSC as the last CPU going to deepest low power mode is
writing sleep
-by: Maulik Shah
---
Changes in v3:
- Update the comment in include/soc/qcom/tcs.h
- Update to keep req->wait_for_compl as is irq handler
Changes in v2:
- Add SoB of self
- Fix typo in comment
- Update comment as Doug suggested
- Remove write to RSC_DRV_CMD_WAIT_FOR_CMPL in tcs_wr
Hi Doug,
On 12/4/2020 3:14 AM, Doug Anderson wrote:
Hi,
On Mon, Nov 23, 2020 at 11:32 PM Maulik Shah wrote:
@@ -423,8 +422,7 @@ static irqreturn_t tcs_tx_done(int irq, void *p)
cmd = >cmds[j];
sts = read_tcs_cmd(drv, RSC_DRV_CMD_STATUS, i
f-by: Lina Iyer
Signed-off-by: Maulik Shah
Reviewed-by: Douglas Anderson
---
Changes in v2:
- Add Fixes tag
- Add Reviewed-by tag
---
drivers/soc/qcom/rpmh-rsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c
ind
Hi Doug,
On 12/12/2020 3:45 AM, Douglas Anderson wrote:
In Linux, if a driver does disable_irq() and later does enable_irq()
on its interrupt, I believe it's expecting these properties:
* If an interrupt was pending when the driver disabled then it will
still be pending after the driver
Hi Doug,
On 12/10/2020 6:13 AM, Doug Anderson wrote:
Hi,
On Tue, Dec 8, 2020 at 9:54 PM Maulik Shah wrote:
but as long as its IRQ is in disabled/masked state it
doesn't matter.
...but there's no requirement that someone would need to disable/mask
an interrupt while switching the muxing
Hi Doug,
On 12/4/2020 2:47 AM, Doug Anderson wrote:
Hi,
On Thu, Dec 3, 2020 at 1:15 PM Doug Anderson wrote:
Hi,
On Tue, Nov 24, 2020 at 1:53 AM Maulik Shah wrote:
From: Lina Iyer
When triggering a TCS to send its contents, reading back the trigger
value may return an incorrect value
Hi Doug,
On 12/4/2020 2:34 AM, Doug Anderson wrote:
Hi,
On Thu, Dec 3, 2020 at 3:22 AM Maulik Shah wrote:
+ /*
+ * Clear IRQs if switching to/from GPIO mode since muxing to/from
+ * the GPIO path can cause phantom edges.
+ */
+ old_i = (oldval & mask) >>
he phantom.
Fixes: f55c73aef890 ("irqchip/pdc: Add PDC interrupt controller for QCOM SoCs")
Signed-off-by: Douglas Anderson
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
---
There are no dependencies between this patch and patch #2/#3. It can
go in by itself. Patches are only gro
Hi Doug,
On 12/1/2020 3:14 AM, Doug Anderson wrote:
Hi,
On Mon, Nov 30, 2020 at 2:33 AM Maulik Shah wrote:
[1]
https://lore.kernel.org/r/603c691f-3614-d87b-075a-0889e9ffc...@codeaurora.org
Please wait to land [1] before i confirm with HW team if this is indeed
valid case.
Oh, oops
Hi Doug,
On 11/24/2020 11:17 PM, Douglas Anderson wrote:
Conceptually, we can envision the input on Qualcomm SoCs to pass
through a bunch of blocks between coming into the chip and becoming a
GPIO interrupt. From guessing and running a handful of tests, I
believe that we can represent the
Let RPMH clients call rpmh_write_sleep_and_wake() to immediately
write cached sleep and wake data to the TCSes.
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh.c | 16
include/soc/qcom/rpmh.h | 5 +
2 files changed, 21 insertions(+)
diff --git a/drivers/soc/qcom
rpmh_write_sleep_and_wake() to immediately write cached sleep
and wake sets to TCSes from any CPU. Conditionally check if RSC
controller supports 'HW solver' mode then do not check for irqs
disabled as such RSCs can write sleepand wake TCSes at any point.
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh
requests from platform drivers for state change using the RSC.
Signed-off-by: Lina Iyer
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh-internal.h | 5
drivers/soc/qcom/rpmh-rsc.c | 31 ++
drivers/soc/qcom/rpmh.c | 56
/patch/1606379490-4052-1-git-send-email-mks...@codeaurora.org
Lina Iyer (1):
drivers: qcom: rpmh: Disallow active requests in solver mode
Maulik Shah (2):
soc: qcom: rpmh: Add rpmh_write_sleep_and_wake() function
soc: qcom: rpmh: Conditionally check lockdep_assert_irqs_disabled()
drivers/soc
Use __fill_rpmh_msg API during rpmh_write(). This allows to
remove duplication of code in error checking, copying commands
and setting message state.
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers
Hi Linus,
+* When we change types the PDC can give a phantom interrupt.
+* Clear it. Specifically the phantom shows up if a line is already
+* high and we change to rising or if a line is already low and we
+* change to falling but let's be consistent and clear
Hi Marc,
On 11/24/2020 4:45 PM, Marc Zyngier wrote:
On 2020-11-24 10:37, Maulik Shah wrote:
[...]
static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev,
unsigned function,
unsigned group)
{
struct msm_pinctrl *pctrl
Hi Doug,
On 11/24/2020 5:31 AM, Douglas Anderson wrote:
Conceptually, we can envision the input on Qualcomm SoCs to pass
through a bunch of blocks between coming into the chip and becoming a
GPIO interrupt. From guessing and running a handful of tests, I
believe that we can represent the state
.
A write_tcs_reg_sync() would read back the value that is written and try
to match it to the value written to ensure that the value is written,
but if that value is different, we may see false error for same.
Signed-off-by: Lina Iyer
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh-rsc.c | 2 +-
1 file
-by: Maulik Shah
---
Changes in v2:
- Add SoB of self
- Fix typo in comment
- Update comment as Doug suggested
- Remove write to RSC_DRV_CMD_WAIT_FOR_CMPL in tcs_write() and tcs_invalidate()
---
drivers/soc/qcom/rpmh-rsc.c | 25 ++---
include/soc/qcom/tcs.h | 3 ++-
2 files
Hi Doug,
Thanks for the patch. Looks good to me and tested.
Reviewed-by: Maulik Shah
Tested-by: Maulik Shah
Thanks,
Maulik
On 11/24/2020 5:31 AM, Douglas Anderson wrote:
We have a problem if we use gpio-keys and configure wakeups such that
we only want one edge to wake us up. AKA
on
Cc: Rajendra Nayak
Cc: Maulik Shah
Cc: Stephen Boyd
Cc: Liam Girdwood
Cc: Mark Brown
Cc: linux-arm-...@vger.kernel.org
Reported-by: kernel test robot
Signed-off-by: John Stultz
---
drivers/regulator/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/reg
to PDC.
Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drive
Hi Bjorn,
Can you please pick these changes.
Thanks,
Maulik
On 10/5/2020 11:29 AM, Maulik Shah wrote:
Resending the patches rebasing on top of latest linux-next (next-20201002)
Changes in v2:
- Update commit message in patch 1
- send [4] again instead of revert's revert in patch 2
The following commit has been merged into the irq/core branch of tip:
Commit-ID: dd87bd09822c294a3c7c4daf11f11a9f81222f80
Gitweb:
https://git.kernel.org/tip/dd87bd09822c294a3c7c4daf11f11a9f81222f80
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:02:02 +05:30
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: d7bc63fa20b8a3b0d0645bed1887848c65c01529
Gitweb:
https://git.kernel.org/tip/d7bc63fa20b8a3b0d0645bed1887848c65c01529
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:02:04 +05:30
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 299d7890792e75065b906f83fcb0ca92e5c8c072
Gitweb:
https://git.kernel.org/tip/299d7890792e75065b906f83fcb0ca92e5c8c072
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:02:03 +05:30
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: f41aaca593377a4fe3984459fd4539481263b4cd
Gitweb:
https://git.kernel.org/tip/f41aaca593377a4fe3984459fd4539481263b4cd
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:02:00 +05:30
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: c5f72aeb659eb2f809b9531d759651514d42aa3a
Gitweb:
https://git.kernel.org/tip/c5f72aeb659eb2f809b9531d759651514d42aa3a
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:01:59 +05:30
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 90428a8eb4947f9c7c905a178f3520dc7e2ee6d2
Gitweb:
https://git.kernel.org/tip/90428a8eb4947f9c7c905a178f3520dc7e2ee6d2
Author:Maulik Shah
AuthorDate:Mon, 28 Sep 2020 10:02:01 +05:30
Committer
.
Cc: Sai Prakash Ranjan
Cc: John Stultz
Cc: Stephen Rothwell
Reviewed-by: Stephen Boyd
Reviewed-by: Sai Prakash Ranjan
Reviewed-by: Ulf Hansson
Signed-off-by: Maulik Shah
Reviewed-by: Bjorn Andersson
---
drivers/soc/qcom/rpmh-rsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
/list/?series=269733
[3] https://lore.kernel.org/r/20200115013751.249588-1-swb...@chromium.org
[4] https://lore.kernel.org/r/20200326224459.105170-3-john.stu...@linaro.org
John Stultz (1):
soc: qcom: rpmh: Allow RPMH driver to be loaded as a module
Maulik Shah (1):
Revert "drivers: qcom: rpm
Cc: linux-arm-...@vger.kernel.org
Signed-off-by: John Stultz
Signed-off-by: Bjorn Andersson
[mkshah: Fix typos in commit message, send after removing _rcuidle trace]
Signed-off-by: Maulik Shah
Reviewed-by: Stephen Boyd
Reviewed-by: Bjorn Andersson
---
drivers/soc/qcom/Kconfig| 2
Hi,
On 9/29/2020 2:17 AM, John Stultz wrote:
On Tue, Aug 25, 2020 at 4:22 AM Maulik Shah wrote:
Commit efde2659b0fe ("drivers: qcom: rpmh-rsc: Use rcuidle tracepoints
for rpmh") was written to fix a bug seen in an unmerged series that
implemented a struct generic_pm_domain:
for wakeup but are in disabled state.
On resume such irqs will be restored back to disabled state.
Suggested-by: Thomas Gleixner
Signed-off-by: Maulik Shah
---
include/linux/irq.h | 49 ++---
kernel/irq/debugfs.c | 3 +++
kernel/irq/pm.c
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Acked-by: Linus Walleij
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
ot;)
Acked-by: Bjorn Andersson
Acked-by: Linus Walleij
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom/pinctrl-msm.c
index a2567e7..1c23
-by: Bjorn Andersson
Acked-by: Linus Walleij
Reviewed-by: Douglas Anderson
Reviewed-by: Stephen Boyd
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctr
-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index acc0620..bd39e9d 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -341,7 +341,8 @@ static
k callback
h. IRQ gets disabled/masked in HW now
i. When driver invokes enable_irq() the SW pending IRQ leads IRQ's handler
j. enable_irq() will again enable/unmask in HW
[1] https://www.spinics.net/lists/kernel/msg3398294.html
[2] https://patchwork.kernel.org/patch/11466021/
Maulik Shah (6):
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Acked-by: Linus Walleij
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
Hi,
On 8/26/2020 3:08 AM, Thomas Gleixner wrote:
On Tue, Aug 25 2020 at 03:12, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-22 09:16:58)
diff --git a/kernel/irq/pm.c b/kernel/irq/pm.c
index c6c7e18..2cc800b 100644
--- a/kernel/irq/pm.c
+++ b/kernel/irq/pm.c
@@ -69,12 +69,17 @@ void
Cc: linux-arm-...@vger.kernel.org
Signed-off-by: John Stultz
Signed-off-by: Bjorn Andersson
[mkshah: Fix typos in commit message, send after removing _rcuidle trace]
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/Kconfig| 2 +-
drivers/soc/qcom/rpmh-rsc.c | 5 +
2 files changed, 6
.
Cc: Sai Prakash Ranjan
Cc: John Stultz
Cc: Stephen Rothwell
Reviewed-by: Stephen Boyd
Reviewed-by: Sai Prakash Ranjan
Reviewed-by: Ulf Hansson
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh-rsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/rp
...@chromium.org
[4] https://lore.kernel.org/r/20200326224459.105170-3-john.stu...@linaro.org
John Stultz (1):
soc: qcom: rpmh: Allow RPMH driver to be loaded as a module
Maulik Shah (1):
Revert "drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh"
drivers/soc/qcom/Kcon
Hi,
On 8/21/2020 4:42 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-19 03:07:50)
The _rcuidle tracepoints are removed from RPMH driver which prevented
to compile it as module. Bring back the change to make it module.
This reverts commit 1f7a3eb785e4a4e196729cd3d5ec97bd5f9f2940.
Cc
Hi,
On 8/19/2020 11:34 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-19 03:07:49)
This change was done based on an test results of unmerged series of
adding RSC power domain and using .power_off callback of genpd to
invoke rpmh_flush().
Perhaps:
Commit efde2659b0fe ("drivers:
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom
irq_enable/.irq_unmask callback of irqchip.
Suggested-by: Thomas Gleixner
Signed-off-by: Maulik Shah
---
include/linux/irq.h | 41 ++---
kernel/irq/debugfs.c | 1 +
kernel/irq/pm.c | 7 ++-
3 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/inc
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index c1c5dfa
are the only ones that can be used by the new kernel so clear only those
IRQs. The remaining ones may be in use by a different kernel and should
not be set by new kernel.
Suggested-by: Stephen Boyd
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 11 ++-
1 file changed, 10
ic-v3: Allow interrupt to be
configured as wake-up sources")' GIC irqchip has IRQCHIP_SKIP_SET_WAKE
flag.
Use return value from irq_set_irq_wake() and irq_chip_set_wake_parent()
instead of always returning success.
Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed
ot;)
Acked-by: Linus Walleij
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom/pinctrl-msm.c
index a2567e7..1c23f5c 100644
--- a/drive
s.net/lists/kernel/msg3398294.html
[2] https://patchwork.kernel.org/patch/11466021/
Maulik Shah (6):
pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND
flags
pinctrl: qcom: Use return value from irq_set_wake() call
genirq/PM: Introduce IRQCHIP_ENABLE
The _rcuidle tracepoints are removed from RPMH driver which prevented
to compile it as module. Bring back the change to make it module.
This reverts commit 1f7a3eb785e4a4e196729cd3d5ec97bd5f9f2940.
Cc: John Stultz
Cc: Stephen Rothwell
Cc: Todd Kjos
Cc: Saravana Kannan
Signed-off-by: Maulik
://patchwork.kernel.org/project/linux-arm-msm/list/?series=243931
[2] https://patchwork.kernel.org/project/linux-arm-msm/list/?series=269733
[3] https://lore.kernel.org/r/20200115013751.249588-1-swb...@chromium.org
[4] https://lore.kernel.org/r/20200326224459.105170-3-john.stu...@linaro.org
Maulik Shah
.
This reverts commit efde2659b0fe835732047357b2902cca14f054d9.
Cc: Sai Prakash Ranjan
Cc: John Stultz
Cc: Stephen Rothwell
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh-rsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom
Hi,
On 8/14/2020 4:28 AM, Doug Anderson wrote:
Hi,
On Thu, Aug 13, 2020 at 3:09 PM Thomas Gleixner wrote:
Specifically the problem we're trying to address is when an IRQ is
marked as "disabled" (driver called disable_irq()) but also marked as
"wakeup" (driver called enable_irq_wake()). As
Hi,
On 8/12/2020 3:01 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-10 04:21:00)
Clear previous kernel's configuration during init by resetting
interrupts in enable bank to zero.
Can you please add some more information here about why we're not
clearing all the pdc irqs and only
Hi,
On 8/10/2020 5:39 PM, Felipe Balbi wrote:
Maulik Shah writes:
Clear previous kernel's configuration during init by resetting
interrupts in enable bank to zero.
Suggested-by: Stephen Boyd
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 12 +++-
1 file changed, 11
Hi,
On 8/12/2020 1:40 AM, Doug Anderson wrote:
Hi,
On Mon, Aug 10, 2020 at 4:21 AM Maulik Shah wrote:
From: Douglas Anderson
This goes with the new irq_suspend_one() and irq_resume_one()
callbacks and allow us to easily pass things up to our parent.
Signed-off-by: Douglas Anderson
Signed
Hi,
Sure, i will take care these comments in v5.
Thanks,
Maulik
On 8/12/2020 1:39 AM, Doug Anderson wrote:
Hi,
On Mon, Aug 10, 2020 at 4:21 AM Maulik Shah wrote:
From: Douglas Anderson
The "struct irq_chip" has two callbacks in it: irq_suspend() and
irq_resume(). These two
Hi,
On 8/12/2020 1:04 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-10 04:20:55)
msmgpio irqchip is not using return value of irq_set_wake call.
Start using it.
Does this work when the irq parent isn't setup in a hierarchy?
yes it works fine even when parent isn't setup in hierarchy
Hi,
On 8/12/2020 1:02 AM, Stephen Boyd wrote:
Can the subject be more specific? "pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED
flag"?
Sure i can update subject in v5.
Thanks,
Maulik
Quoting Maulik Shah (2020-08-10 04:20:54)
Add irqchip specific flags for msmgpio irqchip t
.html
[2] https://patchwork.kernel.org/patch/11466021/
Douglas Anderson (4):
genirq: Introduce irq_suspend_one() and irq_resume_one() callbacks
genirq: introduce irq_suspend_parent() and irq_resume_parent()
pinctrl: qcom: Call our parent for irq_suspend_one / irq_resume_one
irqchip: qcom-pdc
ot;)
Acked-by: Linus Walleij
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom/pinctrl-msm.c
index a2567e7..90edf61 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++
From: Douglas Anderson
The parent (PDC) needs to handle this. Call it.
Signed-off-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom/pinctrl
l suspend operations
and the resume before its normal resume operations.
Signed-off-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
include/linux/irq.h| 13 +++--
kernel/irq/chip.c | 16
kernel/irq/internals.h | 2 ++
kernel/irq/pm.c| 15 ---
From: Douglas Anderson
This goes with the new irq_suspend_one() and irq_resume_one()
callbacks and allow us to easily pass things up to our parent.
Signed-off-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
include/linux/irq.h | 2 ++
kernel/irq/chip.c | 28
-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 51 --
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index c1c5dfa..dfcdfc5 100644
--- a/drivers
Clear previous kernel's configuration during init by resetting
interrupts in enable bank to zero.
Suggested-by: Stephen Boyd
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/qcom-pdc.c b
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