Re: [PATCH v5 0/3] ARM: S5PV210: move to common clk framework

Quoting Kukjin Kim (2013-10-20 13:51:42) > On 10/20/13 01:03, Tomasz Figa wrote: > > Hi Mike, Kukjin, Rafael, > > > > On Tuesday 24 of September 2013 14:50:06 Mateusz Krawczuk wrote: > >> This patch series is the new s5pv210 clock implementation > >> (using common clk framework). > >> > >> This imp

Re: pull request for tegra clocks (resend with some CCs added this time)

I'm happy for the changes to be based on an -rc or clk-next. Either is fine. Thanks, Mike On Tue, Oct 15, 2013 at 8:42 AM, Stephen Warren wrote: > On 10/15/2013 09:36 AM, Peter De Schrijver wrote: >> The following changes since commit a0cf1abc25ac197dd97b857c0f6341066a8cb1cf: >> >> Add linux-n

Re: [PATCHv2 1/1] clk/zynq: Fix possible memory leak

Quoting Felipe Pena (2013-10-07 19:25:44) > The zynq_clk_register_fclk function can leak memory (fclk_lock) when unable > to alloc memory for fclk_gate_lock > > Signed-off-by: Felipe Pena > Acked-by: Sören Brinkmann Taken into clk-next. Thanks! Mike > --- > drivers/clk/zynq/clkc.c | 16 +++

Re: [PATCH v4] ARM: kirkwood: retain MAC address for DT ethernet

: Ezequiel Garcia > Tested-by: Andrew Lunn Reviewed-by: Mike Turquette Regards, Mike > --- > Just to make sure they don't get lost this time: > Added Jason's and Ezequiel's Reviewed-by to honor their constant reviews, > and Andrew's last Tested-by because I

Re: [PATCH v6] clk: add MOXA ART SoCs clock driver

Quoting Jonas Jensen (2013-07-29 02:44:22) > This patch adds MOXA ART SoCs clock driver support. > > Signed-off-by: Jonas Jensen I've taken this patch into clk-next. Thanks for the rework. Is it possible for parent clocks of these moxa core clocks to change rate? It might make sense for your dr

Re: [PATCH] clk: provide public clk_is_enabled function

On Sun, Oct 6, 2013 at 3:24 PM, Sebastian Hesselbarth wrote: > On 10/06/2013 10:02 PM, Mike Turquette wrote: >> >> Quoting Sebastian Hesselbarth (2013-10-06 12:42:01) >>> >>> On 10/06/2013 06:30 PM, Andrew Lunn wrote: >>>> >>>> On Su

Re: [PATCH] clk: provide public clk_is_enabled function

Quoting Sebastian Hesselbarth (2013-10-06 12:42:01) > On 10/06/2013 06:30 PM, Andrew Lunn wrote: > > On Sun, Oct 06, 2013 at 11:06:09AM +0200, Gerhard Sittig wrote: > >> On Sat, Oct 05, 2013 at 22:42 +0200, Andrew Lunn wrote: > >>> > >>> On Sat, Oct 05, 2013 at 10:24:30PM +0200, Uwe Kleine-König wr

Re: [PATCH] clk: palmas: add clock driver for palmas

Quoting Mark Brown (2013-10-04 09:41:39) > On Thu, Oct 03, 2013 at 06:00:07PM +0530, Laxman Dewangan wrote: > > > + Optional subnode properties: > > + ti,clock-boot-enable: Enable clock at the time of booting. > > Shouldn't this be a generic clock subsystem thing? It seems like > somethi

Re: [PATCH v5] clk: si570: Add a driver for SI570 oscillators

Quoting Sören Brinkmann (2013-10-02 10:20:38) > Hi Mike, > > could you please comment on this/apply it to clk-next? It looks good and is in the queue. Will show up in clk-next in a few days. Thanks, Mike > > Thanks, > Sören > > On Sat, Sep 21, 2013 at 04:40:39PM -0700, Soren B

Re: [PATCH v6 0/5] clk: clock deregistration support

Quoting Sylwester Nawrocki (2013-09-24 14:38:44) > On 08/30/2013 04:53 PM, Sylwester Nawrocki wrote: > > This patch series implements clock deregistration in the common clock > > framework. Comparing to v5 it only includes further corrections of NULL > > clock handling. > [...] > >clk: Provide

Re: [PATCH] clk: wm831x: get rid of the implementation of remove function

Quoting Mark Brown (2013-09-26 07:47:43) > On Thu, Sep 26, 2013 at 07:18:15PM +0530, Laxman Dewangan wrote: > > The remove function implemented for platform driver's remove callback > > just return 0 as part of its implementation. > > > > Remove this APIs and do not pass the valid .remove for plat

Re: [PATCH 1/3] clk: Add error handling to clk_fetch_parent_index()

Quoting Tomasz Figa (2013-09-28 17:37:14) > There are at least two different error cases that can happen in > clk_fetch_parent_index() function: > - allocation failure, > - parent clock lookup failure, > however it returns only an u8, which is supposed to contain parent clock > index. > > This p

Re: [PATCH v2] clk: si570: Add a driver for SI570 oscillators

Quoting Soren Brinkmann (2013-09-18 15:43:38) > diff --git a/Documentation/devicetree/bindings/clock/silabs,si570.txt > b/Documentation/devicetree/bindings/clock/silabs,si570.txt > new file mode 100644 > index 000..7ab5c8b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/silabs,

[GIT PULL] clk: changes for 3.12

: Add Allwinner A20 gates Mike Turquette (6): Merge branch 'clk-next-s3c64xx' into clk-next clk: export fixed-factor, gate & mux registration Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next clk: handle NULL struct cl

Re: [GIT PULL] clk: changes for 3.12

On Mon, Sep 9, 2013 at 2:54 PM, Mike Turquette wrote: > The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b: > > Linux 3.11-rc2 (2013-07-21 12:05:29 -0700) > > are available in the git repository at: > > git://git.linaro.org/people/mturquette/l

Re: [PATCH v4 3/5] clk: dt: binding for basic multiplexer clock

On Wed, Sep 4, 2013 at 11:36 AM, Stephen Warren wrote: > On 09/03/2013 05:22 PM, Mike Turquette wrote: >> Quoting Stephen Warren (2013-08-30 14:37:46) >>> On 08/30/2013 02:33 PM, Mike Turquette wrote: > ... >>>> The clock _data_ seems to always have some chur

Re: [PATCH RFC v2 15/16] clk: vt8500: remove call to of_clk_init

Quoting Sebastian Hesselbarth (2013-08-27 14:28:09) > With arch/arm calling of_clk_init(NULL) from time_init(), we can now > remove it from corresponding drivers/clk code. > > Signed-off-by: Sebastian Hesselbarth Acked-by: Mike Turquette > --- > Cc: Mike Turquette > C

Re: [PATCH RFC v2 08/16] ARM: mxs: remove custom .init_time hook

> Signed-off-by: Sebastian Hesselbarth Acked-by: Mike Turquette Need Shawn's Ack for this as well. > --- > Cc: Shawn Guo > Cc: Mike Turquette > Cc: Russell King > Cc: Arnd Bergmann > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-kernel@vger.kernel.org

Re: [PATCH RFC v2 04/16] ARM: highbank: remove custom .init_time hook

rch code now. > > Signed-off-by: Sebastian Hesselbarth > Acked-by: Rob Herring Acked-by: Mike Turquette > --- > Cc: Rob Herring > Cc: Mike Turquette > Cc: Russell King > Cc: Arnd Bergmann > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-kernel@vger.

Re: linux-next: manual merge of the clk tree with Linus' tree

Quoting Sören Brinkmann (2013-08-27 08:44:11) > On Tue, Aug 27, 2013 at 11:09:52AM +0100, James Hogan wrote: > > On 27/08/13 10:03, Stephen Rothwell wrote: > > > Hi Mike, > > > > > > Today's linux-next merge of the clk tree got a conflict in > > > drivers/clk/zynq/clkc.c between commits 252957cc3a

Re: [PATCHv3 02/10] clk: sunxi: fix initialization of basic clocks

g the only other > simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL) > to initialize both of them. > > Signed-off-by: Emilio López > Signed-off-by: Maxime Ripard > Cc: Mike Turquette Taken into clk-next. Regards, Mike > --- > drivers/clk/sunxi/

Re: [PATCH v2 2/4] clk: implement clk_unregister

Quoting Sylwester Nawrocki (2013-08-20 10:34:21) > clk_unregister() is currently not implemented and it is required when > a clock provider module needs to be unloaded. > > Normally the clock supplier module is prevented to be unloaded by > taking reference on the module in clk_get(). > > For cas

Re: [PATCH v2 3/4] clk: mvebu: add missing iounmap

Quoting Jisheng Zhang (2013-08-22 19:34:01) > Add missing iounmap to setup error path. > > Change-Id: I4371569d14d7026aa9f90d7cd53f669d365fe26a Please remove Change-Id's from the commit message for upstream patch submissions in the future. I can remove this one, this time. I've taken the patch i

Re: [PATCH 3/4] clk: mvebu: add missing iounmap

Quoting Jisheng Zhang (2013-08-22 05:46:50) > Add missing iounmap to setup error path. > > Signed-off-by: Jisheng Zhang Patch looks good with one minor nitpick below. > @@ -145,10 +147,8 @@ void __init mvebu_clk_gating_setup(struct device_node > *np, > ctrl->num_gates = n; > ct

Re: [RFC 02/17] ARM: call clk_of_init from time_init

Quoting Arnd Bergmann (2013-08-21 11:54:10) > On Tuesday 20 August 2013, Sebastian Hesselbarth wrote: > > Perhaps Tegra is the common case but other SoC haven't dug deep enough? > > IMHO from a HW point-of-view clocks are really among the essential > > things that need to be running before you can

[PATCH] clk: handle NULL struct clk gracefully

codes of zero. Signed-off-by: Mike Turquette --- drivers/clk/clk.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index bc02037..7c43762 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1428,6 +1428,9 @@ int clk_set

[PATCH v4 3/5] clk: dt: binding for basic multiplexer clock

style. Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette Tested-by: Heiko Stuebner Reviewed-by: Heiko Stuebner --- Changes since v3: * replaced underscores with dashes in DT property names * bail from of clock setup function early if of_iomap fails * removed

[PATCH v4 0/5] clk: dt: bindings for mux, divider & gate clocks

es * bail from of clock setup function early if of_iomap fails * removed unecessary explict cast Mike Turquette (5): clk: divider: replace bitfield width with mask clk: of: helper for determining number of parent clocks clk: dt: binding for basic multiplexer clock clk: dt: binding for basi

[PATCH v4 4/5] clk: dt: binding for basic divider clock

Devicetree binding for the basic clock divider, plus the setup function to register the clock. Based on the existing fixed-clock binding. Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette Tested-by: Heiko Stuebner Reviewed-by: Heiko Stuebner --- Changes

[PATCH v4 5/5] clk: dt: binding for basic gate clock

://article.gmane.org/gmane.linux.documentation/5679 [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137878.html Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette Tested-by: Heiko Stuebner Reviewed-by: Heiko Stuebner --- Changes since v3

[PATCH v4 2/5] clk: of: helper for determining number of parent clocks

Walks the "clocks" array of parent clock phandles and returns the number. Signed-off-by: Mike Turquette Tested-by: Heiko Stuebner Reviewed-by: Heiko Stuebner --- No change since v3 drivers/clk/clk.c| 6 ++ include/linux/clk-provider.h | 1 + 2 files changed, 7

[PATCH v4 1/5] clk: divider: replace bitfield width with mask

internally but the two registration functions still accept the width to maintain compatibility with existing users. Also updated in this patch is the clk-private.h divider macro and two Freescale clock divider implementations that are based on struct clk_divider. Signed-off-by: Mike Turquette

Re: [PATCH v3 0/5] clk: dt: bindings for mux, divider & gate clocks

Quoting Stephen Boyd (2013-07-18 14:04:44) > On 06/20/13 23:14, Mike Turquette wrote: > > This series introduces binding definitions for common register-mapped > > clock multiplexer, divider and gate IP blocks along with the > > corresponding setup functions for matching DT da

Re: [PATCH 1/3] ARM: imx6q: refactor some ldb related clocks

Quoting Fabio Estevam (2013-08-20 08:40:52) > On Tue, Aug 20, 2013 at 5:38 AM, Liu Ying wrote: > > > diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt > > b/Documentation/devicetree/bindings/clock/imx6q-clock.txt > > index 5a90a72..90e923e 100644 > > --- a/Documentation/device

Re: [PATCH] ARM: at91/dt: split sam9x5 peripheral definitions

; > avoid the > > definition of unavailable clocks or definition of clocks with the same > > id (which may result > > in bad clk registration). > > If we keep all the definitions in one .dtsi file (even the one which are > > not really available), > > I may ne

Re: [PATCH RFC 2/2] clk: implement clk_unregister

Quoting Sylwester Nawrocki (2013-08-06 08:51:57) > +/* > + * Empty clk_ops for unregistered clocks. These are used temporarily > + * after clk_unregister() was called on a clock and until last clock > + * consumer calls clk_put() and the struct clk object is freed. > + */ > +static int clk_dummy_pr

[PATCH] clk: export fixed-factor, gate & mux registration

These registration calls may be used by loadable modules. Export them. Signed-off-by: Mike Turquette --- drivers/clk/clk-fixed-factor.c | 2 ++ drivers/clk/clk-gate.c | 1 + drivers/clk/clk-mux.c | 2 ++ 3 files changed, 5 insertions(+) diff --git a/drivers/clk/clk-fixed

[GIT PULL] clk: fixes for 3.11-rc6

The following changes since commit d4e4ab86bcba5a72779c43dc1459f71fea3d89c8: Linux 3.11-rc5 (2013-08-11 18:04:20 -0700) are available in the git repository at: git://git.linaro.org/people/mturquette/linux.git tags/clk-fixes-for-linus for you to fetch changes up to a701fe3851d9c7f6bd27bc0b92

Re: [PATCH v1 09/14] clk: msm: Add support for MSM8960's global clock controller (GCC)

Quoting Stephen Boyd (2013-08-12 22:03:34) > On 08/08, Mark Rutland wrote: > > Hi Stephen, > > > > On Thu, Jul 25, 2013 at 01:43:37AM +0100, Stephen Boyd wrote: > > > Fill in the data and wire up the global clock controller to the > > > MSM clock driver. This should allow most non-multimedia devic

Re: [PATCH 14/18] clk: samsung: s3c64xx: Add aliases for DMA clocks

Quoting Tomasz Figa (2013-08-11 10:59:26) > This patch adds clkdev aliases for clocks used by PL08x DMA driver. > > Signed-off-by: Tomasz Figa Acked-by: Mike Turquette > --- > drivers/clk/samsung/clk-s3c64xx.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --g

Re: [PATCH 16/18] clk: samsung: s3c64xx: Remove clock aliases of old DMA driver

Quoting Tomasz Figa (2013-08-11 10:59:28) > Since the old DMA driver got removed, these aliases are no longer > necessary. > > Signed-off-by: Tomasz Figa Acked-by: Mike Turquette > --- > drivers/clk/samsung/clk-s3c64xx.c | 2 -- > 1 file changed, 2 deletions(-) > &g

Re: [PATCH v1 04/14] clk: Add set_rate_and_parent() op

Quoting Stephen Boyd (2013-07-25 09:45:42) > On 07/25, Tomasz Figa wrote: > > On Wednesday 24 of July 2013 17:43:32 Stephen Boyd wrote: > > > Some of Qualcomm's clocks can change their parent and rate at the > > > same time with a single register write. Add support for this > > > hardware to the co

Re: [PATCH v6 0/5] clk: implement remuxing during set_rate

Quoting James Hogan (2013-07-29 04:24:57) > This patchset adds support for automatic selection of the best parent > for a clock mux, i.e. the one which can provide the closest clock rate > to that requested. It can be disabled by a new CLK_SET_RATE_NO_REPARENT > flag (which is set for all uses of c

Re: [PATCH 2/3] mfd: sec: Add clock cell for s2mps11

Quoting Yadwinder Singh Brar (2013-07-07 04:44:21) > This patch adds clock to list of mfd cells for s2mps11 and DT documentation > for clock part. > > Signed-off-by: Yadwinder Singh Brar Reviewed-by: Mike Turquette > --- > Documentation/devicetree/bindings/mfd/

Re: [PATCH 1/6] clk: Tegra: Add CPU0 clock driver

Quoting Viresh Kumar (2013-08-07 07:46:43) > This patch adds CPU0's clk driver for Tegra. It will be used by the generic > cpufreq-cpu0 driver to get/set cpu clk. > > Most of the platform specific bits are picked from tegra-cpufreq.c. > > Signed-off-by: Viresh Kumar Hi Viresh, It is nice to se

Re: [PATCH 1/3] clk: s2mps11: Add support for s2mps11

Quoting Yadwinder Singh Brar (2013-07-07 04:44:20) > This patch adds support to register three(AP/CP/BT) buffered 32.768 KHz > outputs of mfd-s2mps11 with common clock framework. > > Signed-off-by: Yadwinder Singh Brar Yadwinder, Looks good to me with the exception of a binding description docu

Re: [PATCH v1 02/14] clk: Add of_init_clk_data() to parse common clock bindings

Quoting Stephen Boyd (2013-07-25 09:36:56) > On 07/25, Tomasz Figa wrote: > > On Wednesday 24 of July 2013 17:43:30 Stephen Boyd wrote: > > > Consolidate DT parsing for the common bits of a clock binding in > > > one place to simplify clock drivers. This also has the added > > > benefit of standard

Re: [Ksummit-2013-discuss] [ATTEND] [ARM ATTEND] kernel data bloat and how to avoid it

Quoting Tony Lindgren (2013-08-02 00:53:53) > People are unnecessarily defining registers in kernel for similar devices > over and over again for each new SoC at the arch level and now more and > more at the driver level. > > One example of that are device tree based drivers that don't describe >

Re: [PATCH v4 6/8] wlcore: sdio: add wilink clock providers

Quoting Luciano Coelho (2013-07-30 06:04:34) > +static const struct of_device_id wlcore_sdio_of_clk_match_table[] = { > + { .compatible = "ti,wilink-clock" }, > +}; > + > static struct wl12xx_platform_data *wlcore_get_pdata_from_of(struct device > *dev) > { > struct wl12xx_platform

Re: RE: [PATCH v8 05/12] clk: exynos5250: add gate clock descriptions of System MMU

Quoting Cho KyongHo (2013-07-27 02:08:11) > > -Original Message- > > From: Mike Turquette [mailto:mturque...@linaro.org] > > Sent: Saturday, July 27, 2013 5:01 AM > > > > Quoting Cho KyongHo (2013-07-26 04:27:54) > > > This adds gate clocks

Re: [PATCH v5] clk: add MOXA ART SoCs clock driver

Quoting Tomasz Figa (2013-07-23 01:09:06) > On Monday 22 of July 2013 10:21:38 Mark Rutland wrote: > > On Fri, Jul 19, 2013 at 09:17:17AM +0100, Jonas Jensen wrote: > > > This patch adds MOXA ART SoCs clock driver support. > > > > > > Signed-off-by: Jonas Jensen > > > --- > > > > > > Notes: > >

Re: [PATCH v8 05/12] clk: exynos5250: add gate clock descriptions of System MMU

Quoting Cho KyongHo (2013-07-26 04:27:54) > This adds gate clocks of all System MMUs and their master IPs > that are not apeared in clk-exynos5250.c > > Signed-off-by: Cho KyongHo Change looks good to me. Are you OK if I take it into the clk tree or do you want to keep this series together? Reg

Re: [PATCH v5 4/5] clk: add CLK_SET_RATE_NO_REPARENT flag

eing reparented in > >> response to set_rate please let me know and I'll drop the relevant > >> portion of the patch. > > > > Why is this better to change current behaviour of the clock core > > and modify all drivers instead of having, e.g. CLK_SET_

[PATCH RFC 1/3] clk: notifier handler for dynamic voltage scaling

proposed in February[1]. [1] http://patches.linaro.org/15128/ Signed-off-by: Mike Turquette --- drivers/clk/Makefile | 1 + drivers/clk/clk-voltage-notifier.c | 135 + include/linux/clk.h| 7 +- 3 files changed, 142 insertions

[PATCH RFC 0/3] voltage scaling via clock rate-change notifiers

otifiers this series hopes to consolidate code across drivers and encourage vendors to upstream their DVFS bits. Mike Turquette (3): clk: notifier handler for dynamic voltage scaling clk: cpufreq helper for voltage scaling cpufreq: cpufreq-cpu0: clk rate-change notifiers drivers/clk/

[PATCH RFC 3/3] cpufreq: cpufreq-cpu0: clk rate-change notifiers

Removes direct handling of OPP tables and voltage regulators by calling of_clk_cpufreq_notifier_handler, introduced by commit "clk: cpufreq helper for voltage scaling". In the future this can help consolidate code found across similar CPUfreq drivers. Signed-off-by: Mike Turquette --

[PATCH RFC 2/3] clk: cpufreq helper for voltage scaling

ency_table and also calculate the voltage scaling latency, both of which are returned to the caller for use in the CPUfreq driver. Signed-off-by: Mike Turquette --- drivers/clk/clk-voltage-notifier.c | 71 ++ include/linux/clk.h| 6 2 fil

[GIT PULL] clk: changes for 3.11

The following changes since commit e4aa937ec75df0eea0bee03bffa3303ad36c986b: Linux 3.10-rc3 (2013-05-26 16:00:47 -0700) are available in the git repository at: git://git.linaro.org/people/mturquette/linux.git tags/clk-for-linus-3.11 for you to fetch changes up to 45e3ec3784aec0d194740b75b54

Re: [PATCH v3 3/5] clk: dt: binding for basic multiplexer clock

Quoting Haojian Zhuang (2013-06-25 01:27:58) > On 21 June 2013 14:14, Mike Turquette wrote: > > Device Tree binding for the basic clock multiplexer, plus the setup > > function to register the clock. Based on the existing fixed-clock > > binding. > > > > Inc

Re: [PATCH v2 0/2] Clock update for EXYNOS4210-CPUFREQ driver

Quoting Tushar Behera (2013-06-20 03:47:16) > cpufreq driver for EXYNOS4 based SoCs are not platform drivers, hence > we cannot currently pass the clock names through a device tree node. > Instead, we need to make them available through global alias. > > The patches are based on next-20130618. >

Re: [PATCH v5 0/5] clk: implement remuxing during set_rate

Quoting James Hogan (2013-06-13 09:05:57) > This patchset adds support for automatic selection of the best parent > for a clock mux, i.e. the one which can provide the closest clock rate > to that requested. It can be disabled by a new CLK_SET_RATE_NO_REPARENT > flag (which is set for all uses of c

Re: [PATCH v2] clk: tegra: Use common of_clk_init function

r tree. Hi Prashant. I merged this one a long time ago: Refs: v3.10-rc3-22-g061cec9 Author: Prashant Gaikwad AuthorDate: Mon May 27 13:10:09 2013 +0530 Commit: Mike Turquette CommitDate: Fri May 31 12:57:25 2013 -0700 Regards, Mike > > Thanks, >

[PATCH v3 4/5] clk: dt: binding for basic divider clock

Devicetree binding for the basic clock divider, plus the setup function to register the clock. Based on the existing fixed-clock binding. Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette --- Changes since v2: * added hiword-mask property to the binding

[PATCH v3 3/5] clk: dt: binding for basic multiplexer clock

style. Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette --- Changes since v2: * added hiword-mask property to the binding * changed bit-shift property from u8 to u32 in the dt binding Changes since v1: * pass shift value into clk_register_mux_table * s

[PATCH v3 2/5] clk: of: helper for determining number of parent clocks

Walks the "clocks" array of parent clock phandles and returns the number. Signed-off-by: Mike Turquette --- No change since v2 drivers/clk/clk.c| 6 ++ include/linux/clk-provider.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/c

[PATCH v3 0/5] clk: dt: bindings for mux, divider & gate clocks

truct definitions closely model the hardware register layout. This version fixes bugs and incorporates support for the hiword-mask property needed on Hisilicon and Rockchip platforms. Tested on OMAP4460 Panda ES. Mike Turquette (5): clk: divider: replace bitfield width with mask clk: of: helpe

[PATCH v3 5/5] clk: dt: binding for basic gate clock

://article.gmane.org/gmane.linux.documentation/5679 [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137878.html Tero Kristo contributed helpful bug fixes to this patch. Signed-off-by: Mike Turquette --- Changes since v2: * added hiword-mask property to the binding * changed bit

[PATCH v3 1/5] clk: divider: replace bitfield width with mask

Guo Signed-off-by: Mike Turquette --- No change since v2 arch/arm/mach-imx/clk-busy.c | 2 +- drivers/clk/clk-divider.c| 31 +++ drivers/clk/mxs/clk-div.c| 2 +- include/linux/clk-private.h | 2 +- include/linux/clk-provider.h | 2 +- 5 files changed, 19

Re: [RFC PATCH 13/50] ARM: at91: move at91rm9200 SoC to new at91 clk implem

Quoting Boris BREZILLON (2013-06-07 08:11:03) > +static struct clk_lookup pioA_clk_lookup[] = { > + CLKDEV_INIT(NULL, "pioA_clk", NULL), > + CLKDEV_INIT(NULL, "pioA", NULL), > +}; It would be great to get rid of this clkdev data from the kernel as well. Have you looked into encoding th

Re: [PATCH 21/33 v2] clk: ux500: Add Device Tree support for the PRCC Kernel clock

Quoting Arnd Bergmann (2013-06-12 07:46:30) > On Tuesday 11 June 2013, Lee Jones wrote: > > This patch enables clocks to be specified from Device Tree via phandles > > to the "prcc-kernel-clock" node. > > > > Cc: Mike Turquette > > Cc: Ulf Hansson >

Re: [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control

Quoting Paul Walmsley (2013-06-17 13:22:48) > Hi, > > On Sat, 15 Jun 2013, Mike Turquette wrote: > > > These patches appear fine to me but I did not see any Acks, nor could I > > tell if a v2 was necessary based on the comments. Will there be another > > versio

[PATCH v2 0/5] clk: dt: bindings for mux, divider & gate clocks

on patches posted recently. Heiko, enough changed here such that I did not keep your Acked-by's and Tested-by's. But I am happy to take them again :-) Mike Turquette (5): clk: divider: replace bitfield width with mask clk: of: helper for determining number of parent clocks clk: d

[PATCH v2 5/5] clk: dt: binding for basic gate clock

://article.gmane.org/gmane.linux.documentation/5679 [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137878.html Signed-off-by: Mike Turquette --- No change since v1, new patch .../devicetree/bindings/clock/gate-clock.txt | 34 ++ drivers/clk/clk-gate.c

[PATCH v2 2/5] clk: of: helper for determining number of parent clocks

Walks the "clocks" array of parent clock phandles and returns the number. Signed-off-by: Mike Turquette --- No change since v1 drivers/clk/clk.c| 6 ++ include/linux/clk-provider.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/c

[PATCH v2 1/5] clk: divider: replace bitfield width with mask

Signed-off-by: Mike Turquette --- No change since v1, new patch arch/arm/mach-imx/clk-busy.c | 2 +- drivers/clk/clk-divider.c| 31 +++ drivers/clk/mxs/clk-div.c| 2 +- include/linux/clk-private.h | 2 +- include/linux/clk-provider.h | 2 +- 5 files changed

[PATCH v2 3/5] clk: dt: binding for basic multiplexer clock

style. Signed-off-by: Mike Turquette --- Changes since v1: * pass shift value into clk_register_mux_table * s/multiplexor/multiplexer/ * removed debug prints * mask is u32, shift is u8 * DT property names use dashes instead of underscores * DT property names are more verbose * shift property is

[PATCH v2 4/5] clk: dt: binding for basic divider clock

Devicetree binding for the basic clock divider, plus the setup function to register the clock. Based on the existing fixed-clock binding. Signed-off-by: Mike Turquette --- Changes since v1: * mask is u32, shift is u8 * use bit mask instead of bitfield width * DT property names use dashes

[GIT PULL] clk: fixes for 3.10-rc7

The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e: Linux 3.10-rc4 (2013-06-02 17:11:17 +0900) are available in the git repository at: git://git.linaro.org/people/mturquette/linux.git tags/clk-fixes-for-linus for you to fetch changes up to ff49fad1d9bf2c49f52817b04c

Re: [PATCH V4 1/4] ARM: tegra30: clocks: Fix pciex clock registration

Quoting Stephen Warren (2013-06-12 08:36:11) > On 06/12/2013 01:13 AM, Jay Agarwal wrote: > > Registering pciex as peripheral clock instead of fixed clock > > as tegra_perih_reset_assert(deassert) api of this clock api > > gives warning and ultimately does not succeed to assert(deassert) > > > > S

Re: [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control

Quoting Paul Walmsley (2013-06-11 02:47:13) > On Tue, 11 Jun 2013, Prashant Gaikwad wrote: > > > Why not implement these APIs in DFLL clock driver itself and pass RST > > address > > register to driver? > > The DFLL DVCO reset registers are CAR registers, not DFLL registers. > Functions that o

Re: [PATCH RFC 3/3] clk: dt: binding for basic divider clock

Quoting Heiko Stübner (2013-06-03 15:18:32) > Am Montag, 3. Juni 2013, 19:53:10 schrieb Mike Turquette: > > Devicetree binding for the basic clock divider, plus the setup function > > to register the clock. Based on the existing fixed-clock binding. > > > > Si

Re: [PATCH v4 5/5] clk: clk-mux: implement remuxing on set_rate

On Wed, Jun 12, 2013 at 10:55 AM, Doug Anderson wrote: > Mike, > > On Wed, Jun 12, 2013 at 10:45 AM, Mike Turquette > wrote: > >>> * It seems like we can't make muxing decisions on the SoC level. >>> * Your automatic muxing patches don't hurt me and c

Re: [PATCH v4 5/5] clk: clk-mux: implement remuxing on set_rate

Quoting Doug Anderson (2013-06-11 18:01:01) > Hi, > > Mike pointed me at this series since I'm running into parenting > problems at the moment as well... > > On Mon, May 20, 2013 at 9:44 PM, Saravana Kannan > wrote: > > While writing a similar code for our internal tree, I quickly came to the >

Re: [PATCH] clk: exynos5250: Add CLK_IGNORE_UNUSED flag for pmu clock

Quoting Tushar Behera (2013-06-06 01:28:18) > Currently 'pmu' clock is not handled by any of the drivers. > Also before the introduction of CCF, this clock was not defined, > hence was left enabled always. > > When this clock is disabled, software reset register becomes > inaccessible and system r

Re: [PATCH 0/2] Fix some uses of clk->rate

Quoting Peter De Schrijver (2013-06-05 08:06:34) > Using clk->rate directly does not take the CLK_GET_RATE_NOCACHE flag into > account. This can cause wrong results if the flag is set. > > Peter De Schrijver (2): > clk: use clk_get_rate() for debugfs > clk: honor CLK_GET_RATE_NOCACHE in clk_se

Re: [PATCH v2 0/4] Override bits for PLLM

Quoting Peter De Schrijver (2013-06-06 03:47:27) > PLLM has override bits on Tegra30 and Tegra114. This patchset implements > support for them for both Tegra30 and Tegra114. > > Changes since v1: > * Remove some stray lines from 'clk: tegra: override bits for Tegra114 PLLM' Pulled into clk-next.

Re: [PATCH] clk: tegra: fix sclk_parents

Quoting Peter De Schrijver (2013-06-05 07:29:28) > Use the correct parents for sclk according to the TRM. > > Signed-off-by: Peter De Schrijver Taken into clk-next. Regards, Mike > --- > drivers/clk/tegra/clk-tegra114.c |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff -

Re: [PATCH] clk: tegra: fix pllre initilization

Quoting Peter De Schrijver (2013-06-05 07:21:46) > The PLLRE flags weren't set correctly. Fixed in this patch. > > Signed-off-by: Peter De Schrijver Taken into clk-next. Thanks, Mike > --- > drivers/clk/tegra/clk-pll.c |3 +-- > 1 files changed, 1 insertions(+), 2 deletions(-) > > diff -

Re: [PATCH 0/2] PLL m,n,p init from SoC files

Quoting Peter De Schrijver (2013-06-05 06:51:24) > The m,n,p fields don't have the same bit offset and width across all PLLs. > This patchset allows SoC specific files to indicate the offset and width. > It also provides the data for Tegra114. > Taken into clk-next. Thanks, Mike > Peter De Schr

Re: [PATCH] clk: tegra: pllp_out2 divider is int only

Quoting Peter De Schrijver (2013-06-05 06:37:17) > The pllp_out2 should be integer only, the fractional bit should always be 0. > > Signed-off-by: Peter De Schrijver Taken into clk-next. Thanks, Mike > --- > drivers/clk/tegra/clk-tegra114.c |4 ++-- > 1 files changed, 2 insertions(+), 2 d

Re: [PATCH] clk: tegra: pllc and pllxc should use pdiv_map

Quoting Peter De Schrijver (2013-06-05 05:56:41) > The pllc and pllxc code weren't always using the correct pdiv_map to > map between the post divider value and the hw p field. This could result > in illegal values being programmed in the hw. > > Signed-off-by: Peter De Schrijver Taken into clk-

Re: [PATCH 12/12] ARM: msm: Migrate to common clock framework

able. > > Cc: Saravana Kannan > Cc: Mike Turquette > Signed-off-by: Stephen Boyd I just went through this quickly and nothing popped out at me. Nice diffstat btw! Do you have any plans to move this to drivers/clk/msm ? Acked-by: Mike Turquette > --- > arch/arm/Kconfig

Re: [PATCH V3 1/4] ARM: tegra30: clocks: Fix pciex clock registration

Quoting Stephen Warren (2013-06-04 12:08:08) > On 06/04/2013 12:57 PM, Jay Agarwal wrote: > > Registering pciex as peripheral clock instead of fixed clock > > as tegra_perih_reset_assert(deassert) api of this clock api > > gives warning and ultimately does not succeed to assert(deassert). > > > >

Re: [PATCH 21/21] clk: ux500: Supply provider look-up functionality to support Device Tree

Quoting Arnd Bergmann (2013-06-04 13:52:03) > On Tuesday 04 June 2013, Linus Walleij wrote: > > The whole thing is very different from other DT clock things > > I've seen, usually you add a compatible node for each > > clock type, and a node for each physical gate. But there > > may be several ways

Re: [PATCH v3 5/7] clk: add basic Rockchip rk3066a clock support

Quoting Heiko Stübner (2013-06-11 04:31:31) > This adds basic support for clocks on Rockchip rk3066 SoCs. > The clock handling thru small dt nodes is heavily inspired by the > sunxi clk code. > > The plls are currently read-only, as their setting needs more > investigation. This also results in sl

Re: [PATCH v3 1/7] clk: divider: add flag to limit possible dividers to even numbers

Quoting Heiko Stübner (2013-06-11 04:29:32) > SoCs like the Rockchip Cortex-A9 ones contain divider some clocks > that use the regular mechanisms for storage but allow only even > dividers and 1 to be used. > > Therefore add a flag that lets _is_valid_div limit the valid dividers > to these values

Re: RE: [PATCH] clk: samsung: Fix pll36xx_recalc_rate to handle kdiv properly

Quoting Kukjin Kim (2013-06-05 04:51:29) > Doug Anderson wrote: > > > > The KDIV value is often listed as unsigned but it needs to be treated > > as a 16-bit signed value when using it in calculations. Fix our rate > > recalculation to do this correctly. > > > > Before doing this, I tried settin

Re: [PATCH] clk: remove the clk_notifier from clk_notifier_list before free it (was: Re: [BUG] zynq | CCF | SRCU)

Quoting Lai Jiangshan (2013-06-03 02:17:15) > The @cn is stay in @clk_notifier_list after it is freed, it cause > memory corruption. > > Example, if @clk is registered(first), unregistered(first), > registered(second), unregistered(second). > > The freed @cn will be used when @clk is registered(s

Re: [PATCH RFC 3/3] clk: dt: binding for basic divider clock

Quoting Matt Sealey (2013-06-04 10:39:53) > On Tue, Jun 4, 2013 at 12:11 PM, Stephen Boyd wrote: > > On 06/03/13 10:53, Mike Turquette wrote: > >> +Required properties: > >> +- compatible : shall be "divider-clock". > >> +- #clock-cells

Re: [Patch 1/3] clk: fix clk_mux_get_parent return's signed value

On Mon, Jun 3, 2013 at 11:27 PM, Ambresh K wrote: > >> >> clksel is an omap-centric term. How about: >> >> "clk_mux_get_parent should return an error if the value read from the >> register is erroneous." >> > > Make sense, will fix it. > >> The general approach looks good to me. Can you submit a

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