Hi Zhang,
zhang_shur...@foxmail.com wrote on Sat, 2 Dec 2023 22:58:52 +0800:
> The syzkaller reported an issue:
Subject should start with [PATCH wpan]
>
> BUG: KMSAN: uninit-value in ieee802154_hdr_push_sechdr
> net/ieee802154/header_ops.c:54 [inline]
> BUG: KMSAN: uninit-value in
Hi Dinghao,
dinghao@zju.edu.cn wrote on Tue, 26 Sep 2023 11:22:44 +0800:
> If of_clk_add_provider() fails in ca8210_register_ext_clock(),
> it calls clk_unregister() to release priv->clk and returns an
> error. However, the caller ca8210_probe() then calls ca8210_remove(),
> where priv->clk
Hi Dinghao,
dinghao@zju.edu.cn wrote on Mon, 25 Sep 2023 15:24:22 +0800:
> If of_clk_add_provider() fails in ca8210_register_ext_clock(),
> it calls clk_unregister() to release priv->clk and returns an
> error. However, the caller ca8210_probe() then calls ca8210_remove(),
> where priv->clk
Hi Dan,
Dan Carpenter wrote on Sat, 17 Apr 2021
13:24:26 +0300:
> On Fri, Apr 16, 2021 at 05:00:40PM +0200, Miquel Raynal wrote:
> > Hi Dan,
> >
> > Dan Carpenter wrote on Wed, 14 Apr 2021
> > 08:56:33 +0300:
> >
> > > We should return an error c
Hi Tudor,
Tudor Ambarus wrote on Sat, 3 Apr 2021
09:09:31 +0300:
> The write buffer comes from user and should be const.
> Constify write buffer in mtd core and across all _write_user_prot_reg()
> users. cfi_cmdset_{0001, 0002} and onenand_base will pay the cost of an
> explicit cast to discard
Hi Dan,
Dan Carpenter wrote on Wed, 14 Apr 2021
08:56:33 +0300:
> We should return an error code if the timing mode is not acknowledged
> by the NAND chip.
This truly is questionable (and I am not yet decided whether the answer
should be yes or no).
Returning an error here would produce the
Hi Daniel,
Daniel Palmer wrote on Wed, 7 Apr 2021 21:01:01 +0900:
> Hi Miquel,
>
> On Wed, 7 Apr 2021 at 17:02, Miquel Raynal wrote:
> > You may look at micron_8_ecc_get_status() helper to guide you. But
> > IMHO, if there are 0-3 bf, you should probably assume there wer
Hi Yu,
Yu Kuai wrote on Thu, 8 Apr 2021 21:38:12 +0800:
> Return a negative error code from the error handling case instead
> of 0, as done elsewhere in this function.
>
> Reported-by: Hulk Robot
> Signed-off-by: Yu Kuai
> ---
> drivers/mtd/devices/phram.c | 1 +
> 1 file changed, 1
Hi Yu,
Yu Kuai wrote on Thu, 8 Apr 2021 19:15:14 +0800:
> Fix to return a negative error code from the error handling
> case instead of 0, as done elsewhere in this function.
>
> Reported-by: Hulk Robot
> Signed-off-by: Yu Kuai
> ---
> drivers/mtd/devices/phram.c | 1 +
> 1 file changed, 1
Hello,
Michael Walle wrote on Thu, 08 Apr 2021 08:55:42
+0200:
> Hi Tudor,
>
> Am 2021-04-08 07:51, schrieb tudor.amba...@microchip.com:
> > Would you please resend this patch, together with the mtd-utils
> > and the SPI NOR patch in a single patch set? You'll help us all
> > having all in a
On Fri, 2021-04-02 at 15:01:25 UTC, Manivannan Sadhasivam wrote:
> Convert Qcom NANDc devicetree binding to YAML.
>
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Rob Herring
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
Miquel
On Fri, 2021-04-02 at 15:01:26 UTC, Manivannan Sadhasivam wrote:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element like
> Trustzone. So
On Fri, 2021-04-02 at 15:01:27 UTC, Manivannan Sadhasivam wrote:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element like
> Trustzone. So
On Fri, 2021-04-02 at 15:01:28 UTC, Manivannan Sadhasivam wrote:
> Add missing nand_cleanup() in the alloc_bam_transaction() error path
> to cleanup the resources properly.
>
> Signed-off-by: Manivannan Sadhasivam
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
On Mon, 2021-04-05 at 05:09:12 UTC, Manivannan Sadhasivam wrote:
> dma_mapping_error() should be used for checking the error value of
> dma_map_resource() API.
>
> Signed-off-by: Manivannan Sadhasivam
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
On Sat, 2021-04-03 at 06:09:05 UTC, Lv Yunlong wrote:
> If the callee gpmi_alloc_dma_buffer() failed to alloc memory for
> this->raw_buffer, gpmi_free_dma_buffer() will be called to free
> this->auxiliary_virt. But this->auxiliary_virt is still a non-NULL
> and valid ptr.
>
> Then
Hi Yoshio,
Yoshio Furuyama wrote on Tue, 6 Apr
2021 10:47:26 +0900:
Could you add "mtd: nand: bbt:" as prefix for the title (same for the
other patch, even though you're not the original author).
> In the unlikely event of bad block,
> it should update its block status to BBT,
> In this
Hi Daniel,
Daniel Palmer wrote on Fri, 26 Mar 2021 23:09:28
+0900:
> Hi Miquel,
>
> Sorry for the constant pestering on this..
>
> On Tue, 23 Mar 2021 at 23:06, Miquel Raynal wrote:
> > > # nandbiterrs -i /dev/mtd1
> > > incremental biterrors test
> >
On Thu, 2021-03-25 at 10:23:37 UTC, Stefan Riedmueller wrote:
> The blocks containing the bad block table can become bad as well. So
> make sure to skip any blocks that are marked bad when searching for the
> bad block table.
>
> Otherwise in very rare cases where two BBT blocks wear out it might
On Wed, 2021-03-03 at 15:57:35 UTC, Michael Walle wrote:
> MEMLOCK, MEMUNLOCK and OTPLOCK modify protection bits. Thus require
> write permission. Depending on the hardware MEMLOCK might even be
> write-once, e.g. for SPI-NOR flashes with their WP# tied to GND. OTPLOCK
> is always write-once.
>
>
On Fri, 2021-03-12 at 06:28:19 UTC, Ansuel Smith wrote:
> Partitions that contains the nvmem-cells compatible will register
> their direct subonodes as nvmem cells and the node will be treated as a
> nvmem provider.
>
> Signed-off-by: Ansuel Smith
> Tested-by: Rafał Miłecki
Applied to
On Fri, 2021-03-12 at 06:28:20 UTC, Ansuel Smith wrote:
> Drop $nodename restriction as now mtd partition can also be used as
> nvmem provider.
>
> Signed-off-by: Ansuel Smith
> Reviewed-by: Rob Herring
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
mtd/next, thanks.
On Fri, 2021-03-12 at 06:28:21 UTC, Ansuel Smith wrote:
> Document nvmem-cells compatible used to treat mtd partitions as a
> nvmem provider.
>
> Signed-off-by: Ansuel Smith
> Reviewed-by: Rob Herring
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
mtd/next, thanks.
On Tue, 2021-03-23 at 03:17:37 UTC, Wan Jiabing wrote:
> linux/mtd/nand.h has been included at line 17.
> So we remove the duplicate one at line 21.
>
> Signed-off-by: Wan Jiabing
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
mtd/next, thanks.
Miquel
On Mon, 2021-03-22 at 15:07:14 UTC, Tudor Ambarus wrote:
> From: "Kai Stuhlemmer (ebee Engineering)"
>
> Update MTD ECC statistics with the number of corrected bits.
>
> Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Kai
On Thu, 2021-03-11 at 17:09:08 UTC, Kamal Dasu wrote:
> Added support to read/write oob during EDU transfers.
>
> Signed-off-by: Kamal Dasu
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
Miquel
On Thu, 2021-03-11 at 17:09:09 UTC, Kamal Dasu wrote:
> This change makes sure that Broadcom NAND driver moves to interrupt
> polling on the first brcmnand_write() call.
>
> Signed-off-by: Kamal Dasu
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
On Sat, 2021-03-13 at 10:57:02 UTC, menglong8.d...@gmail.com wrote:
> From: Zhang Yunkai
>
> 'linux/mtd/nand.h' included in 'rawnand.h' is duplicated.
> It is also included in the 17th line.
>
> Signed-off-by: Zhang Yunkai
Applied to
On Tue, 2021-03-23 at 13:11:37 UTC, Zou Wei wrote:
> Suppresses the following coccinelle warning:
>
> drivers/mtd/nand/raw/rockchip-nand-controller.c:162:4-8: WARNING use
> flexible-array member instead
>
> Signed-off-by: Zou Wei
Applied to
On Tue, 2021-03-23 at 17:37:19 UTC, Alexander Lobakin wrote:
> The module misses MODULE_DEVICE_TABLE() for both SPI and OF ID tables
> and thus never autoloads on ID matches.
> Add the missing declarations.
> Present since day-0 of spinand framework introduction.
>
> Fixes: 7529df465248 ("mtd:
Hi Manivannan,
Manivannan Sadhasivam wrote on Tue,
23 Mar 2021 13:09:30 +0530:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element
Hi Daniel,
Daniel Palmer wrote on Tue, 23 Mar 2021 20:47:10
+0900:
> Hi Miquel,
>
> On Tue, 23 Mar 2021 at 19:32, Miquel Raynal wrote:
> > You can run nandbiterrs -i /dev/mtdX
> >
> > You'll see if there is ECC correction or not (and its level).
>
>
Hi Daniel,
Daniel Palmer wrote on Tue, 23 Mar 2021 18:33:54
+0900:
> Hi Miquel,
>
> On Tue, 23 Mar 2021 at 03:32, Miquel Raynal wrote:
> > > I think this shows that the datasheet is right in that the complete 64
> > > bytes of "spare area" is usable.
>
Hi Daniel,
Daniel Palmer wrote on Mon, 22 Mar 2021 21:44:40
+0900:
> Hi Miquel,
>
> Sorry for the resend. Gmail randomly switched to HTML email so the
> original version seems to have bounced.
>
> On Mon, 15 Feb 2021 at 20:16, Miquel Raynal wrote:
> > > "2
Hi Yoshio,
+ Patrick
Yoshio Furuyama wrote on Tue, 16 Feb
2021 09:37:55 +0900:
> Fixed issue of manages BBT (Bad Block Table).
> It didn't mark correctly when a specific block was bad block.
>
> This issue occurs when the bad block mark (3-bit chunk) is
> crosses over 32 bit (e.g. Block10,
Hi Manivannan,
Manivannan Sadhasivam wrote on Wed,
17 Mar 2021 17:55:10 +0530:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element
Rob Herring wrote on Thu, 11 Mar 2021 16:40:56 -0700:
> The example for the Silvaco I3C master doesn't match the schema's
> compatible string. Fix it.
>
> Cc: Miquel Raynal
> Cc: Conor Culhane
> Cc: Alexandre Belloni
> Cc: linux-...@lists.infradead.org
> Si
On Thu, 2021-03-04 at 06:46:00 UTC, 'Wei Yongjun wrote:
> From: Wei Yongjun
>
> The sparse tool complains as follows:
>
> drivers/mtd/parsers/ofpart_core.c:25:32: warning:
> symbol 'bcm4908_partitions_quirks' was not declared. Should it be static?
>
> This symbol is not used outside of
On Fri, 2021-03-05 at 08:23:56 UTC, "Gustavo A. R. Silva" wrote:
> In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
> by explicitly adding a break statement instead of letting the code fall
> through to the next case.
>
> Link: https://github.com/KSPP/linux/issues/115
>
On Fri, 2021-03-05 at 08:25:59 UTC, "Gustavo A. R. Silva" wrote:
> In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
> by explicitly adding a break statement instead of letting the code fall
> through to the next case.
>
> Link: https://github.com/KSPP/linux/issues/115
>
On Mon, 2021-03-08 at 03:44:46 UTC, Jia-Ju Bai wrote:
> When platform_get_drvdata() returns NULL to info, no error return code
> of physmap_flash_remove() is assigned.
> To fix this bug, err is assigned with -EINVAL in this case
>
> Fixes: 73566edf9b91 ("[MTD] Convert physmap to platform driver")
On Fri, 2021-03-05 at 08:19:33 UTC, "Gustavo A. R. Silva" wrote:
> In preparation to enable -Wimplicit-fallthrough for Clang, fix multiple
> warnings by explicitly adding multiple break statements and a return
> instead of letting the code fall through to the next case.
>
> Link:
On Fri, 2021-03-05 at 08:22:24 UTC, "Gustavo A. R. Silva" wrote:
> In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
> by explicitly adding a break statement instead of letting the code fall
> through to the next case.
>
> Link: https://github.com/KSPP/linux/issues/115
>
On Fri, 2021-03-05 at 08:29:53 UTC, "Gustavo A. R. Silva" wrote:
> In preparation to enable -Wimplicit-fallthrough for Clang, fix a couple
> of warnings by explicitly adding a couple of break statements instead
> of letting the code fall through to the next case.
>
> Link:
For example, mtd_write() expects to be called in a non-atomic
> context and may take a mutex.
>
> Signed-off-by: John Ogness
> Reviewed-by: Petr Mladek
Reviewed-by: Miquel Raynal
Thanks,
Miquèl
Hello,
Dan Carpenter wrote on Wed, 3 Mar 2021
08:49:18 +0300:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 7a7fd0de4a9804299793e564a555a49c1fc924cb
> commit: 803eb124e1a64e42888542c3444bfe6dac412c7f mtd: parsers: Add Qcom SMEM
> parser
>
Hi Colin,
Colin King wrote on Wed, 3 Mar 2021
09:42:46 +:
> From: Colin Ian King
>
> The less than zero comparison with status is always false because status
> is a u8. Fix this by using ret as the return check for the call to
> chip->legacy.waitfunc() and checking on this and assigning
Hi Manivannan,
Manivannan Sadhasivam wrote on Tue,
2 Mar 2021 18:57:55 +0530:
> Hello,
>
> These two patches aims at fixing the -EPROBE_DEFER handling in the MTD
> core and also in the Qcom nand driver. The "qcomsmem" parser depends on
> the QCOM_SMEM driver to parse the partitions defined in
On Sat, 2021-02-13 at 16:45:54 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Tue, 2021-02-23 at 19:39:00 UTC, Md Sadre Alam wrote:
> Create a nandc_set_read_loc() helper to abstract the
> configuration of the location register.
>
> QPIC v2 onwards features a separate location register
> for the last codeword, so introducing this extra helper
> which will simplify the
On Mon, 2021-02-15 at 15:58:49 UTC, Dan Carpenter wrote:
> If dma_request_channel() fails then the probe fails and it should
> return a negative error code, but currently it returns success.
>
> fixes: 4774fb0a48aa ("mtd: nand/fsmc: Add DMA support")
> Signed-off-by: Dan Carpenter
Applied to
On Sat, 2021-02-13 at 16:45:53 UTC, Dejin Zheng wrote:
> This patch introduces the module_mtd_blktrans macro which is a convenience
> macro for mtd blktrans modules similar to module_platform_driver.
> It is intended to be used by drivers which init/exit section does nothing
> but
On Fri, 2021-02-12 at 10:40:22 UTC, "Gustavo A. R. Silva" wrote:
> Cast to (char *) in order to avoid unintentionally accessing
> the stack.
>
> Notice that data is of type u32, so any increment to
> will be in the order of 4-byte chunks, and this piece of code
> is actually intended to be a
On Thu, 2021-02-25 at 14:33:29 UTC, Tomas Winkler wrote:
> The bdi name is not modified by the function, it should be const.
>
> Signed-off-by: Tomas Winkler
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
mtd/next, thanks.
Miquel
On Wed, 2021-02-17 at 21:18:45 UTC, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin
>
> Get rid of central chrdev MTD lock, which prevents simultaneous operations
> on completely independent physical MTD chips. Replace it with newly
> introduced per-master mutex.
>
> Signed-off-by:
On Sat, 2021-02-13 at 16:45:55 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Sat, 2021-02-13 at 16:45:58 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Sat, 2021-02-13 at 16:45:56 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Sat, 2021-02-13 at 16:45:59 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Sat, 2021-02-13 at 16:46:00 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Sat, 2021-02-13 at 16:45:57 UTC, Dejin Zheng wrote:
> Removing some boilerplate by using module_mtd_blktrans instead of calling
> register and unregister in the otherwise empty init/exit functions.
>
> Signed-off-by: Dejin Zheng
Applied to
On Wed, 2021-02-17 at 21:18:44 UTC, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin
>
> It looks unnecessary in the function, remove it from the function
> having in mind to remove it completely.
>
> Signed-off-by: Alexander Sverdlin
Applied to
Hi Daniel,
Daniel Lezcano wrote on Tue, 2 Mar 2021
18:03:12 +0100:
> On 02/03/2021 17:31, Miquel Raynal wrote:
> > On Wed, 2021-02-24 at 14:42:18 UTC, Daniel Lezcano wrote:
> >> HZ unit conversion macros are available in units.h, use them and
> >> remo
On Wed, 2021-02-24 at 14:42:18 UTC, Daniel Lezcano wrote:
> HZ unit conversion macros are available in units.h, use them and
> remove the duplicate definition.
>
> Signed-off-by: Daniel Lezcano
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
Miquel
On Wed, 2021-02-24 at 08:02:10 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
> always be done without ECC enabled.
> This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2
> clenmarkers are
On Sat, 2021-01-30 at 20:07:16 UTC, Md Sadre Alam wrote:
> This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> Since this register was only available in QPIC version 1.4.20 ipq40xx
> and it was not used. In QPIC version 1.5 on wards this register got
> removed.In QPIC version
On Tue, 2021-02-23 at 19:38:59 UTC, Md Sadre Alam wrote:
> Rename the parameters of the nandc_set_read_loc() macro
> to avoid the confusion between is_last_read_loc which
> is last location in a read code word and last_cw which
> is last code word of a page data.
>
> Signed-off-by: Md Sadre Alam
On Tue, 2021-02-23 at 19:38:58 UTC, Md Sadre Alam wrote:
> Add the qcom_nandc_is_last_cw() helper which checks if
> the input cw index is the last one or not.
>
> Signed-off-by: Md Sadre Alam
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
Miquel
On Tue, 2021-02-23 at 19:38:57 UTC, Md Sadre Alam wrote:
> This change will convert nandc to chip in Read/Write helper, this
> change is needed because if we wnated to access number of steps
> in Read/Write helper then we need to get the chip->ecc.steps,
> currentlly its not possible.After this
svc_i3c_master *master,
> cmd->in = NULL;
> cmd->out = >id;
> cmd->len = 1;
> - cmd->read_len = xfer_len;
> cmd->read_len = 0;
> cmd->continued = true;
>
Reviewed-by: Miquel Raynal
Thanks,
Miquèl
Hi Michael,
Michael Walle wrote on Tue, 2 Mar 2021 12:09:27
+0100:
> This may sound like a contradiction but some SPI-NOR flashes really
> support erasing their OTP region until it is finally locked. Having the
> possibility to erase an OTP region might come in handy during
> development.
>
>
Hi Álvaro,
Álvaro Fernández Rojas wrote on Thu, 25 Feb 2021
08:54:09 +0100:
> Hi Miquel,
>
> > El 25 feb 2021, a las 8:48, Miquel Raynal
> > escribió:
> >
> > Hi Álvaro,
> >
> > Brian Norris wrote on Wed, 24 Feb 2021
> > 13:01:13 -0800:
>
Hi Álvaro,
Brian Norris wrote on Wed, 24 Feb 2021
13:01:13 -0800:
> On Wed, Feb 24, 2021 at 12:02 AM Álvaro Fernández Rojas
> wrote:
> > Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB
> > NAND controller")
>
> FWIW, I could believe this was broken. We weren't
Hi Manivannan,
Manivannan Sadhasivam wrote on Thu,
25 Feb 2021 09:41:29 +0530:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element
Hello,
mda...@codeaurora.org wrote on Wed, 24 Feb 2021 22:00:05 +0530:
> On 2021-02-24 12:18, Miquel Raynal wrote:
> > Hello,
> >
> > mda...@codeaurora.org wrote on Wed, 24 Feb 2021 10:09:48 +0530:
> >
> >> On 2021-02-24 01:13, mda...@codeaurora.org
Hi Álvaro,
Álvaro Fernández Rojas wrote on Wed, 24 Feb 2021
08:16:58 +0100:
> Hi Florian,
>
> > El 24 feb 2021, a las 4:46, Florian Fainelli
> > escribió:
> >
> >
> >
> > On 2/22/2021 12:16 PM, Álvaro Fernández Rojas wrote:
> >> Hamming ECC doesn't cover the OOB data, so reading or
Hello,
mda...@codeaurora.org wrote on Wed, 24 Feb 2021 10:09:48 +0530:
> On 2021-02-24 01:13, mda...@codeaurora.org wrote:
> > On 2021-02-23 22:04, Miquel Raynal wrote:
> >> Hello,
> >> >> Md Sadre Alam wrote on Tue, 23 Feb 2021
> >> 01:34:
Hi Manivannan,
Manivannan Sadhasivam wrote on Tue,
23 Feb 2021 23:15:46 +0530:
> Hi Miquel,
>
> On Tue, Feb 23, 2021 at 05:49:22PM +0100, Miquel Raynal wrote:
> > Hi Manivannan,
> >
> > Manivannan Sadhasivam wrote on Mon,
> > 22 Feb 2021 17:32:58 +0530:
>
Hi Manivannan,
Manivannan Sadhasivam wrote on Mon,
22 Feb 2021 17:32:58 +0530:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element
Hello,
Md Sadre Alam wrote on Tue, 23 Feb 2021
01:34:27 +0530:
> From QPIC version 2.0 onwards new register got added to read last
a new
> codeword. This change will add the READ_LOCATION_LAST_CW_n register.
Add support for this
Hello,
Md Sadre Alam wrote on Mon, 22 Feb 2021
20:35:43 +0530:
> This change will add helper nandc_set_read_loc() to configure
> location register value. QPIC V2 on wards there is separate
> location register to read the last code word. This helper
> will use to configure location register for
Hello,
Md Sadre Alam wrote on Mon, 22 Feb 2021
13:05:42 +0530:
> This change will rename parameter name in macro
> nandc_set_read_loc().renamed parameter names are
> cw_offset, read_size, is_last_read_loc.
> Sinc in QPIC V2 on-wards there is separate location
> register to read last code word,
Hello,
Md Sadre Alam wrote on Mon, 22 Feb 2021
11:54:55 +0530:
> This change will add helper qcom_nandc_is_last_cw()
Use the imperative form, something like:
"
Add the qcom_nandc_is_last_cw() helper which checks if the input cw
index is the last one or not.
"
> which will check for last code
Hello,
Md Sadre Alam wrote on Mon, 22 Feb 2021
01:55:01 +0530:
> This change will convert nandc to chip in Read/Write helper, this
> change is needed because if we wnated to access number of steps
> in Read/Write helper then we need to get the chip->ecc.steps,
> currentlly its not
Hello,
> >> >> +/* helper to configure location register values */
> >> +static void nandc_set_read_loc(struct nand_chip *chip, int cw, int >> reg,
> >> + int offset, int size, int is_last)
> >
> > You know cw, you have access to chip->ecc.steps, so you can derive by
Hello,
Md Sadre Alam wrote on Tue, 16 Feb 2021
00:46:42 +0530:
> From QPIC version 2.0 onwards new register got added to
> read last codeword. This change will add the READ_LOCATION_LAST_CW_n
> register.
>
> For first three code word READ_LOCATION_n register will be
> use.For last code word
Hi Daniel,
Daniel Palmer wrote on Mon, 15 Feb 2021 19:53:13
+0900:
> Hi Miquel,
>
> On Mon, 15 Feb 2021 at 19:24, Miquel Raynal wrote:
> >
> > Can you please add a changelog here when you send a new version of a
> > patch?
>
> Sorry, I was going to add a co
Hi Daniel,
Daniel Palmer wrote on Sat, 13 Feb 2021 18:57:24
+0900:
> Add support for the Foresee FS35ND01G-S1Y2 manufactured by Longsys.
>
> Signed-off-by: Daniel Palmer
>
> Link:
> https://datasheet.lcsc.com/szlcsc/2008121142_FORESEE-FS35ND01G-S1Y2QWFI000_C719495.pdf
> ---
Can you please
Hello,
Md Sadre Alam wrote on Mon, 15 Feb 2021
02:47:31 +0530:
> From QPIC version 2.0 onwards new register got added to
> read last codeword. This change will add the READ_LOCATION_LAST_CW_n
> register.
>
> For first three code word READ_LOCATION_n register will be
> use.For last code word
Hi Gustavo,
"Gustavo A. R. Silva" wrote on Fri, 12 Feb
2021 08:45:33 -0600:
> On 2/12/21 08:12, Miquel Raynal wrote:
> > Hi Gustavo,
> >
> > "Gustavo A. R. Silva" wrote on Fri, 12 Feb 2021
> > 04:40:22 -0600:
> >
> >>
Hi Gustavo,
"Gustavo A. R. Silva" wrote on Fri, 12 Feb 2021
04:40:22 -0600:
> Cast to (char *) in order to avoid unintentionally accessing
> the stack.
>
> Notice that data is of type u32, so any increment to
> will be in the order of 4-byte chunks, and this piece of code
> is actually
Hello,
mda...@codeaurora.org wrote on Fri, 12 Feb 2021 01:00:47 +0530:
> On 2021-02-11 19:37, Miquel Raynal wrote:
> > Hello,
> >
> > Manivannan Sadhasivam wrote on Wed,
> > 10 Feb 2021 14:31:44 +0530:
> >
> >> On Fri, Jan 29, 2021 at 03:09:19AM
Hello,
Manivannan Sadhasivam wrote on Wed,
10 Feb 2021 14:31:44 +0530:
> On Fri, Jan 29, 2021 at 03:09:19AM +0530, Md Sadre Alam wrote:
> > From QPIC version 2.0 onwards new register got added to
> > read last codeword. This change will add the READ_LOCATION_LAST_CW_n
> > register.
> >
> > For
Hi Richard,
Richard Weinberger wrote on Wed, 10 Feb 2021 12:23:53
+0100 (CET):
> Miquel,
>
> - Ursprüngliche Mail -
> >> Does in-band and OOB data need to be handled together?
> >
> > Short answer: yes.
> >
> >> If so, then two requests is not a good option.
> >
> > More
Hi Miklos,
Miklos Szeredi wrote on Wed, 10 Feb 2021 11:16:45
+0100:
> On Tue, Feb 9, 2021 at 10:39 PM Richard Weinberger wrote:
> >
> > Miklos,
> >
> > - Ursprüngliche Mail -
> > > If you look at fuse_do_ioctl() it does variable length input and
> > > output at the same time. I
Hello,
mda...@codeaurora.org wrote on Fri, 05 Feb 2021 23:26:33 +0530:
> On 2021-01-31 01:37, Md Sadre Alam wrote:
> > This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> > Since this register was only available in QPIC version 1.4.20 ipq40xx
> > and it was not used. In QPIC
Hi Bhaskar,
Bhaskar Chowdhury wrote on Fri, 5 Feb 2021
19:06:39 +0530:
> On 14:26 Fri 05 Feb 2021, Miquel Raynal wrote:
> >Hi Bhaskar,
> >
> >Bhaskar Chowdhury wrote on Fri, 5 Feb 2021
> >18:11:51 +0530:
> >
> >> s/fucking/invite/
>
Hi Bhaskar,
Bhaskar Chowdhury wrote on Fri, 5 Feb 2021
18:11:51 +0530:
> s/fucking/invite/
>
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/mtd/mtd_blkdevs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/mtd_blkdevs.c
cking buswidth in spi_mem_default_supports_op() to a separate
> function so the logic is not repeated twice.
>
> Signed-off-by: Pratyush Yadav
I am not a SPI-NOR expert but for what I know this approach looks good
to me. Let's see what other maintainers think.
Reviewed-by: Miquel Raynal
Thanks,
Miquèl
Hi Boris,
Boris Brezillon wrote on Thu, 4 Feb
2021 10:27:38 +0100:
> On Thu, 4 Feb 2021 10:04:08 +0100
> Miquel Raynal wrote:
>
> > Hi Boris,
> >
> > Boris Brezillon wrote on Thu, 4 Feb
> > 2021 09:59:45 +0100:
> >
> > > On Thu, 4 Feb
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