is registered with it.
This TinyDRM driver expects that a DCS-compliant protocol is used by the
DSI/DBI panel and can only be used with these.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/tiny/Kconfig| 8 +
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny
ble,unprepare} on module exit,
and various small fixes.
For a more detailed changelog, see the header of each individual patch.
Paul Cercueil (6):
dt-bindings: display: Document NewVision NV3052C DT node
drm: dsi: Let host and device specify supported bus
drm: Add SPI DBI host driver
dr
Le sam. 22 août 2020 à 3:29, Maciej W. Rozycki
a écrit :
Hi Paul,
> FAOD is not a hack, but an optimisation
measure
> so that features known to be hardwired for a given machine/CPU do
not have
> to be dynamically queried every time referred. In some cases
that results
> in large po
Hi Maciej,
Le ven. 21 août 2020 à 20:23, Maciej W. Rozycki
a écrit :
On Fri, 7 Aug 2020, Paul Cercueil wrote:
> I'm not too sure if remove "cpu-feature-overrides.h" will cause
some
> problems for X2000, because according to my current test on
X2000, I found
ver Verification project (linuxtesting.org).
Signed-off-by: Madhuparna Bhowmik
Reviewed-by: Paul Cercueil
Thanks for the patch.
Cheers,
-Paul
---
Changes since v1:
Keep enable clock before request IRQ.
---
drivers/dma/dma-jz4780.c | 38 +++---
1 file changed,
Add support for self-extracting kernels with a ZSTD compression.
Tested on a kernel for the GCW-Zero, it allows to reduce the size of the
kernel file from 4.1 MiB with gzip to 3.5 MiB with ZSTD, and boots just
as fast.
Signed-off-by: Paul Cercueil
---
arch/mips/Kconfig
everybody, in order to make it usable on 32-bit systems.
Signed-off-by: Paul Cercueil
---
lib/decompress_unzstd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/decompress_unzstd.c b/lib/decompress_unzstd.c
index 0ad2c15479ed..e1c03b1eaa6e 100644
--- a/lib/decompress_unzstd.c
Le jeu. 20 août 2020 à 20:23, Lars-Peter Clausen a
écrit :
On 8/20/20 1:59 PM, Paul Cercueil wrote:
Hi,
Le dim. 16 août 2020 à 12:52, madhuparnabhowmi...@gmail.com a
écrit :
From: Madhuparna Bhowmik
In probe IRQ is requested before zchan->id is initialized which can
be
read in
of invalidating full frames
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 108 +-
drivers/gpu/drm/ingenic/ingenic-drm.h | 4 +
drivers/gpu/drm/ingenic/ingenic-ipu.c | 12 ++-
3 files changed, 120 insertions(+), 4 deletions(-)
diff --gi
Hi Sam,
Le jeu. 20 août 2020 à 17:53, Sam Ravnborg a
écrit :
On Thu, Aug 20, 2020 at 02:12:55PM +0200, Paul Cercueil wrote:
The drm_panel_of_backlight() function must be called after
drm_panel_init(), according to the function's documentation;
otherwise
the backlight won't b
The drm_panel_of_backlight() function must be called after
drm_panel_init(), according to the function's documentation; otherwise
the backlight won't be properly initialized.
v2: New patch
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 6 +++---
1 fi
parate field in the driver's private structure.
Cheers,
-Paul
Paul Cercueil (2):
drm/panel: novatek,nt39016: Reorder calls in probe
drm/panel: novatek,nt39016: Remove 'dev' field in priv struct
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 16 +++-
1 file changed
There is already a 'struct device' pointer in the drm_panel structure,
that we can access easily from our priv structure, so there's no need
for a separate 'dev' field there.
v2: Don't initialize drm_panel->dev manually, it is done by
drm_panel_init().
Signed-of
Hi,
Le dim. 16 août 2020 à 12:52, madhuparnabhowmi...@gmail.com a écrit :
From: Madhuparna Bhowmik
In probe IRQ is requested before zchan->id is initialized which can be
read in the irq handler. Hence, shift request irq and enable clock
after
other initializations complete. Here, enable cloc
Hi Marc,
Le jeu. 20 août 2020 à 9:08, Marc Zyngier a écrit :
On 2020-08-19 19:06, Paul Cercueil wrote:
All the wakeup sources we possibly want will go through the interrupt
controller, so the parent IRQ must not be masked during suspend, or
there won't be any way to wake up the s
v field to be initialized.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c
b/drivers/gpu/drm/panel/panel-novatek-nt39016.c
index 39f7be679da5..
All the wakeup sources we possibly want will go through the interrupt
controller, so the parent IRQ must not be masked during suspend, or
there won't be any way to wake up the system.
Signed-off-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 2 +-
1 file changed, 1 insertion(
Le mer. 19 août 2020 à 17:35, Paul Cercueil a
écrit :
Hi Zhou,
Le mer. 19 août 2020 à 22:12, Zhou Yanjie
a écrit :
Hi Paul,
I have some good news and some bad news.
Good news is:
I tested this series of patches on CU1000-Neo & CU1830-Neo, and it
can boot normally and log i
0014 ac4f0004 ac580008 8d0a0014
[ 292.319053]
[ 292.320591] ---[ end trace 2a1f2afba7a08ca1 ]---
[ 292.325197] Kernel panic - not syncing: Fatal exception
[ 292.330409] Rebooting in 10 seconds..
these three kinds of message appear at random. Sometimes they will
appear at the begin
Le mer. 12 août 2020 à 12:15, Sergei Shtylyov
a écrit :
Hello!
On 12.08.2020 3:15, Paul Cercueil wrote:
The plat_get_fdt() checked that the kernel was booted using UHI
before
reading the 'fw_passed_dtb' variable. However, this variable is also
set
when the kernel has been ap
Support for Ingenic chips has been moved to the generic MIPS platform.
Update the paths accordingly.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 87d26c167c99
Support for Ingenic SoCs is now provided by the arch/mips/generic/ code,
so the arch/mips/jz4740/ folder can be completely dropped. The exception
is the Kconfig, which has been moved to arch/mips/ingenic/Kconfig in the
process.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch
For each board the MACH_INGENIC_SOC option was selected instead of
MACH_INGENIC. Nothing else was changed in the menuconfig.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Update cu1830-neo board config as well.
arch/mips/configs/ci20_defconfig | 4 ++--
arch/mips/configs/cu1000
n the command line;
- the code did not perform at all what it's supposed to, which is to
retrieve the parameters passed by the bootloader.
Fix this by calling fw_init_cmdline() in plat_mem_setup(), which will
properly initialize arcs_cmdline to the parameters passed by the
bootloader.
Signed-of
The plat_get_fdt() checked that the kernel was booted using UHI before
reading the 'fw_passed_dtb' variable. However, this variable is also set
when the kernel has been appended, or when it has been built into the
kernel.
Support these usecases by removing the UHI check.
Signed-of
Add support for Ingenic SoCs in arch/mips/generic/.
The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.
Signed-off-by: Paul Cercueil
There is no reason we can't create compressed kernels here, so select
the option SYS_SUPPORTS_ZBOOT.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch/mips/Kconfig | 1 +
arch/mips/generic/Platform | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/Kcon
eturned by the macro.
What we want to check here, is that *if* the macro was overridden to a
compile-time constant, then must be defined to zero, otherwise it's a
bug.
So the correct check is:
BUG_ON(__builtin_constant_p(cpu_has_counter) && cpu_has_counter);
Signed-off-by: Paul Cercue
for a SoC supported by the arch/mips/generic/ code, without
making that kernel generic itself.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch/mips/Kconfig | 8 ++--
arch/mips/generic/Kconfig | 2 +-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch
128 IRQs is not enough to support Ingenic SoCs.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch/mips/include/asm/mach-generic/irq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mach-generic/irq.h
b/arch/mips/include/asm/mach-generic
Check for the (already existing) "system_type" variable in the
get_system_type() function. If non-NULL, return it as the system type.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Instead of adding a .get_system_type callback to the mips_machine
struct, the boards now simpl
the board-ingenic.c has been modified accordingly.
- patch [06/13] is new, it makes sure that the kernel's command line is
initialized properly and includes the parameters passed by the
bootloader.
- the cu1830-neo board defconfig has now been regenerated in patch
[12/13].
Cheers,
-Paul
ly and removing the dependency on CONFIG_MACH_INGENIC.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch/mips/include/asm/pgtable-bits.h | 5 -
arch/mips/kernel/cpu-probe.c | 3 ++-
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/p
XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the header.
Add that information to cpu_probe_ingenic().
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
arch/mips/kernel/cpu-probe.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips
Le lun. 3 août 2020 à 19:01, Paul Cercueil a
écrit :
Call the machine's .get_system_type callback in the global
get_system_type() function, if it was provided by the mips_machine
implementation.
The get_system_type() function had to be moved within init.c to be
able
to use the s
Modify the video mode in order to obtain a perfect 60.00 Hz frame rate
using a 3 MHz pixel clock.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b
Add a perfect 50.00 Hz frame rate mode to the list of available modes
for the Sharp LS020B1DD01D panel.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm
panel, to
make it use 'struct drm_display_mode' instead of 'struct
display_timing', modify the timings to get a perfect 60.00 Hz rate, and
add a 50 Hz mode.
Cheers,
-Paul
Paul Cercueil (5):
drm/panel: novatek,nt39016: Handle backlight the standard way
drm/panel: novatek,n
Instead of manipulating the backlight directly in this driver, register
it in the probe using drm_panel_of_backlight() and let the drm_panel
framework code handle it.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 16
1 file changed, 4
Convert the Sharp LS020B1DD01D panel entry from using a struct
display_timing to using a struct drm_display_mode, as display_timing
seems to be the old and legacy format.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-simple.c | 28 +++-
1 file changed, 15
If you pass a string that is not terminated with a carriage return to
dev_err(), it will eventually be printed with a carriage return, but
not right away, since the kernel will wait for a pr_cont().
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/panel-novatek-nt39016.c | 18
invalid
context for hdrc glue")
Cc: sta...@vger.kernel.org # v4.9
Signed-off-by: Paul Cercueil
---
drivers/usb/musb/musb_core.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_cor
ngenic() doesn't read config4 (not
present on older SoCs) but that's trivial to add.
As for your other question, I don't see any reason why we wouldn't be
able to support the X2000 aside the others in a generic kernel, so
don't worry :)
Cheers,
-Paul
I have added
Signed-off-by: Dan Carpenter
Reviewed-by: Paul Cercueil
Thanks!
-Paul
---
drivers/memory/jz4780-nemc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/jz4780-nemc.c
b/drivers/memory/jz4780-nemc.c
index 3ec5cb0fce1e..608ae925e641 100644
--- a/driver
Support for Ingenic SoCs is now provided by the arch/mips/generic/ code,
so the arch/mips/jz4740/ folder can be completely dropped. The exception
is the Kconfig, which has been moved to arch/mips/ingenic/Kconfig in the
process.
Signed-off-by: Paul Cercueil
---
arch/mips/Kconfig
Add support for Ingenic SoCs in arch/mips/generic/.
The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.
Signed-off-by: Paul Cercueil
---
arch
For each board the MACH_INGENIC_SOC option was selected instead of
MACH_INGENIC. Nothing else was changed in the menuconfig.
Signed-off-by: Paul Cercueil
---
arch/mips/configs/ci20_defconfig | 4 ++--
arch/mips/configs/cu1000-neo_defconfig | 16 ++--
arch/mips/configs
Support for Ingenic chips has been moved to the generic MIPS platform.
Update the paths accordingly.
Signed-off-by: Paul Cercueil
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index bddc79ae76e6..1d89029cb89a 100644
--- a
XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the header.
Add that information to cpu_probe_ingenic().
Signed-off-by: Paul Cercueil
---
arch/mips/kernel/cpu-probe.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips
There is no reason we can't create compressed kernels here, so select
the option SYS_SUPPORTS_ZBOOT.
Signed-off-by: Paul Cercueil
---
arch/mips/Kconfig | 1 +
arch/mips/generic/Platform | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
128 IRQs is not enough to support Ingenic SoCs.
Signed-off-by: Paul Cercueil
---
arch/mips/include/asm/mach-generic/irq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mach-generic/irq.h
b/arch/mips/include/asm/mach-generic/irq.h
index 72ac2c202c55
well.
Cheers,
-Paul
Paul Cercueil (13):
MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
MIPS: cpu-probe: ingenic: Fix broken BUG_ON
MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
MIPS: machine: Add get_s
eturned by the macro.
What we want to check here, is that *if* the macro was overridden to a
compile-time constant, then must be defined to zero, otherwise it's a
bug.
So the correct check is:
BUG_ON(__builtin_constant_p(cpu_has_counter) && cpu_has_counter);
Signed-off-by: Paul Ce
The global get_system_type() function in arch/mips/generic/ will then be
modified in a subsequent patch to call this callback if provided.
This change will allow mips_machine implementations to override the
behaviour of the global get_system_type() function.
Signed-off-by: Paul Cercueil
empty, has
been removed.
Signed-off-by: Paul Cercueil
---
arch/mips/generic/Makefile | 1 -
arch/mips/generic/init.c | 19 +++
arch/mips/generic/proc.c | 25 -
3 files changed, 19 insertions(+), 26 deletions(-)
delete mode 100644 arch/mips/generic/proc.c
di
for a SoC supported by the arch/mips/generic/ code, without
making that kernel generic itself.
Signed-off-by: Paul Cercueil
---
arch/mips/Kconfig | 8 ++--
arch/mips/generic/Kconfig | 2 +-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kc
ly and removing the dependency on CONFIG_MACH_INGENIC.
Signed-off-by: Paul Cercueil
---
arch/mips/include/asm/pgtable-bits.h | 5 -
arch/mips/kernel/cpu-probe.c | 3 ++-
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/pgtable-bits.h
b/arch/mips/i
The plat_get_fdt() checked that the kernel was booted using UHI before
reading the 'fw_passed_dtb' variable. However, this variable is also set
when the kernel has been appended, or when it has been built into the
kernel.
Support these usecases by removing the UHI check.
Signed-of
Hi Maciej,
Le sam. 1 août 2020 à 23:30, Maciej W. Rozycki a
écrit :
On Sun, 26 Jul 2020, Krzysztof Kozlowski wrote:
diff --git a/MAINTAINERS b/MAINTAINERS
index cba0ed5b..362863cae239 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8541,11 +8541,6 @@ F: include/uapi/rdma/
F:
Le jeu. 30 juil. 2020 à 17:29, Sam Ravnborg a
écrit :
On Thu, Jul 30, 2020 at 04:48:30PM +0200, Paul Cercueil wrote:
Instead of keeping the IPU clock enabled constantly, enable and
disable
it on demand, when the IPU plane is used. That way, we won't use any
extra power when the I
a RAM size of 32 MiB when running with
an old Device Tree without the 'memory' node.
Signed-off-by: Paul Cercueil
---
arch/mips/jz4740/setup.c | 37 -
1 file changed, 8 insertions(+), 29 deletions(-)
diff --git a/arch/mips/jz4740/setup.c b/
Add a memory node, which was missing until now, and use the retail name
"Ben Nanonote" as the model, as it is way more known under that name
than under the name "LB60".
Signed-off-by: Paul Cercueil
---
arch/mips/boot/dts/ingenic/qi_lb60.dts | 6 ++
1 file changed, 6
Init the 'fw_passed_dtb' pointer to the buit-in Device Tree blob when it
has been compiled in with CONFIG_BUILTIN_DTB.
Signed-off-by: Paul Cercueil
---
arch/mips/kernel/head.S | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/he
ee is only used when the bootloader did not provide one.
Signed-off-by: Paul Cercueil
---
arch/mips/jz4740/setup.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index fc49601c2b96..d73c9b722bf3 100644
--- a/arch/mips/j
frame restart signal.
Reviewed-by: Sam Ravnborg
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c
b/drivers/gpu/drm/ingenic/ingenic-ipu.c
index 7a0a8bd865d3
Patch [1/3] unchanged. Patches [2/3] and [3/3] have had their commit
message slightly modified, but the patches themselves are the same as
before.
Cheers,
-Paul
Paul Cercueil (3):
drm/ingenic: ipu: Only restart manually on older SoCs
drm/ingenic: ipu: Remove YUV422 from supported formats on
Instead of keeping the IPU clock enabled constantly, enable and disable
it on demand, when the IPU plane is used. That way, we won't use any
extra power when the IPU is not used.
v2: Explain the reason of this patch
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c
this issue by removing
support for YUV 4:2:2 on the IPU of the JZ4725B.
v2: Update commit message (remove the "crash beyond repair" bit)
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/ingen
.
Cheers,
-Paul
Paul Cercueil (3):
drm/ingenic: ipu: Only restart manually on older SoCs
drm/ingenic: ipu: Remove YUV422 from supported formats on JZ4725B
drm/ingenic: ipu: Only enable clock when needed
drivers/gpu/drm/ingenic/ingenic-ipu.c | 38 +++
1 file changed
Instead of keeping the IPU clock enabled constantly, enable and disable
it on demand, when the IPU plane is used.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
frame restart signal.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c
b/drivers/gpu/drm/ingenic/ingenic-ipu.c
index 7a0a8bd865d3..7eae56fa92ea 100644
--- a
around, address this issue by removing
support for YUV 4:2:2 on the IPU of the JZ4725B.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-ipu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c
b/drivers/gpu/drm/ingenic/ingenic-ipu.c
index
Le mer. 29 juil. 2020 à 0:00, dan...@ffwll.ch a écrit :
On Tue, Jul 28, 2020 at 10:17:36PM +0200, Sam Ravnborg wrote:
Hi Paul.
On Tue, Jul 28, 2020 at 05:16:39PM +0200, Paul Cercueil wrote:
> Here are a few cleanups to the ingenic-drm driver.
> - some error paths were missing an
Hi Zhou,
Le sam. 25 juil. 2020 à 16:02, Zhou Yanjie
a écrit :
Hi Paul,
在 2020/7/23 下午4:47, Paul Cercueil 写道:
Hi Zhou,
Le jeu. 23 juil. 2020 à 15:19, 周琰杰 (Zhou Yanjie)
a écrit :
The commit 19c968222934 ("MIPS: DTS: CI20: make DM9000 Ethernet
controller use NVMEM to find the defaul
The driver only uses the registers up to offset 0x54. Since the EFUSE
registers are in the middle of the NEMC registers, we only request
the registers we will use for now - that way the EFUSE driver can
probe too.
Tested-by: H. Nikolaus Schaller
Signed-off-by: Paul Cercueil
---
Notes:
v2
Validate modes in the drm_crtc_helper_funcs.mode_valid() callback, which
is designed for this purpose, instead of doing it in
drm_crtc_helper_funcs.atomic_check().
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 34 +--
1 file changed, 20
drm_atomic_get_plane_state() can return errors, so we need to handle
these.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm
Here are a few cleanups to the ingenic-drm driver.
- some error paths were missing and have been added;
- the mode validation has been moved to the .mode_valid helper callback.
Cheers,
-Paul
Paul Cercueil (2):
drm/ingenic: Handle errors of drm_atomic_get_plane_state
drm/ingenic: Validate
Le mar. 28 juil. 2020 à 11:21, Krzysztof Kozlowski a
écrit :
On Mon, Jul 27, 2020 at 06:20:34PM +0200, Paul Cercueil wrote:
The driver only uses the registers up to offset 0x54. Since the
EFUSE
registers are in the middle of the NEMC registers, we only request
the registers we will use
Le mar. 28 juil. 2020 à 14:00, Krzysztof Kozlowski a
écrit :
On Tue, Jul 28, 2020 at 01:37:02PM +0200, Thomas Bogendoerfer wrote:
On Tue, Jul 28, 2020 at 01:19:35PM +0200, Krzysztof Kozlowski wrote:
> On Tue, Jul 28, 2020 at 01:12:11PM +0200, Paul Cercueil wrote:
> > Hi
.
With that:
Reviewed-by: Paul Cercueil
Cheers,
-Paul
---
Changes since v3:
1. New patch
---
arch/mips/configs/ci20_defconfig| 1 +
arch/mips/configs/qi_lb60_defconfig | 1 +
arch/mips/configs/rs90_defconfig| 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/mips/configs
Le lun. 27 juil. 2020 à 18:19, Stephen Boyd a
écrit :
Quoting Zhou Yanjie (2020-07-24 21:01:38)
Gentle ping.
I was hoping Paul would review but I guess not. I applied the patches
to
clk-next.
I did receive the "gentle ping" and was going to review it soonish :(
I said for v1 that I
Hi Sam,
Le lun. 27 juil. 2020 à 22:31, Sam Ravnborg a
écrit :
Hi Paul.
On Mon, Jul 27, 2020 at 06:46:10PM +0200, Paul Cercueil wrote:
This driver will register a DBI host driver for panels connected
over
SPI.
So this is actually a MIPI DBI host driver.
I personally would love to have
The ROUT (right channel output of audio codec) was connected to INL
(left channel of audio amplifier) instead of INR (right channel of audio
amplifier).
Fixes: 8ddebad15e9b ("MIPS: qi_lb60: Migrate to devicetree")
Cc: sta...@vger.kernel.org # v5.3
Signed-off-by: Paul Cercueil
---
arch
Hi Laurent,
Le lun. 27 juil. 2020 à 20:02, Laurent Pinchart
a écrit :
Hi Paul,
Thank you for the patch.
On Mon, Jul 27, 2020 at 06:46:09PM +0200, Paul Cercueil wrote:
The current MIPI DSI framework can very well be used to support
MIPI DBI
panels. In order to add support for the various
Hi Laurent,
Le lun. 27 juil. 2020 à 20:06, Laurent Pinchart
a écrit :
Hi Paul,
Thank you for the patch.
On Mon, Jul 27, 2020 at 06:46:10PM +0200, Paul Cercueil wrote:
This driver will register a DBI host driver for panels connected
over
SPI.
DBI types c1 and c3 are supported. C1 is a
Le lun. 27 juil. 2020 à 19:03, Krzysztof Kozlowski a
écrit :
On Mon, Jul 27, 2020 at 09:55:54AM +0200, Arnd Bergmann wrote:
On Sun, Jul 26, 2020 at 6:20 PM Paul Cercueil
wrote:
> Le dim. 26 juil. 2020 à 18:15, Krzysztof Kozlowski
a écrit :
> > On Sun, Jul 26, 2020 at 0
node which tells you the
state of the charger.
The sole purpose of this is to give userspace applications a way to
know whether or not the charger is plugged.
Signed-off-by: Paul Cercueil
---
Notes:
v2: Don't make charger registration optional
drivers/usb/common/Kconfig
is registered with it.
This TinyDRM driver expects that a DCS-compliant protocol is used by the
DSI/DBI panel and can only be used with these.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/tiny/Kconfig| 8 +
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny/tiny-dsi.c | 266
This driver is for the Ilitek ILI9341 based YX240QV29-T 2.4" 240x320 TFT
LCD panel from Adafruit.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig| 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9341.c
a separate GPIO.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/bridge/Kconfig | 8 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/dbi-spi.c | 261 +++
3 files changed, 270 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/dbi-spi.c
ck of this approach, is that the "adafruit,yx240qv29" must be
added to the dbi-spi bridge driver (unless a custom rule is added for a
"dbi-spi" fallback compatible string). I still think that it's a small
price to pay to avoid breaking the Device Tree bindings.
Feedback
Add documentation for the Device Tree node for LCD panels based on the
NewVision NV3052C controller.
Signed-off-by: Paul Cercueil
---
.../display/panel/newvision,nv3052c.yaml | 69 +++
1 file changed, 69 insertions(+)
create mode 100644
Documentation/devicetree/bindings
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig | 9 +
dr
DSI host driver can then use the information provided by the DBI/DSI
device driver, such as the bus type and the number of lanes, to
configure its hardware properly.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/drm_mipi_dsi.c | 9 +
include/drm/drm_mipi_dsi.h | 12
The driver only uses the registers up to offset 0x54. Since the EFUSE
registers are in the middle of the NEMC registers, we only request
the registers we will use for now - that way the EFUSE driver can
probe too.
Tested-by: H. Nikolaus Schaller
Signed-off-by: Paul Cercueil
---
drivers/memory
Le lun. 27 juil. 2020 à 13:42, Chunfeng Yun
a écrit :
On Sun, 2020-07-26 at 12:27 +0200, Paul Cercueil wrote:
Le dim. 26 juil. 2020 à 13:14, Andy Shevchenko
a écrit :
> On Mon, Jun 22, 2020 at 1:51 AM Paul Cercueil
> wrote:
>>
>> Register a power supply charg
ps_machine' structure with different fields, and the 'MIPS_MACHINE'
macro with different parameters. The two used the same memory area
(defined by the linker script) to store data, and you could totally use
the two at the same time for all kinds of funny results.
Signed-off-by: Paul
Since commit 3a77e0d75eed ("MIPS: ath79: drop machfiles"), this header
is not used anymore.
Signed-off-by: Paul Cercueil
---
arch/mips/ath79/setup.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 4b7c066ac88e..7e7bf9c2ad26 10
Le dim. 26 juil. 2020 à 18:15, Krzysztof Kozlowski a
écrit :
On Sun, Jul 26, 2020 at 06:12:27PM +0200, Paul Cercueil wrote:
Le dim. 26 juil. 2020 à 18:06, Krzysztof Kozlowski
a écrit
:
> On Sat, Jul 25, 2020 at 08:30:56PM +0200, Arnd Bergmann wrote:
> > On Sat, Jul 25,
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