Hi Jonathan,
On Sun, 2020-09-20 at 19:12 +0100, Jonathan McDowell wrote:
> Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
> controller found in the MSM8x60 and IPQ/APQ8064 platforms.
>
> The ADM supports both memory to memory transactions and memory
> to/from peripheral
Hi Rahul,
I just have some small nitpicks, see below:
On Wed, 2020-09-09 at 15:51 +0800, Rahul Tanwar wrote:
> Intel Lightning Mountain(LGM) SoC contains a PWM fan controller.
> This PWM controller does not have any other consumer, it is a
> dedicated PWM controller for fan attached to the
Hi Crystal,
On Fri, 2020-09-11 at 14:07 +0800, Crystal Guo wrote:
[...]
> Should I add the SoC-specific data as follows?
> This may also modify the ti original code, is it OK?
>
> + data->reset_data = of_device_get_match_data(>dev);
> +
> + list = of_get_property(np,
Hi Jianjun,
On Thu, 2020-09-10 at 11:45 +0800, Jianjun Wang wrote:
> MediaTek's PCIe host controller has three generation HWs, the new
> generation HW is an individual bridge, it supoorts Gen3 speed and
> up to 256 MSI interrupt numbers for multi-function devices.
>
> Add support for new Gen3
On Wed, 2020-09-09 at 14:52 +0800, Rahul Tanwar wrote:
> PVT controller (MR75203) is used to configure & control
> Moortec embedded analog IP which contains temprature
> sensor(TS), voltage monitor(VM) & process detector(PD)
> modules. Add driver to support MR75203 PVT controller.
>
>
mit will bring back the suspend warning mentioned in the
> commit description. Nevertheless, a warning is much less critical than
> breaking dwc3-meson-g12a USB completely. We will address the warning
> issue in another way as a 2nd step.
>
> Signed-off-by: Amjad Ouled-Ameur
> Repor
Hi Manish,
On Thu, 2020-08-27 at 00:14 +0530, Manish Narani wrote:
> Add a new driver for supporting Xilinx platforms. This driver handles
> the USB 3.0 PHY initialization and PIPE control & reset operations for
> ZynqMP platforms. This also handles the USB 2.0 PHY initialization and
> reset
On Tue, 2020-08-25 at 21:30 +0300, Abel Vesa wrote:
[...]
> > if (assert)
> > pm_runtime_get_sync();
> > spin_lock_irqsave();
> > /* ... */
> > spin_unlock_irqrestore();
> > if (assert && asserted_before)
> > pm_runtime_put();
> >
>
> On a second
On Tue, 2020-08-25 at 14:24 +0300, Abel Vesa wrote:
[...]
> > > +static int imx_blk_ctrl_reset_set(struct reset_controller_dev *rcdev,
> > > + unsigned long id, bool assert)
> > > +{
> > > + struct imx_blk_ctrl_drvdata *drvdata = container_of(rcdev,
> > > +
On Fri, 2020-08-14 at 15:09 +0300, Abel Vesa wrote:
> On i.MX8MP, there is a new type of IP which is called BLK_CTRL in
> RM and usually is comprised of some GPRs that are considered too
> generic to be part of any dedicated IP from that specific subsystem.
>
> In general, some of the GPRs have
On Mon, 2020-08-24 at 16:40 -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> A reset controller "rescal" is shared between the AHCI driver and the PCIe
> driver for the BrcmSTB 7216 chip. Use
> devm_reset_control_get_optional_shared() to handle this sharing.
>
> Fixes: 272ecd60a636 ("ata:
On Fri, 2020-08-21 at 09:34 +0200, Greg Kroah-Hartman wrote:
> On Fri, Aug 21, 2020 at 09:10:30AM +0200, Philipp Zabel wrote:
> > Hi,
> >
> > On Fri, 2020-08-21 at 09:02 +0200, Pavel Machek wrote:
> > > Hi!
> > >
> > > > From: S
Hi,
On Fri, 2020-08-21 at 09:02 +0200, Pavel Machek wrote:
> Hi!
>
> > From: Steve Longerbeam
> >
> > [ Upstream commit 0f6245f42ce9b7e4d20f2cda8d5f12b55a44d7d1 ]
> >
> > Combine the rotate_irq() and norotate_irq() handlers into a single
> > eof_irq() handler.
>
> AFAICT this is preparation
On Tue, 2020-08-18 at 15:36 +0200, Greg Kroah-Hartman wrote:
> When calling debugfs functions, there is no need to ever check the
> return value. The function can work or not, but the code logic should
> never do something different based on this.
>
> Cc: Philipp Zabel
>
"hrst");
if (IS_ERR(host->reset))
return PTR_ERR(host->reset);
If the reset is configured in DT then it should be used, even if the
reset driver is loaded later.
If the DT does not contain the reset-names = "hrst" property at all,
devm_reset_control_get_optional_*() will return NULL.
With these two changes,
Reviewed-by: Philipp Zabel
regards
Philipp
On Wed, 2020-08-12 at 17:37 +0800, Wenbin Mei wrote:
> Add description for resets/reset-names.
>
> Signed-off-by: Wenbin Mei
> ---
> Documentation/devicetree/bindings/mmc/mtk-sd.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
>
On Mon, 2020-08-03 at 14:15 +0800, Crystal Guo wrote:
> The TI syscon reset controller provides a common reset management,
> and should be suitable for other SOCs. Add compatible "generic-reset",
> which denotes to use a common reset-controller driver.
>
> Signed-off-by: Crystal Guo
> ---
>
On Mon, 2020-08-03 at 14:15 +0800, Crystal Guo wrote:
> Add ti_syscon_reset() to integrate assert and deassert together.
> If some modules need do serialized assert and deassert operations
> to reset itself, reset_control_reset can be called for convenience.
>
> Change-Id:
Hi Crystal,
On Mon, 2020-08-03 at 14:15 +0800, Crystal Guo wrote:
> Introduce force-update method for assert and deassert interface,
> which force the write operation in case the read already happens
> to return the correct value.
>
> Signed-off-by: Crystal Guo
Added Suman and Andrew for
On Thu, 2020-07-30 at 14:46 +0800, peng@nxp.com wrote:
> From: Peng Fan
>
> Add the cm4 reset used by the remoteproc driver
>
> Signed-off-by: Peng Fan
Thank you, both applied to reset/next.
regards
Philipp
On Thu, 2020-07-30 at 11:55 +0300, Abel Vesa wrote:
> On 20-07-29 14:46:28, Philipp Zabel wrote:
> > Hi Abel,
> >
> > On Wed, 2020-07-29 at 15:07 +0300, Abel Vesa wrote:
> > > On i.MX8MP, there is a new type of IP which is called BLK_CTRL in
>
>
Hi Anson,
On Thu, 2020-07-30 at 02:11 +, Anson Huang wrote:
> Hi, Philipp/Rob
>
> > Subject: Re: [PATCH V3 3/3] pci: imx: Select RESET_IMX7 by default
> >
> > On Wed, 2020-07-29 at 09:26 -0600, Rob Herring wrote:
> > > On Mon, Jul 20, 2020 at 8:26 AM Anson Huang
> > wrote:
> > > > i.MX7
On Wed, 2020-07-29 at 09:26 -0600, Rob Herring wrote:
> On Mon, Jul 20, 2020 at 8:26 AM Anson Huang wrote:
> > i.MX7 reset driver now supports module build and it is no longer
> > built in by default, so i.MX PCI driver needs to select it explicitly
> > due to it is NOT supporting loadable module
On Tue, 2020-07-28 at 11:53 +0100, Lorenzo Pieralisi wrote:
> On Fri, Jul 24, 2020 at 10:03:11AM +0200, Philipp Zabel wrote:
> > On Mon, 2020-07-20 at 22:21 +0800, Anson Huang wrote:
> > > Use module_platform_driver(), add module device table, author,
> > > descrip
Hi Abel,
On Wed, 2020-07-29 at 15:07 +0300, Abel Vesa wrote:
> On i.MX8MP, there is a new type of IP which is called BLK_CTRL in
> RM and usually is comprised of some GPRs that are considered too
> generic to be part of any dedicated IP from that specific subsystem.
>
> In general, some of the
Hi Crystal, Matthias,
On Wed, 2020-07-29 at 09:48 +0200, Matthias Brugger wrote:
>
> On 29/07/2020 09:39, Crystal Guo wrote:
> > Add ti_syscon_reset() to integrate assert and deassert together,
> > and change return value of the reset assert and deassert interface
> > from regmap_update_bits to
Hi Krzysztof,
On Tue, 2020-07-28 at 19:10 +0200, Krzysztof Kozlowski wrote:
> Fix W=1 compile warnings (invalid kerneldoc):
>
> drivers/reset/core.c:50: warning: Function parameter or member 'array'
> not described in 'reset_control'
> drivers/reset/core.c:50: warning: Function
Hi Jim,
On Fri, 2020-07-24 at 16:33 -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> A reset controller "rescal" is shared between the AHCI driver and the PCIe
> driver for the BrcmSTB 7216 chip. Use
> devm_reset_control_get_optional_shared() to handle this sharing.
>
> Signed-off-by: Jim
On Mon, 2020-07-20 at 22:21 +0800, Anson Huang wrote:
> Use module_platform_driver(), add module device table, author,
> description and license to support module build, and
> CONFIG_RESET_IMX7 is changed to default 'y' ONLY for i.MX7D,
> other platforms need to select it in defconfig.
>
>
On Wed, 2020-07-22 at 12:46 +0530, Sai Krishna Potthuri wrote:
> Extended the ZynqMP reset driver to support Versal platform, accordingly
> updated the dt-binding with the Versal platform specific information
> like compatible string and reset indices.
>
> Changes in v2:
> - Updated 1/2 patch
Hi Laurentiu,
On Tue, 2020-07-21 at 13:20 +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu
>
> This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
> Some of its capabilities include:
> * 4K@60fps;
> * HDR10;
> * one graphics and 2 video pipelines;
> * on-the-fly
On Sun, 2020-04-05 at 11:16 +0200, Markus Elfring wrote:
> From: Markus Elfring
> Date: Sun, 5 Apr 2020 11:01:49 +0200
>
> The function “platform_get_irq” can log an error already.
> Thus omit a redundant message for the exception handling in the
> calling function.
>
> This issue was detected
On Sat, 2020-07-18 at 14:18 +0200, Alexander A. Klimov wrote:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
>
> Deterministic algorithm:
> For each file:
> If not .svg:
> For each line:
> If doesn't
On Tue, 2020-07-14 at 11:59 +0530, Sai Krishna Potthuri wrote:
> Updated the reset driver to support Versal platform.
> As part of adding Versal support
> - Added Versal specific compatible string.
> - Reset Id and number of resets are different for Versal and ZynqMP,
> hence taken care of these
Hi Rajesh,
On Mon, 2020-07-20 at 12:04 +0530, Rajesh Gumasta wrote:
> +
> + tdma->rst = devm_reset_control_get(>dev, "gpcdma");
Please use devm_reset_control_get_exclusive() directly.
> + if (IS_ERR(tdma->rst)) {
> + dev_err(>dev, "Missing controller reset\n");
You
On Mon, 2020-06-29 at 23:05 +0800, Anson Huang wrote:
> Add module device table, author, description and license to support
> module build, and CONFIG_RESET_IMX7 is changed to default 'y' ONLY
> for i.MX7D, other platforms need to select it in defconfig.
>
> Signed-off-by: Anson Huang
> ---
>
Hi Martin,
On Tue, 2020-07-07 at 17:56 +0200, Martin Fuzzey wrote:
> When performing a modeset the atomic core calls
> ipu_crtc_atomic_disable() which switches off the DC and DI.
>
> When we immediately restart as in the modeset case this sometimes
> leads to corruption at the bottom of the
On Wed, 2020-07-01 at 10:16 -0300, Ezequiel Garcia wrote:
> Second iteration, just addressing Philipp's and Robin's
> feedback on patch 3.
Thank you, feel free to add
Reviewed-by: Philipp Zabel
for the series.
regards
Philipp
the JPEG compression level control is the only one
> that needs setting, a specific ops is provided.
>
> Signed-off-by: Ezequiel Garcia
Reviewed-by: Philipp Zabel
regards
Philipp
On Wed, 2020-06-24 at 20:47 +0300, Cristian Ciocaltea wrote:
> Add device tree binding constants for Actions Semi S500 SoC Reset
> Management Unit (RMU).
>
> Signed-off-by: Cristian Ciocaltea
Acked-by: Philipp Zabel
to be merged through the clock tree, required by the following
On Wed, 2020-06-17 at 12:44 +0200, Nicolas Saenz Julienne wrote:
> On Wed, 2020-06-17 at 12:02 +0200, Philipp Zabel wrote:
> > Hi Nicolas,
> >
> > On Fri, 2020-06-12 at 19:13 +0200, Nicolas Saenz Julienne wrote:
> > > Raspberry Pi 4's co-processor c
Hi Dejin,
On Thu, 2020-06-04 at 23:30 +0800, Dejin Zheng wrote:
> kernel test robot reports a compile warning about REG_OFFSET redefined
> in the reset-intel-gw.c after merging commit e44ab4e14d6f4 ("regmap:
> Simplify implementation of the regmap_read_poll_timeout() macro"). the
> warning is
Hi Ezequiel,
On Thu, 2020-06-25 at 13:35 -0300, Ezequiel Garcia wrote:
> So far we've been using the .buf_finish hook to distinguish
> decoder from encoder. This is unnecessarily obfuscated.
>
> Moreover, we want to move the buf_finish, so use a cleaner
> scheme to distinguish the driver
Hi Álvaro,
On Fri, 2020-06-19 at 10:51 +0200, Álvaro Fernández Rojas wrote:
> Add BCM63xx USBH PHY driver for BMIPS.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v4: several improvements:
> - Use devm_platform_ioremap_resource.
> - Code cleanups.
> - Improve device mode config:
>
Hi Rahul,
On Thu, 2020-06-18 at 20:05 +0800, Rahul Tanwar wrote:
> Intel Lightning Mountain(LGM) SoC contains a PWM fan controller.
> This PWM controller does not have any other consumer, it is a
> dedicated PWM controller for fan attached to the system. Add
> driver for this PWM fan controller.
_dev *dev, const
> struct pci_device_id *id)
> return retval;
> }
>
> + reset = devm_reset_control_get_optional_exclusive(>bus->dev, NULL);
> + if (IS_ERR(reset))
> + return PTR_ERR(reset);
> + reset_control_reset(reset);
Reviewed-by: Philipp Zabel
regards
Philipp
co-processor that models these firmware initialization routines as
> reset lines.
>
> Signed-off-by: Nicolas Saenz Julienne
> Reviewed-by: Florian Fainelli
Reviewed-by: Philipp Zabel
If there is a good reason for the single DT specified reset id, I can
pick up patches 1 and 2.
If
Hi Nicolas,
On Fri, 2020-06-12 at 19:13 +0200, Nicolas Saenz Julienne wrote:
> The firmware running on the RPi VideoCore can be used to reset and
> initialize HW controlled by the firmware.
>
> Signed-off-by: Nicolas Saenz Julienne
> Reviewed-by: Florian Fainelli
>
> ---
> Changes since v2:
>
+{
> + bcm6345_reset_update(rcdev, id, true);
> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> + BCM6345_RESET_SLEEP_MAX_US);
> +
> + bcm6345_reset_update(rcdev, id, false);
This second sleep is unusual:
> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> + BCM6345_RESET_SLEEP_MAX_US);
Could you add a comment describing why it is needed?
Otherwise,
Reviewed-by: Philipp Zabel
regards
Philipp
Hi Álvaro,
On Tue, 2020-06-16 at 20:45 +0200, Álvaro Fernández Rojas wrote:
> Add BCM63xx USBH PHY driver for BMIPS.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: introduce changes suggested by Florian:
> - Add support for device mode.
> v2: introduce changes suggested by Florian:
>
TS); i++)
> + reset_control_deassert(resets[i]);
This driver could probably benefit from a reset_bulk API similar to the
clk_bulk and regulator_bulk APIs, but that doesn't exist yet.
For the reset handling in this driver,
Reviewed-by: Philipp Zabel
regards
Philipp
Hi Maxime,
On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> Hi Nicolas,
>
> On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > Now that we have a driver for the DVP, let's add its DT node.
> > >
> >
>
> + reset = devm_reset_control_get(dev, NULL);
Please use devm_reset_control_get_exclusive(), same for patch 3.
With that changed,
Reviewed-by: Philipp Zabel
regards
Philipp
umentation/devicetree/bindings/clock/imx5-clock.yaml, and in
> +Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
>
> Optional properties:
> - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q
Reviewed-by: Philipp Zabel
regards
Philipp
Hi Álvaro,
On Wed, 2020-06-10 at 08:08 +0200, Álvaro Fernández Rojas wrote:
> Hi Florian,
>
> > El 9 jun 2020, a las 22:17, Florian Fainelli
> > escribió:
> >
> >
> >
> > On 6/9/2020 9:41 AM, Álvaro Fernández Rojas wrote:
> > > > > > If you can do without this, with I think this driver
Hi Álvaro,
On Tue, 2020-06-09 at 17:14 +0200, Álvaro Fernández Rojas wrote:
> Hi Philipp,
>
> > El 9 jun 2020, a las 17:06, Philipp Zabel escribió:
> >
> > Hi Álvaro,
> >
> > On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
> >
Hi Álvaro,
On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> drivers/reset/Kconfig | 7 ++
> drivers/reset/Makefile
Hi Ramuthevar,
On Tue, 2020-06-09 at 19:08 +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan
>
> Add support for USB PHY on Intel LGM SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan
>
> ---
> drivers/usb/phy/Kconfig | 11 ++
> drivers/usb/phy/Makefile
Hi Nicolas,
On Tue, 2020-06-09 at 13:18 +0200, Nicolas Saenz Julienne wrote:
> Hi Florian, thanks for the reviews!
>
> On Mon, 2020-06-08 at 12:43 -0700, Florian Fainelli wrote:
> > On 6/8/2020 12:26 PM, Nicolas Saenz Julienne wrote:
> > > Some atypical users of xhci-pci might need to manually
Hi Anson,
On Tue, 2020-05-19 at 11:42 +0800, Anson Huang wrote:
> Convert the i.MX reset binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Dong Aisheng
Thank you, applied to reset/next.
regards
Philipp
Hi Anson,
On Mon, 2020-05-11 at 19:57 +0800, Anson Huang wrote:
> Convert the i.MX7 reset binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
Thank you, applied to reset/next with Rob's and Dong's R-b.
regards
Philipp
iver data.
>
> Cc: Philipp Zabel
> Reviewed-by: Philipp Zabel
> Signed-off-by: Maxime Ripard
Thank you, I've applied patches 1 & 2 to the reset/next branch.
regards
Philipp
Hi Dinghao,
thank you for the patch! The first part is fine, but I think the second
part is not necessary, see below:
On Sat, May 23, 2020 at 06:03:32PM +0800, Dinghao Liu wrote:
> When coda_firmware_request() returns an error code,
> a pairing runtime PM usage counter decrement is needed
> to
Hi Jim,
On Tue, May 19, 2020 at 04:34:05PM -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> Some STB chips have a special purpose reset controller named
> RESCAL (reset calibration). This commit adds the control
> of RESCAL as well as the ability to start and stop its
> operation for PCIe HW.
Hi Jim,
On Tue, May 19, 2020 at 04:34:00PM -0400, Jim Quinlan wrote:
> From: Jim Quinlan
>
> A reset controller "rescal" is shared between the AHCI driver
> and the PCIe driver for the BrcmSTB 7216 chip. The code is
> modified to allow this sharing and to deassert() properly.
>
>
.yaml
> b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
> new file mode 100644
> index 000..276a533
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>
reset);
> + if (ret) {
> + dev_err(dev, "cannot assert ext reset\n");
^
This probably should say "cannot deassert ext reset". Apart from this,
Reviewed-by: Philipp Zabel
regards
Philipp
Hi Jerome,
On Wed, 2020-05-06 at 15:50 +0200, Jerome Brunet wrote:
> On Tue 14 Apr 2020 at 10:28, Jerome Brunet wrote:
>
> > On Thu 23 Jan 2020 at 11:13, Philipp Zabel wrote:
> >
> > > On Wed, 2020-01-22 at 10:25 +0100, Jerome Brunet wrote:
> > > > Add t
On Fri, 2020-04-24 at 17:34 +0200, Maxime Ripard wrote:
> The reset-simple code can be useful for drivers outside of drivers/reset
> that have a few reset controls as part of their features. Let's move it to
> include/linux/reset.
>
> Cc: Philipp Zabel
> Signed-off-by: Maxime
iver data.
>
> Cc: Philipp Zabel
> Signed-off-by: Maxime Ripard
> ---
> drivers/reset/reset-simple.c | 24
> include/linux/reset/reset-simple.h | 6 ++
> 2 files changed, 30 insertions(+)
>
> diff --git a/drivers/reset/reset-sim
Add initial reset controller API documentation. This is mostly indented
to describe the concepts to users of the consumer API, and to tie the
kerneldoc comments we already have into the driver API documentation.
Signed-off-by: Philipp Zabel
---
Documentation/driver-api/index.rst | 1
Add kerneldoc comments for the optional reset_control_get variants.
Signed-off-by: Philipp Zabel
---
include/linux/reset.h | 46 +++
1 file changed, 46 insertions(+)
diff --git a/include/linux/reset.h b/include/linux/reset.h
index eb597e8aa430
Mention of_reset_simple_xlate as the default if of_xlate is not set.
Signed-off-by: Philipp Zabel
---
drivers/reset/core.c | 6 --
include/linux/reset-controller.h | 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/reset/core.c b/drivers/reset/core.c
Add missing parentheses to correctly hyperlink the reference to
reset_control_get_shared().
Fixes: 0b52297f2288 ("reset: Add support for shared reset controls")
Signed-off-by: Philipp Zabel
---
include/linux/reset.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Add a missing colon to fix a documentation build warning:
./include/linux/reset-controller.h:45: warning: Function parameter or member
'con_id' not described in 'reset_control_lookup'
Fixes: 6691dffab0ab ("reset: add support for non-DT systems")
Signed-off-by: Philipp Zabel
--
with a device
./drivers/reset/core.c:840: warning: Function parameter or member 'node' not
described in 'of_reset_control_get_count'
Fixes: 17c82e206d2a ("reset: Add APIs to manage array of resets")
Signed-off-by: Philipp Zabel
---
drivers/reset/core.c | 3 ++-
1 file changed, 2 insert
: Add reset controller API")
Signed-off-by: Philipp Zabel
---
drivers/reset/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/reset/core.c b/drivers/reset/core.c
index 213ff40dda11..7c95cafcdf08 100644
--- a/drivers/reset/core.c
+++ b/drivers/reset/core.c
@@ -76,7 +76,6 @@ st
On Tue, 2019-10-22 at 09:03 -0700, Joe Perches wrote:
> On Tue, 2019-10-22 at 14:38 +0200, Philipp Zabel wrote:
> > Add a regex that matches users of the reset controller API.
> []
> > diff --git a/MAINTAINERS b/MAINTAINERS
> []
> > @@ -13851,6 +13851,7 @@ F: includ
Add a regex that matches users of the reset controller API.
Signed-off-by: Philipp Zabel
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 296de2b51c83..5d77a376a45c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13851,6 +13851,7 @@ F
Add a regex that matches users of the reset controller API.
Signed-off-by: Philipp Zabel
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 296de2b51c83..7ec2f5c48616 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13851,6 +13851,7 @@ F
The zynqmp_reset_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel
---
drivers/reset/reset-zynqmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c
index 99e75d92dada..0144075b11a6 100644
The hi3660_reset_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel
---
drivers/reset/hisilicon/reset-hi3660.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/reset/hisilicon/reset-hi3660.c
b/drivers/reset/hisilicon/reset-hi3660.c
index
The sirfsoc_rstc_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel
---
arch/arm/mach-prima2/rstc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 9d56606ac87f..1ee405e2dde9 100644
On Mon, 2019-10-14 at 10:18 -0500, Dinh Nguyen wrote:
> The Intel SoCFPGA Agilex platform shares the same reset controller that
> is on the Stratix10.
>
> Signed-off-by: Dinh Nguyen
> ---
> v2: rebase to v5.4-rc1
> ---
> drivers/reset/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1
Hi Kishon,
On Tue, 2019-10-22 at 14:06 +0530, Kishon Vijay Abraham I wrote:
> Memory allocated for 'struct reset_control_array' in
> of_reset_control_array_get() is never freed in
> reset_control_array_put() resulting in kmemleak showing
> the following backtrace.
>
> backtrace:
>
t; in the
SoC, not implemented on the board, or just not implemented in the driver
in this patchset.
So even if this board has the regulator fixed, could there be others
where GPU power could be switched off? I wouldn't want to encode the the
limitations of a particular board into the SoC DT bindings.
Hi Martin,
On Mon, 2019-10-07 at 21:53 +0200, Martin Blumenstingl wrote:
> Hi Philipp,
>
> On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel wrote:
> [...]
> > > because the register layout was greatly simplified for the newer SoCs
> > > (for which there is reset-int
Hi Xingyu,
On Sun, 2019-09-29 at 14:24 +0800, Xingyu Chen wrote:
> This patchset adds support for Meson-A1 SoC Reset Controller. A new struct
> meson_reset_param is introduced to describe the register differences between
> Meson-A1 and previous SoCs.
>
> Changes since v2 at [1]:
> - add comments
ds/master/recipes-kernel/linux/linux-96boards/0004-drivers-gpu-arm-utgard-add-basic-HiKey-platform-file.patch
> Cc: Philipp Zabel
> Cc: Peter Griffin
> Cc: Enrico Weigelt
> Signed-off-by: Peter Griffin
> Signed-off-by: John Stultz
> ---
> drivers/reset
Hi Jerome,
On Tue, Oct 01, 2019 at 11:40:20AM +0200, Jerome Brunet wrote:
[...]
> Looks like this patchset missed v5.4-rc1.
> Could you provide a tag with the bindings to Kevin so we can use the IDs
> in DT until the next merge window ?
Does
git://git.pengutronix.de/git/pza/linux.git
Hi Martin, Dilip,
On Thu, Sep 19, 2019 at 09:51:48PM +0200, Martin Blumenstingl wrote:
> Hi Dilip,
>
> (sorry for the late reply)
Same, sorry for the delay.
> On Thu, Sep 12, 2019 at 8:38 AM Dilip Kota
> wrote:
> [...]
> > The major difference between the vrx200 and lgm is:
> > 1.) RCU in
Hi Kunihiko,
On Tue, 2019-09-10 at 20:56 +0900, Kunihiko Hayashi wrote:
[...]
> This driver is derived from reset-simple, so the method to control reset
> in the glue block is the same for each SoC.
>
> And both Pro4 and Pro5 need same parent clock and reset, so the data for
> these SoCs refer
Hi Kunihiko,
On Tue, 2019-09-10 at 10:55 +0900, Kunihiko Hayashi wrote:
> Pro5 SoC has same scheme of USB3 reset as Pro4, so the data for Pro5 is
> equivalent to Pro4.
>
> Signed-off-by: Kunihiko Hayashi
If it is exactly the same, you could keep using the same compatible:
> ---
>
> it was missed easily. Add the missing scmi_reset_data->handle
> initialisation to fix the issue.
>
> Fixes: c8ae9c2da1cc ("reset: Add support for resets provided by SCMI")
> Cc: Philipp Zabel
> Reported-by: Etienne Carriere
> Signed-off-by: Sudeep Holla
&g
On Thu, 2019-09-05 at 15:00 -0300, Ezequiel Garcia wrote:
> On Wed, 2019-09-04 at 15:28 +0200, Philipp Zabel wrote:
> > On Wed, 2019-09-04 at 10:01 -0300, Ezequiel Garcia wrote:
> > > On Wed, 2019-09-04 at 12:13 +0200, Philipp Zabel wrote:
> > > > Hi Ezequiel,
>
Hi Jerome,
On Thu, 2019-09-05 at 15:50 +0200, Jerome Brunet wrote:
> This patchset adds the new arb reset lines for the sm1 SoC family
> It has been tested on the sei610 platform.
>
> Changes since v1 [0]:
> * Fix the mistake on the number of reset as reported by Phililpp (thx)
>
> [0]:
On Wed, 2019-09-04 at 10:01 -0300, Ezequiel Garcia wrote:
> On Wed, 2019-09-04 at 12:13 +0200, Philipp Zabel wrote:
> > Hi Ezequiel,
> >
> > On Tue, 2019-09-03 at 14:12 -0300, Ezequiel Garcia wrote:
> > > Commit 953aaa1492c53 ("media: rockchip/vpu: Prepar
Hi Ezequiel,
On Tue, 2019-09-03 at 14:12 -0300, Ezequiel Garcia wrote:
> Commit 953aaa1492c53 ("media: rockchip/vpu: Prepare things to support
> decoders")
> changed the conditions under S_FMT was allowed for OUTPUT
> CAPTURE buffers.
>
> However, and according to the mem-to-mem stateless
On Tue, 2019-09-03 at 14:02 +, Jonas Karlman wrote:
> On 2019-09-03 15:21, Philipp Zabel wrote:
> > On Sun, 2019-09-01 at 12:45 +, Jonas Karlman wrote:
> > > This need code cleanup and formatting
> > >
> > > Signed-off-by: Jonas Karlman
&g
On Sun, 2019-09-01 at 12:45 +, Jonas Karlman wrote:
> This need code cleanup and formatting
>
> Signed-off-by: Jonas Karlman
The previous patches all work, but this patch breaks decoding of
progressive content for me (i.MX8MQ with FFmpeg based on Ezequiel's
branch).
regards
Philipp
> ---
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