On Wed, Aug 26, 2015 at 10:16 AM, Viresh Kumar wrote:
> On 26-08-15, 09:25, Pi-Cheng Chen wrote:
>> The [3/3] is based on Mediatek SoC maintainer tree[1] and the patch which
>> introduce a new clock type[2] consumed by MT8173 cpufreq driver. So it will
>> cause some conflic
On Wed, Aug 26, 2015 at 10:16 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 26-08-15, 09:25, Pi-Cheng Chen wrote:
The [3/3] is based on Mediatek SoC maintainer tree[1] and the patch which
introduce a new clock type[2] consumed by MT8173 cpufreq driver. So it will
cause some conflicts
Hi Rafael,
On Wed, Aug 26, 2015 at 7:01 AM, Rafael J. Wysocki wrote:
> On Tuesday, August 25, 2015 10:10:44 AM Pi-Cheng Chen wrote:
>> On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen
>> wrote:
>> > MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single clu
Hi Rafael,
On Wed, Aug 26, 2015 at 7:01 AM, Rafael J. Wysocki r...@rjwysocki.net wrote:
On Tuesday, August 25, 2015 10:10:44 AM Pi-Cheng Chen wrote:
On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org
wrote:
MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs
On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen wrote:
> MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
> share the same power and clock domain. This series tries to add cpufreq
> support
> for MT8173 SoC. The v6 of this series is resent with Acks added
On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote:
MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
share the same power and clock domain. This series tries to add cpufreq
support
for MT8173 SoC. The v6 of this series is resent with Acks
X need to be parented to
another "intermediate" stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Viresh Kum
to
another intermediate stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Acked-by: Viresh
X need to be parented to
another "intermediate" stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Viresh Kum
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Michael Turquette
Acked-by: Viresh Kumar
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen
Acked-by: Viresh Kumar
---
It is based on the top of MT8173 SoC maintainer's tree:
https://github.com/mbgg/linux-mediatek.git v4.2-next/arm64
commit id
voltage scaling code of cpufreq-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (3):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts: mt8173
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v5:
- Replace __initdata with __initconst to fix compiling error
Changes in
to
another intermediate stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Acked-by: Viresh
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Acked-by: Viresh Kumar viresh.ku...@linaro.org
---
It is based on the top of MT8173 SoC maintainer's tree:
https://github.com/mbgg/linux-mediatek.git v4.2
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Acked-by: Michael Turquette mturque...@baylibre.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
---
.../devicetree
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v5:
- Replace
of cpufreq-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (3):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts: mt8173: Add mt8173 cpufreq driver
On Wed, Jul 15, 2015 at 02:38:46PM +0800, Pi-Cheng Chen wrote:
> From: "pi-cheng.chen"
>
> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
> for intermediate clock source switching.
Hi Mike and Stephen,
since the MT8173 cpufreq driver is likel
On Wed, Jul 15, 2015 at 02:38:46PM +0800, Pi-Cheng Chen wrote:
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Hi Mike and Stephen,
since the MT8173 cpufreq driver is likely going
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v4:
- Address comments for v3
- Rebase to the patch that adds 13mhz clock fo
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v4:
- Address
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v4:
- Address comments for v3
- Rebase to the patch that adds 13mhz clock fo
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v4:
- Address
This patch adds device tree binding document for MT8173 cpufreq driver.
The clock and regulator consumer properties are documented in
Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt and
referenced by this document.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/cpufreq
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file changed, 83 insertions(+)
create mode 100644
k need to be
parented to another "intermediate" stable PLL first and reparented to
the original PLL once the original PLL is stable at the target
frequency. This patch implements those mechanisms to enable CPU DVFS
support for Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
---
drivers/cpu
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
It is based on the top of Mediatek SoC maintainer's tree[1] and the
patch that adds cpumux clocks for MT8173[2]
[1] https://github.com/mbgg/linux-mediatek.git v4.2-next/arm64
ttle cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (4):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
dt-bindings: mediatek: Add MT8173 cpufreq driver bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts
of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (4):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
dt-bindings: mediatek: Add MT8173 cpufreq driver bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts: mt8173: Add mt8173
to be
parented to another intermediate stable PLL first and reparented to
the original PLL once the original PLL is stable at the target
frequency. This patch implements those mechanisms to enable CPU DVFS
support for Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
drivers
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
It is based on the top of Mediatek SoC maintainer's tree[1] and the
patch that adds cpumux clocks for MT8173[2]
[1] https://github.com/mbgg/linux
This patch adds device tree binding document for MT8173 cpufreq driver.
The clock and regulator consumer properties are documented in
Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt and
referenced by this document.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file changed, 83 insertions
Hi Viresh,
On Wed, Jul 8, 2015 at 7:34 PM, Viresh Kumar wrote:
> On 01-07-15, 10:16, Pi-Cheng Chen wrote:
>> This patch implements MT8173 cpufreq driver.
>
> Now that you are going to resend this patchset, a few more comments.
>
> Please describe your SoC a bit here, so tha
t;
> Fix this by considering offline CPUs, but with a restriction that the
> policy is active at that time.
>
> Because we will be using 'cpufreq_cpu_data' now, which is internal to
> cpufreq-core, lets also move cpufreq_frequency_get_table() to cpufreq.c
> file.
>
> Report
gt; We also missed marking policy->governor as NULL while restoring the
> policy. Because of that, we call __cpufreq_governor(CPUFREQ_GOV_LIMITS)
> for an uninitialized policy. Which eventually returns -EBUSY.
>
> Fix this by setting policy->governor to NULL while restoring the policy.
offline CPUs, but with a restriction that the
policy is active at that time.
Because we will be using 'cpufreq_cpu_data' now, which is internal to
cpufreq-core, lets also move cpufreq_frequency_get_table() to cpufreq.c
file.
Reported-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Signed-off
also missed marking policy-governor as NULL while restoring the
policy. Because of that, we call __cpufreq_governor(CPUFREQ_GOV_LIMITS)
for an uninitialized policy. Which eventually returns -EBUSY.
Fix this by setting policy-governor to NULL while restoring the policy.
Tested-by: Pi-Cheng Chen
Hi Viresh,
On Wed, Jul 8, 2015 at 7:34 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 01-07-15, 10:16, Pi-Cheng Chen wrote:
This patch implements MT8173 cpufreq driver.
Now that you are going to resend this patchset, a few more comments.
Please describe your SoC a bit here, so
Hi Viresh,
On Tue, Jul 7, 2015 at 6:27 PM, Viresh Kumar wrote:
> On 01-07-15, 12:13, Pi-Cheng Chen wrote:
>> Sorry for the mistake I made when cherry-picking the patch. Fix and resend
>> again.
>
> You really want above to show up in git logs ?
>
> Any comments
Hi Viresh,
On Tue, Jul 7, 2015 at 6:27 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 01-07-15, 12:13, Pi-Cheng Chen wrote:
Sorry for the mistake I made when cherry-picking the patch. Fix and resend
again.
You really want above to show up in git logs ?
Any comments like this should
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Changes in v3:
- Rebase to 4.2-rc1
- Fix some issues of v2
Changes in v2:
- Remove use of .determine_rate callback
Signed-off-by: Pi-Cheng Chen
--
/clk-cpumux.c
b/drivers/clk/mediatek/clk-cpumux.c
new file mode 100644
index 000..593df45
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen pi-cheng.c...@linaro.org
+ *
+ * This program is free software; you can
Hi Alexey,
On Thu, Jul 2, 2015 at 5:24 AM, Alexey Klimov wrote:
> Hi Pi-Cheng,
>
> On Wed, Jul 1, 2015 at 5:16 AM, Pi-Cheng Chen
> wrote:
>> This patch implements MT8173 cpufreq driver.
>>
>> Signed-off-by: Pi-Cheng Chen
>> ---
>> drivers/cpufreq/Kc
Hi Alexey,
On Thu, Jul 2, 2015 at 5:24 AM, Alexey Klimov klimov.li...@gmail.com wrote:
Hi Pi-Cheng,
On Wed, Jul 1, 2015 at 5:16 AM, Pi-Cheng Chen pi-cheng.c...@linaro.org
wrote:
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Sorry for the mistake I made when cherry-picking the patch. Fix and resend
again.
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen
---
drivers/thermal/cpu_cooling.c | 8 +++-
1 file changed, 7 insertions(+), 1
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 520 +++
3 files changed, 528 insertions(+)
create mode
in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 ++
drivers/cpufreq/Kconfig.arm
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Michael Turquette
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 +
1 file changed, 145 insertions(+)
create mode 100644 Documentation/devicetree
Hi Mike,
On Tue, Jun 30, 2015 at 5:53 AM, Michael Turquette
wrote:
> Quoting Viresh Kumar (2015-06-23 18:06:21)
>> Adding Mike's new email address..
>>
>> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> > On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen
>> > wr
Hi Mike,
On Tue, Jun 30, 2015 at 5:53 AM, Michael Turquette
mturque...@baylibre.com wrote:
Quoting Viresh Kumar (2015-06-23 18:06:21)
Adding Mike's new email address..
On 23-06-15, 23:31, Pi-Cheng Chen wrote:
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org
wrote
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 520 +++
3 files changed, 528
in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 ++
drivers/cpufreq/Kconfig.arm
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Michael Turquette mturque...@baylibre.com
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 +
1 file changed, 145 insertions
Sorry for the mistake I made when cherry-picking the patch. Fix and resend
again.
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen pi
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
drivers/thermal/cpu_cooling.c | 8 +++-
1 file changed, 7
Hi Matthias and Mark,
May I have some review comments for this patch from you to get this
series moving forwards?
Thanks.
Pi-Cheng
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar wrote:
> Adding Mike's new email address..
>
> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> On Mon, J
Hi Matthias and Mark,
May I have some review comments for this patch from you to get this
series moving forwards?
Thanks.
Pi-Cheng
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
Adding Mike's new email address..
On 23-06-15, 23:31, Pi-Cheng Chen wrote:
On Mon
On Wed, Jun 24, 2015 at 4:56 PM, Viresh Kumar wrote:
> On 24-06-15, 16:44, Pi-Cheng Chen wrote:
>> One reason to put those initialization and resource allocation in probe is
>> that it's easier to handle the return value -PROBE_DEFER from clock
>> and regulator framework when
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar wrote:
> Adding Mike's new email address..
>
> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen
>> wrote:
>> > This patch adds device tree binding document for MT8173 cpufre
Hi Viresh,
On Wed, Jun 24, 2015 at 8:57 AM, Viresh Kumar wrote:
> On 23-06-15, 23:25, Pi-Cheng Chen wrote:
>> On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar
>> wrote:
>> >> +static struct mtk_cpu_dvfs_info *mtk_cpu_dvfs_info_get(int cpu)
>> >
>> > A
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
Adding Mike's new email address..
On 23-06-15, 23:31, Pi-Cheng Chen wrote:
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org
wrote:
This patch adds device tree binding document for MT8173
On Wed, Jun 24, 2015 at 4:56 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 24-06-15, 16:44, Pi-Cheng Chen wrote:
One reason to put those initialization and resource allocation in probe is
that it's easier to handle the return value -PROBE_DEFER from clock
and regulator framework when
Hi Viresh,
On Wed, Jun 24, 2015 at 8:57 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 23-06-15, 23:25, Pi-Cheng Chen wrote:
On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar viresh.ku...@linaro.org
wrote:
+static struct mtk_cpu_dvfs_info *mtk_cpu_dvfs_info_get(int cpu)
A very bad name
Hi,
May I get some comments for this patch to get this series proceeding?
Pi-Cheng
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen wrote:
> This patch adds device tree binding document for MT8173 cpufreq driver.
>
> Signed-off-by: Pi-Cheng Chen
> ---
> .../devicetree/bindings/
Hi Viresh,
On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar wrote:
> On 08-06-15, 20:29, Pi-Cheng Chen wrote:
>
> Sorry for the delay, I have been quite busy recently.
That's fine. Thanks for reviewing.
>
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
>> +static LIST
Hi Viresh,
On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 08-06-15, 20:29, Pi-Cheng Chen wrote:
Sorry for the delay, I have been quite busy recently.
That's fine. Thanks for reviewing.
+++ b/drivers/cpufreq/mt8173-cpufreq.c
+static LIST_HEAD
Hi,
May I get some comments for this patch to get this series proceeding?
Pi-Cheng
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote:
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
On Tue, Jun 9, 2015 at 5:17 PM, Paul Bolle wrote:
> On Mon, 2015-06-08 at 20:29 +0800, Pi-Cheng Chen wrote:
>> --- /dev/null
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
>
>> +#include
>
> Weren't you going to drop this include?
Sorry I forget to merge that part of
On Tue, Jun 9, 2015 at 5:17 PM, Paul Bolle pebo...@tiscali.nl wrote:
On Mon, 2015-06-08 at 20:29 +0800, Pi-Cheng Chen wrote:
--- /dev/null
+++ b/drivers/cpufreq/mt8173-cpufreq.c
+#include linux/module.h
Weren't you going to drop this include?
Sorry I forget to merge that part of fix
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen wrote:
> MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
> share the same power and clock domain. This series tries to add cpufreq
> support
> for MT8173 SoC.
I am sorry I forgot to add the version in th
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 550 +++
3 files changed, 558 insertions(+)
create mode
-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 127 +
1 file changed, 127 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mt8173
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote:
MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
share the same power and clock domain. This series tries to add cpufreq
support
for MT8173 SoC.
I am sorry I forgot to add the version
-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 127 +
1 file changed, 127 insertions(+)
create mode 100644 Documentation/devicetree
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 550 +++
3 files changed, 558
On Fri, Apr 24, 2015 at 3:09 PM, Pi-Cheng Chen wrote:
> Hi Mark,
>
> Thanks for reviewing.
>
> On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland wrote:
>> On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
>>> This patch adds voltage supplies and clocks
dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen
>> + *
>> + * This program is free software; you can redistribute it an
pumux.o
>> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>> obj-y += clk-mt8135.o
>> obj-y += clk-mt8173.o
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c
>> b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 000..dc14074
>> -
..dc14074
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen pi-cheng.c...@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General
new file mode 100644
index 000..dc14074
--- /dev/null
+++ b/drivers/clk/mediatek/clk-cpumux.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2015 Linaro Ltd.
+ * Author: Pi-Cheng Chen pi-cheng.c...@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
On Fri, Apr 24, 2015 at 3:09 PM, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote:
Hi Mark,
Thanks for reviewing.
On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
This patch adds voltage supplies and clocks
On Fri, Apr 24, 2015 at 8:55 PM, Sascha Hauer wrote:
> On Fri, Apr 24, 2015 at 02:46:25PM +0800, Pi-Cheng Chen wrote:
>> Hi Sascha,
>>
>> Thanks for reviewing.
>>
>> On Thu, Apr 23, 2015 at 8:01 PM, Sascha Hauer wrote:
>> > On Mon, Apr 20, 201
On Thu, Apr 30, 2015 at 3:42 PM, Sascha Hauer wrote:
> On Mon, Apr 20, 2015 at 05:27:26PM +0800, pi-cheng.chen wrote:
>> This patch implements MT8173 specific cpufreq driver with OPP table defined
>> in the driver code.
>>
>> Signed-off-by: pi-cheng.chen
>> ---
>> drivers/cpufreq/Kconfig.arm
On Thu, Apr 30, 2015 at 3:42 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Mon, Apr 20, 2015 at 05:27:26PM +0800, pi-cheng.chen wrote:
This patch implements MT8173 specific cpufreq driver with OPP table defined
in the driver code.
Signed-off-by: pi-cheng.chen pi-cheng.c...@linaro.org
---
On Fri, Apr 24, 2015 at 8:55 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Fri, Apr 24, 2015 at 02:46:25PM +0800, Pi-Cheng Chen wrote:
Hi Sascha,
Thanks for reviewing.
On Thu, Apr 23, 2015 at 8:01 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Mon, Apr 20, 2015 at 05:27:26PM +0800
Hi Mark,
Thanks for reviewing.
On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland wrote:
> On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
>> This patch adds voltage supplies and clocks used by MT8173 cpufreq driver.
>>
>> Signed-off-by: pi-cheng.chen
>
> This series has no bindings
On Thu, Apr 23, 2015 at 8:56 PM, Mark Rutland wrote:
>> +/*
>> + * This is a temporary solution until we have new OPPv2 bindings. Therefore
>> we
>> + * could describe the OPPs with (freq, volt, volt) tuple properly in device
>> + * tree.
>> + */
>> +
>> +/* OPP table for LITTLE cores of MT8173
.o
>> obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173-cpufreq.c
>> new file mode 100644
>> index 000..a310e72
>> --- /dev/null
>> +++ b/drivers/cpufre
: Pi-Cheng Chen pi-cheng.c...@linaro.org
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope
On Thu, Apr 23, 2015 at 8:56 PM, Mark Rutland mark.rutl...@arm.com wrote:
+/*
+ * This is a temporary solution until we have new OPPv2 bindings. Therefore
we
+ * could describe the OPPs with (freq, volt, volt) tuple properly in device
+ * tree.
+ */
+
+/* OPP table for LITTLE cores of
Hi Mark,
Thanks for reviewing.
On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
This patch adds voltage supplies and clocks used by MT8173 cpufreq driver.
Signed-off-by: pi-cheng.chen
On Tue, Apr 21, 2015 at 2:28 AM, Paul Bolle wrote:
> On Mon, 2015-04-20 at 17:27 +0800, pi-cheng.chen wrote:
>> --- a/drivers/cpufreq/Kconfig.arm
>> +++ b/drivers/cpufreq/Kconfig.arm
>
>> +config ARM_MT8173_CPUFREQ
>> + bool "Mediatek MT8173 CPUFreq support"
>> + depends on ARCH_MEDIATEK
> obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
>> obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
>> obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173-cpufreq
On Tue, Apr 21, 2015 at 2:28 AM, Paul Bolle pebo...@tiscali.nl wrote:
On Mon, 2015-04-20 at 17:27 +0800, pi-cheng.chen wrote:
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
+config ARM_MT8173_CPUFREQ
+ bool Mediatek MT8173 CPUFreq support
+ depends on
/cpufreq/mt8173-cpufreq.c
@@ -0,0 +1,509 @@
+/*
+* Copyright (c) 2015 Linaro Ltd.
+* Author: Pi-Cheng Chen pi-cheng.c...@linaro.org
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published
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