Hi Moritz,
Thanks. I will take care of these suggestions in next version
Regards,
Punnaiah
On Fri, Aug 21, 2015 at 10:12 PM, Moritz Fischer
wrote:
> Hi all,
>
> sorry for HTML mail spam last night ... couple of nits below
>
> On Wed, Aug 5, 2015 at 8:19 PM, Punnaiah Choudary K
Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- None
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul wrote:
> On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
>
>> + list_for_each_entry_safe(desc, next, >done_list, node) {
>> + dma_async_tx_callback callback;
>> +
On Thu, Aug 20, 2015 at 11:22 AM, Vinod Koul wrote:
> On Thu, Aug 06, 2015 at 08:49:32AM +0530, Punnaiah Choudary Kalluri wrote:
>> Device-tree binding documentation for Xilinx zynqmp dma engine used in
>> Zynq UltraScale+ MPSoC.
>>
>> Signed-off-by: Punnaiah Choudary
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
+ list_for_each_entry_safe(desc, next, chan-done_list, node) {
+ dma_async_tx_callback callback;
+ void
On Thu, Aug 20, 2015 at 11:22 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:32AM +0530, Punnaiah Choudary Kalluri wrote:
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Modified the defines to start with ZYNQMP_DMA perfix
- Changed
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v4:
- Modified the defines to start with ZYNQMP_DMA perfix
- Changed
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
On Fri, Jul 17, 2015 at 2:38 PM, Vinod Koul wrote:
> On Fri, Jul 17, 2015 at 09:54:48AM +0530, punnaiah choudary kalluri wrote:
> your MUA is wrapping lines funny, please fix it
>
>> >> I have explored using the virt-dma to reduce the common list processing,
>>
On Fri, Jul 17, 2015 at 2:38 PM, Vinod Koul vinod.k...@intel.com wrote:
On Fri, Jul 17, 2015 at 09:54:48AM +0530, punnaiah choudary kalluri wrote:
your MUA is wrapping lines funny, please fix it
I have explored using the virt-dma to reduce the common list processing,
But
in this driver
On Fri, Jul 17, 2015 at 8:35 AM, Vinod Koul wrote:
> On Fri, Jul 17, 2015 at 06:22:42AM +0530, punnaiah choudary kalluri wrote:
>> On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul wrote:
>> > On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote:
>>
On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul wrote:
> On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote:
>> +/* Register Offsets */
>> +#define ISR 0x100
>> +#define IMR 0x104
>> +#define IER
On Fri, Jul 17, 2015 at 8:35 AM, Vinod Koul vinod.k...@intel.com wrote:
On Fri, Jul 17, 2015 at 06:22:42AM +0530, punnaiah choudary kalluri wrote:
On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote
On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul vinod.k...@intel.com wrote:
On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote:
+/* Register Offsets */
+#define ISR 0x100
+#define IMR 0x104
+#define IER
Device like MT29F32G08ABCDBJ4 have a writesize/oobsize of 16K/1216 Bytes.
So, increasing the maximum ecc placement locations to 1216
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Corrected the oobsize in commit message and code from 1260 to 1216
- Aligned the new values
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type to bool
Changes in v2
Hi Brian,
Any further review comments on this patch ?
Could you consider this driver for 4.3 version if you think the
changes are fine.?
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for Arasan Nand Flash Controller u
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files
Hi Brian,
Any further review comments on this patch ?
Could you consider this driver for 4.3 version if you think the
changes are fine.?
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Added the basic driver for Arasan
Device like MT29F32G08ABCDBJ4 have a writesize/oobsize of 16K/1216 Bytes.
So, increasing the maximum ecc placement locations to 1216
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- Corrected the oobsize in commit message and code from 1260 to 1216
- Aligned
Enable SG support for Zynq SOC family devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/net/ethernet/cadence/macb.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index caeb395
Enable SG support for Zynq SOC family devices.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
drivers/net/ethernet/cadence/macb.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence
...@gmail.com;
> b...@decadent.org.uk; mika.westerb...@linux.intel.com; "Bean Huo 霍斌
> 斌 (beanhuo)"; Harini Katakam; Anurag Kumar Vulisha; Srikanth Vemula;
> linux-kernel@vger.kernel.org; broo...@kernel.org; linux-
> m...@lists.infradead.org; Anirudha Sarangi; Punnaiah Choudary Kalluri
...@decadent.org.uk; mika.westerb...@linux.intel.com; Bean Huo 霍斌
斌 (beanhuo); Harini Katakam; Anurag Kumar Vulisha; Srikanth Vemula;
linux-kernel@vger.kernel.org; broo...@kernel.org; linux-
m...@lists.infradead.org; Anirudha Sarangi; Punnaiah Choudary Kalluri
Subject: Re: [RFC PATCH] mtd: spi-nor: Added flag
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type to
bool
Changes
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61
> -Original Message-
> From: Shubhrajyoti Datta [mailto:omaplinuxker...@gmail.com]
> Sent: Monday, June 15, 2015 8:35 PM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; Kumar Gala; M
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Corrected the function header documentation
- Framework expects bus-width value
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- Corrected the function header documentation
- Framework
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files
-Original Message-
From: Shubhrajyoti Datta [mailto:omaplinuxker...@gmail.com]
Sent: Monday, June 15, 2015 8:35 PM
To: Punnaiah Choudary Kalluri
Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
ijc+devicet...@hellion.org.uk; Kumar Gala; Michal Simek; Soren
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:38 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in xilinx zynq soc for interfacing
> the nand flash memory.
>
> Signed-o
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:37 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller. This controller is
> used in xilinx zynq soc for interfacing the nand and nor/sram memory
> devices.
>
> Signed-off-by: Punnaiah C
Ping.
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for Arasan Nand Flash Controller used in
> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> correction.
>
> Signed-off-by: Punnaiah C
Ping.
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:37 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:38 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory
On Mon, Jun 8, 2015 at 10:27 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for zynqmp dma engine used in Zynq
> UltraScale+ MPSoC. The initial release of this driver supports
> only memory to memory transfers.
>
> Signed-off-by: Punnaiah Choudary Kalluri
>
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v4:
- none
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected the kconfig to use tristate selection
- Corrected the GPL licence ident
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Currently not implemented the memclk rate adjustments. I
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/dma/Kconfig |6 +
drivers/dma/xilinx/Makefile |1 +
drivers/dma
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v7:
- Corrected the kconfig to use tristate selection
- Corrected the GPL
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v7:
- Currently not implemented the memclk rate
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
drivers/dma/Kconfig |6 +
drivers/dma/xilinx/Makefile
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create
On Mon, Jun 8, 2015 at 10:27 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary
k; Soren Brinkmann;
> devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
> ran27...@gmail.com
> Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
> GQSPI controller
>
> O
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
ran27...@gmail.com
Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
GQSPI controller
On Fri, May 22, 2015 at 08:43:54PM +0530, Harini Katakam
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Chnages in v3:
- Removed unused variables
- Avoided busy loop and used jifies based implementation
- Fixed
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Chnages in v3:
- Removed unused variables
- Avoided busy loop and used jifies based
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27
On Thu, May 21, 2015 at 2:19 AM, Brian Norris
wrote:
> On Tue, May 19, 2015 at 07:19:17PM +0530, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correct
On Thu, May 21, 2015 at 2:19 AM, Brian Norris
computersforpe...@gmail.com wrote:
On Tue, May 19, 2015 at 07:19:17PM +0530, Punnaiah Choudary Kalluri wrote:
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
Tested-by: Michal Simek
---
Changes in v2:
- Added missing of.h to avoid kbuild system report error
---
drivers
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- None.
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
Changes in v2:
- None.
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
Tested-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Added missing of.h to avoid
From: Punnaiah Choudary Kalluri
Under heavy Rx load, observed that the Hw is updating the USED bit
and it is not updating the received frame status to the BD control
field. This could be lack of resources for processing the BDs at high
data rates. Driver drops the frame associated with this BD
On Tue, Apr 28, 2015 at 9:08 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
> On 04/13, Punnaiah Choudary Kalluri wrote:
>> Add driver for arm pl353 static memory controller nand interface with
>> HW ECC support. This controller is used in xilinx zynq soc for interfacing
>
On Tue, Apr 28, 2015 at 7:33 PM, Josh Cartwright wrote:
> On Tue, Apr 28, 2015 at 09:14:26AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wro
Hi Ben,
I will take care of the boundary conditions for both lower and upper
limits and update the patches accordingly.
Thanks,
Punnaiah
On Tue, Apr 28, 2015 at 8:41 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
>> +/**
>> + * pl353_smc_set_cycles - Set memory timing parameters
>> + * @dev:
On Tue, Apr 28, 2015 at 9:08 PM, Ben Shelton ben.shel...@ni.com wrote:
Hi Punnaiah,
On 04/13, Punnaiah Choudary Kalluri wrote:
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash
Hi Ben,
I will take care of the boundary conditions for both lower and upper
limits and update the patches accordingly.
Thanks,
Punnaiah
On Tue, Apr 28, 2015 at 8:41 PM, Ben Shelton ben.shel...@ni.com wrote:
Hi Punnaiah,
+/**
+ * pl353_smc_set_cycles - Set memory timing parameters
+ *
From: Punnaiah Choudary Kalluri punnaiah.choudary.kall...@xilinx.com
Under heavy Rx load, observed that the Hw is updating the USED bit
and it is not updating the received frame status to the BD control
field. This could be lack of resources for processing the BDs at high
data rates. Driver drops
On Tue, Apr 28, 2015 at 7:33 PM, Josh Cartwright jo...@ni.com wrote:
On Tue, Apr 28, 2015 at 09:14:26AM +0530, punnaiah choudary kalluri wrote:
On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris computersforpe...@gmail.com
wrote:
On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri
On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>>
On Wed, Mar 25, 2015 at 7:32 PM, Richard Weinberger wrote:
> Some Micron NAND chips offer an on-die ECC (AKA internal ECC)
> feature. It is useful when the host-platform does not offer
> multi-bit ECC and software ECC is not feasible.
>
> Based on original work by David Mosberger
>
>
On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>> Am 27.04.2015 um 23:35 schrieb Ben Shelton:
>> > I tested this against the latest version of the PL353 NAND driver that
>> > Punnaiah
>> > has been working to upstream
On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
computersforpe...@gmail.com wrote:
On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
Am 27.04.2015 um 23:35 schrieb Ben Shelton:
I tested this against the latest version of the PL353 NAND driver that
Punnaiah
has been working
On Wed, Mar 25, 2015 at 7:32 PM, Richard Weinberger rich...@nod.at wrote:
Some Micron NAND chips offer an on-die ECC (AKA internal ECC)
feature. It is useful when the host-platform does not offer
multi-bit ECC and software ECC is not feasible.
Based on original work by David Mosberger
On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
computersforpe...@gmail.com wrote:
On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wrote:
On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
computersforpe...@gmail.com wrote:
On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard
Hi Josh,
> -Original Message-
> From: Josh Cartwright [mailto:jo...@ni.com]
> Sent: Friday, April 24, 2015 1:21 AM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org
On Thu, Apr 23, 2015 at 6:19 PM, Michal Simek wrote:
> On 04/16/2015 03:56 PM, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correction.
>>
On Thu, Apr 23, 2015 at 6:19 PM, Michal Simek mon...@monstr.eu wrote:
On 04/16/2015 03:56 PM, Punnaiah Choudary Kalluri wrote:
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah
Hi Josh,
-Original Message-
From: Josh Cartwright [mailto:jo...@ni.com]
Sent: Friday, April 24, 2015 1:21 AM
To: Punnaiah Choudary Kalluri
Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
ijc+devicet...@hellion.org.uk; ga...@codeaurora.org; r...@landley.net;
Michal
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/Kconfig |7 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/arasan_nfc.c
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode 100644
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
drivers/mtd/nand/Kconfig |7 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd
Hi Paul Bolle
On Tue, Apr 14, 2015 at 12:19 AM, Paul Bolle wrote:
> On Mon, 2015-04-13 at 21:41 +0530, Punnaiah Choudary Kalluri wrote:
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>
>> +config PL353_SMC
>> + bool "ARM PL353 St
Hi Paul Bolle,
On Tue, Apr 14, 2015 at 12:27 AM, Paul Bolle wrote:
> On Mon, 2015-04-13 at 21:42 +0530, Punnaiah Choudary Kalluri wrote:
>
>> --- a/drivers/mtd/nand/Makefile
>> +++ b/drivers/mtd/nand/Makefile
>
>> +obj-$(CONFIG_MTD_NAND_PL353) += pl353_nand.
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