On 9/5/2016 12:21 PM, Thierry Reding wrote:
> On Mon, Aug 08, 2016 at 03:39:15PM +0530, Vignesh R wrote:
>> From: Jyri Sarha
>>
>> Remove all pm_runtime gets and puts, and dummy pm_ops, from the
>> pwm-tipwmss driver as there is no direct hardware access. The runtime PM
>> needs
On 9/5/2016 12:21 PM, Thierry Reding wrote:
> On Mon, Aug 08, 2016 at 03:39:15PM +0530, Vignesh R wrote:
>> From: Jyri Sarha
>>
>> Remove all pm_runtime gets and puts, and dummy pm_ops, from the
>> pwm-tipwmss driver as there is no direct hardware access. The runtime PM
>> needs to be enabled,
Dmitry,
On 6/16/2016 4:17 PM, Vignesh R wrote:
[...]
>>> On 5/20/2016 10:04 PM, Dmitry Torokhov wrote:
On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
> There are rotary-encoders where GPIO lines reflect the actual position
> of the rotary encoder dial. For example, if
Dmitry,
On 6/16/2016 4:17 PM, Vignesh R wrote:
[...]
>>> On 5/20/2016 10:04 PM, Dmitry Torokhov wrote:
On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
> There are rotary-encoders where GPIO lines reflect the actual position
> of the rotary encoder dial. For example, if
On 5/22/2016 3:56 PM, Uwe Kleine-König wrote:
> Hello,
>
> On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
>> There are rotary-encoders where GPIO lines reflect the actual position
>> of the rotary encoder dial. For example, if dial points to 9, then four
>> GPIO lines connected to
On 5/22/2016 3:56 PM, Uwe Kleine-König wrote:
> Hello,
>
> On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
>> There are rotary-encoders where GPIO lines reflect the actual position
>> of the rotary encoder dial. For example, if dial points to 9, then four
>> GPIO lines connected to
On 5/20/2016 10:04 PM, Dmitry Torokhov wrote:
> On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
>> There are rotary-encoders where GPIO lines reflect the actual position
>> of the rotary encoder dial. For example, if dial points to 9, then four
>> GPIO lines connected to the rotary
On 5/20/2016 10:04 PM, Dmitry Torokhov wrote:
> On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
>> There are rotary-encoders where GPIO lines reflect the actual position
>> of the rotary encoder dial. For example, if dial points to 9, then four
>> GPIO lines connected to the rotary
On 5/6/2016 3:46 PM, Vignesh R wrote:
> On AM335x, ti_am335x_tsc can wake up the system from suspend, mark the
> IRQ as wakeup capable, so that device irq is not disabled during system
> suspend.
>
> Signed-off-by: Vignesh R
> ---
> drivers/input/touchscreen/ti_am335x_tsc.c |
On 5/6/2016 3:46 PM, Vignesh R wrote:
> On AM335x, ti_am335x_tsc can wake up the system from suspend, mark the
> IRQ as wakeup capable, so that device irq is not disabled during system
> suspend.
>
> Signed-off-by: Vignesh R
> ---
> drivers/input/touchscreen/ti_am335x_tsc.c | 7 +++
> 1
Hi Cyrille,
On 4/13/2016 10:53 PM, Cyrille Pitchen wrote:
[...]
> +
> +static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
> + const struct spi_nor_basic_flash_parameter *params,
> + const struct spi_nor_modes *modes)
> +{
> +
Hi Cyrille,
On 4/13/2016 10:53 PM, Cyrille Pitchen wrote:
[...]
> +
> +static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
> + const struct spi_nor_basic_flash_parameter *params,
> + const struct spi_nor_modes *modes)
> +{
> +
On 04/14/2016 10:42 PM, Rob Herring wrote:
> On Thu, Apr 14, 2016 at 03:48:21PM +0530, Vignesh R wrote:
>> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
>> DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
>> MODE-3 is limited to 48MHz. Hence, switch to
On 04/14/2016 10:42 PM, Rob Herring wrote:
> On Thu, Apr 14, 2016 at 03:48:21PM +0530, Vignesh R wrote:
>> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
>> DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
>> MODE-3 is limited to 48MHz. Hence, switch to
On 02/16/2016 06:08 PM, Mark Brown wrote:
> On Tue, Feb 16, 2016 at 01:30:49PM +0530, Vignesh R wrote:
>> On 02/13/2016 04:07 AM, Mark Brown wrote:
>>> On Thu, Feb 11, 2016 at 11:03:50AM +0530, Vignesh R wrote:
On 02/10/2016 01:06 AM, Mark Brown wrote:
>
> Looking at this I can't help
On 02/16/2016 06:08 PM, Mark Brown wrote:
> On Tue, Feb 16, 2016 at 01:30:49PM +0530, Vignesh R wrote:
>> On 02/13/2016 04:07 AM, Mark Brown wrote:
>>> On Thu, Feb 11, 2016 at 11:03:50AM +0530, Vignesh R wrote:
On 02/10/2016 01:06 AM, Mark Brown wrote:
>
> Looking at this I can't help
Hi Brain,
On 11/11/2015 4:53 AM, Brian Norris wrote:
> Hi Vignesh,
>
> Sorry for the late review. I did not have time to review much back when
> you submitted your first RFCs for this.
>
> On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
>> diff --git a/include/linux/spi/spi.h
Hi Brain,
On 11/11/2015 4:53 AM, Brian Norris wrote:
> Hi Vignesh,
>
> Sorry for the late review. I did not have time to review much back when
> you submitted your first RFCs for this.
>
> On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
>> diff --git a/include/linux/spi/spi.h
On 8/4/2015 9:21 PM, Mark Brown wrote:
> On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote:
>
>> @use_mmap_mode: Some SPI controller chips are optimized for interacting
>> with serial flash memories. These chips have memory mapped interface,
>> through which entire serial flash memory
On 8/4/2015 9:21 PM, Mark Brown wrote:
On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote:
@use_mmap_mode: Some SPI controller chips are optimized for interacting
with serial flash memories. These chips have memory mapped interface,
through which entire serial flash memory slave can
Hi,
On 7/28/2015 10:53 PM, Dmitry Torokhov wrote:
> On Tue, Jul 28, 2015 at 06:53:52PM +0530, Vignesh R wrote:
>> Hi Dmitry,
>>
>> On 07/25/2015 01:46 AM, Dmitry Torokhov wrote:
>>> On Fri, Jul 24, 2015 at 12:26:19PM -0700, Dmitry Torokhov wrote:
On Fri, Jul 24, 2015 at 02:14:57PM -0500, Rob
Hi,
On 7/28/2015 10:53 PM, Dmitry Torokhov wrote:
On Tue, Jul 28, 2015 at 06:53:52PM +0530, Vignesh R wrote:
Hi Dmitry,
On 07/25/2015 01:46 AM, Dmitry Torokhov wrote:
On Fri, Jul 24, 2015 at 12:26:19PM -0700, Dmitry Torokhov wrote:
On Fri, Jul 24, 2015 at 02:14:57PM -0500, Rob Herring
On 7/16/2015 9:01 PM, R, Vignesh wrote:
> Hi,
>
> On 07/16/2015 03:24 AM, Paul Walmsley wrote:
>> Hi,
>>
>> some comments.
>>
>> On Wed, 3 Jun 2015, Vignesh R wrote:
>>
>>> Add hwmod entries for the PWMSS on DRA7.
>>>
>>>
On 7/16/2015 9:01 PM, R, Vignesh wrote:
Hi,
On 07/16/2015 03:24 AM, Paul Walmsley wrote:
Hi,
some comments.
On Wed, 3 Jun 2015, Vignesh R wrote:
Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal
Hi,
On 07/16/2015 03:24 AM, Paul Walmsley wrote:
> Hi,
>
> some comments.
>
> On Wed, 3 Jun 2015, Vignesh R wrote:
>
>> Add hwmod entries for the PWMSS on DRA7.
>>
>> Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
>> equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
>> As
Hi,
On 07/16/2015 01:57 AM, Paul Walmsley wrote:
> On Wed, 15 Jul 2015, Paul Walmsley wrote:
>
>> On Wed, 3 Jun 2015, Vignesh R wrote:
>>
>>> Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
>>> smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
>>> program
Hi,
On 07/16/2015 03:24 AM, Paul Walmsley wrote:
Hi,
some comments.
On Wed, 3 Jun 2015, Vignesh R wrote:
Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
As per AM57x TRM
Hi,
On 07/16/2015 01:57 AM, Paul Walmsley wrote:
On Wed, 15 Jul 2015, Paul Walmsley wrote:
On Wed, 3 Jun 2015, Vignesh R wrote:
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to
On 6/16/2015 4:07 PM, Vignesh R wrote:
>
> Hi,
>
> When using omap_hsmmc driver, if sd-card repeatedly plug unplugged
> multiple times quickly, card enumeration stops after few iterations.
> This can be easily reproduced on DRA74X EVM which uses omap_hsmmc driver.
> This patch series addresses
On 6/16/2015 4:07 PM, Vignesh R wrote:
Hi,
When using omap_hsmmc driver, if sd-card repeatedly plug unplugged
multiple times quickly, card enumeration stops after few iterations.
This can be easily reproduced on DRA74X EVM which uses omap_hsmmc driver.
This patch series addresses the
Hi,
On 3/2/2015 4:39 AM, Paul Walmsley wrote:
> Hi
>
> On Fri, 27 Feb 2015, Vignesh R wrote:
>
>> From: "Poddar, Sourav"
>>
>> This patch adds hwmod data for hdq/1w driver on AM43xx.
>>
>> Signed-off-by: Sourav Poddar
>> [vigne...@ti.com: Ported patch to v4.0-rc1]
>> Signed-off-by: Vignesh R
Hi,
On 3/2/2015 4:39 AM, Paul Walmsley wrote:
Hi
On Fri, 27 Feb 2015, Vignesh R wrote:
From: Poddar, Sourav sourav.pod...@ti.com
This patch adds hwmod data for hdq/1w driver on AM43xx.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
[vigne...@ti.com: Ported patch to v4.0-rc1]
Hi,
On 2/27/2015 4:04 PM, Arnd Bergmann wrote:
> On Friday 27 February 2015 16:01:03 Vignesh R wrote:
>> On Friday 27 February 2015 03:25 PM, Arnd Bergmann wrote:
>>> On Friday 27 February 2015 14:54:17 Vignesh R wrote:
+- compatible : should be "ti,omap3-1w" or "ti,am43xx-hdq"
>>>
>>>
Hi,
On 2/27/2015 4:04 PM, Arnd Bergmann wrote:
On Friday 27 February 2015 16:01:03 Vignesh R wrote:
On Friday 27 February 2015 03:25 PM, Arnd Bergmann wrote:
On Friday 27 February 2015 14:54:17 Vignesh R wrote:
+- compatible : should be ti,omap3-1w or ti,am43xx-hdq
Do not use wildcards in
On 1/20/2015 5:23 PM, Lee Jones wrote:
> On Wed, 07 Jan 2015, Vignesh R wrote:
>
>> In one shot mode, sequencer automatically disables all enabled steps at
>> the end of each cycle. (both ADC steps and TSC steps) Hence these steps
>> need not be saved in reg_se_cache for clearing these steps at
On 1/20/2015 5:23 PM, Lee Jones wrote:
On Wed, 07 Jan 2015, Vignesh R wrote:
In one shot mode, sequencer automatically disables all enabled steps at
the end of each cycle. (both ADC steps and TSC steps) Hence these steps
need not be saved in reg_se_cache for clearing these steps at a later
On Tue, 11 Nov 2014, Vignesh R wrote:
> In one shot mode, sequencer automatically disables all enabled steps
> at the end of each cycle. (both ADC steps and TSC steps) Hence these
> steps need not be saved in reg_se_cache for clearing these steps at a
> later stage.
> Also, when ADC wakes up
On Tue, 11 Nov 2014, Vignesh R wrote:
In one shot mode, sequencer automatically disables all enabled steps
at the end of each cycle. (both ADC steps and TSC steps) Hence these
steps need not be saved in reg_se_cache for clearing these steps at a
later stage.
Also, when ADC wakes up
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