We are hadrcoding length everywhere in the watchpoint code.
Introduce macros for the length and use them.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 +++
arch/powerpc/kernel/hw_breakpoint.c | 4 ++--
arch/powerpc/kernel/ptrace.c | 6
not supported with DABR. Test
unaligned watchpoint only when DAWR is present.
Ravi Bangoria (7):
Powerpc/Watchpoint: Introduce macros for watchpoint length
Powerpc/Watchpoint: Fix length calculation for unaligned target
Powerpc/Watchpoint: Fix ptrace code that muck around with address/len
Powe
: Ravi Bangoria
---
.../selftests/powerpc/ptrace/ptrace-hwbreak.c | 32 +--
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
b/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
index 916e97f5f8b1
second doubleword. So fix that as well.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 4 ++--
arch/powerpc/kernel/ptrace.c | 9 +++--
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h
b/arch
Instead of blindly ignoring the exception, get actual address range
by analysing an instruction, and ignore only if actual range does
not overlap with user specified range.
Note: The behavior is unchanged for 8xx.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpo
including next doubleword in the length.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 2 +
arch/powerpc/kernel/dawr.c | 6 +--
arch/powerpc/kernel/hw_breakpoint.c | 67 +---
arch/powerpc/kernel/process.c| 3 ++
ar
overlap
TESTED: Partial overlap
TESTED: Partial overlap
TESTED: No overlap
TESTED: Full overlap
success: perf_hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace/perf-hwbreak.c | 111 +-
1 file changed, 110 insertions(+), 1 deletion(-)
diff --git a
success: ptrace-hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace/ptrace-hwbreak.c | 571 +++---
1 file changed, 361 insertions(+), 210 deletions(-)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
b/tools/testing/selftests/powerpc/ptrace/ptrace
We are hadrcoding length everywhere in the watchpoint code.
Introduce macros for the length and use them.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 +++
arch/powerpc/kernel/hw_breakpoint.c | 4 ++--
arch/powerpc/kernel/ptrace.c | 6
On 10/12/19 2:21 PM, Christophe Leroy wrote:
Le 10/10/2019 à 06:44, Ravi Bangoria a écrit :
@Christophe, Is patch5 works for you on 8xx?
Getting the following :
root@vgoip:~# ./ptrace-hwbreak
test: ptrace-hwbreak
tags: git_version:v5.4-rc2-710-gf0082e173fe4-dirty
PTRACE_SET_DEBUGREG
On 10/12/19 1:01 PM, Christophe Leroy wrote:
Le 10/10/2019 à 08:25, Ravi Bangoria a écrit :
On 10/10/19 10:14 AM, Ravi Bangoria wrote:
@Christophe, Is patch5 works for you on 8xx?
Getting the following :
root@vgoip:~# ./ptrace-hwbreak
test: ptrace-hwbreak
tags: git_version:v5.4
On 10/10/19 10:14 AM, Ravi Bangoria wrote:
@Christophe, Is patch5 works for you on 8xx?
Getting the following :
root@vgoip:~# ./ptrace-hwbreak
test: ptrace-hwbreak
tags: git_version:v5.4-rc2-710-gf0082e173fe4-dirty
PTRACE_SET_DEBUGREG, WO, len: 1: Ok
PTRACE_SET_DEBUGREG, WO, len: 2: Ok
@Christophe, Is patch5 works for you on 8xx?
Getting the following :
root@vgoip:~# ./ptrace-hwbreak
test: ptrace-hwbreak
tags: git_version:v5.4-rc2-710-gf0082e173fe4-dirty
PTRACE_SET_DEBUGREG, WO, len: 1: Ok
PTRACE_SET_DEBUGREG, WO, len: 2: Ok
PTRACE_SET_DEBUGREG, WO, len: 4: Ok
PTRACE_SET_
On 9/25/19 9:36 AM, Ravi Bangoria wrote:
v3: https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-July/193339.html
v3->v4:
- Instead of considering exception as extraneous when dar is outside of
user specified range, analyse the instruction and check for overlap
between u
Instead of blindly ignoring the exception, get actual address range
by analysing an instruction, and ignore only if actual range does
not overlap with user specified range.
Note: The behaviour is unchanged for 8xx.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpo
overlap
TESTED: Partial overlap
TESTED: Partial overlap
TESTED: No overlap
TESTED: Full overlap
success: perf_hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace/perf-hwbreak.c | 111 +-
1 file changed, 110 insertions(+), 1 deletion(-)
diff --git a
On the 8xx, signals are generated after executing the instruction.
So no need to manually single-step on 8xx.
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace/ptrace-hwbreak.c | 26 ++-
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/tools/testing
it
with ep88xc_defconfig.
Ravi Bangoria (5):
Powerpc/Watchpoint: Fix length calculation for unaligned target
Powerpc/Watchpoint: Don't ignore extraneous exceptions blindly
Powerpc/Watchpoint: Rewrite ptrace-hwbreak.c selftest
Powerpc/Watchpoint: Add dar outside test in perf-hwbreak.c selft
success: ptrace-hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace/ptrace-hwbreak.c | 571 +++---
1 file changed, 361 insertions(+), 210 deletions(-)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
b/tools/testing/selftests/powerpc/ptrace/ptrace
including next doubleword in the length. Plus, fix
ptrace code which is messing up address/len.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/debug.h | 1 +
arch/powerpc/include/asm/hw_breakpoint.h | 9 +++--
arch/powerpc/kernel/dawr.c | 6 ++--
arch/powe
On 9/4/19 3:17 PM, Srikar Dronamraju wrote:
There are some problems in perf stat when using a combination of repeat and
interval options. This series tries to fix them.
For the series:
Tested-by: Ravi Bangoria
forever and ultimately hangs the system.
Note that ptrace anyway works in one-shot mode and thus for ptrace
we don't change the behaviour. It's up to ptrace user to take care
of this.
Signed-off-by: Ravi Bangoria
Acked-by: Naveen N. Rao
---
v1->v2:
- v1:
https://lists.ozlabs.
forever and ultimately hangs the system.
Note that ptrace anyway works in one-shot mode and thus for ptrace
we don't change the behaviour. It's up to ptrace user to take care
of this.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 49 +++
From: Christophe Leroy
On 8xx, breakpoints stop after executing the instruction, so
stepping/emulation is not needed. Move it into a sub-function and
remove the #ifdefs.
Signed-off-by: Christophe Leroy
Reviewed-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 60
I've prepared my patch on top of Christophe's patch as it's easy
to change stepping_handler() rather than hw_breakpoint_handler().
2nd patch is the actual fix.
Christophe Leroy (1):
powerpc/hw_breakpoint: move instruction stepping out of
hw_breakpoint_handler()
Ravi Bangoria
On 9/4/19 8:12 PM, Naveen N. Rao wrote:
Ravi Bangoria wrote:
On Powerpc64, watchpoint match range is double-word granular. On
a watchpoint hit, DAR is set to the first byte of overlap between
actual access and watched range. And thus it's quite possible that
DAR does not point inside
On 8/28/19 11:44 AM, Christophe Leroy wrote:
Le 10/07/2019 à 06:54, Ravi Bangoria a écrit :
ptrace-hwbreak.c selftest is logically broken. On powerpc, when
watchpoint is created with ptrace, signals are generated before
executing the instruction and user has to manually singlestep
the
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 1ea770f6c1971bc101b3741f4d88b0b4ea5c4181
Gitweb:
https://git.kernel.org/tip/1ea770f6c1971bc101b3741f4d88b0b4ea5c4181
Author:Ravi Bangoria
AuthorDate:Thu, 22 Aug 2019 14:20:45 +05:30
'node' sort key")
Reported-by: Nageswara R Sastry
Signed-off-by: Ravi Bangoria
---
tools/perf/builtin-c2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
index 9e6cc86..fc68a94 100644
--- a/tools/perf/builtin-c2
Mikey, mpe ...
Any thoughts?
LGTM. For the series,
Reviewed-By: Ravi Bangoria
Commit-ID: 916c31fff946fae0e05862f9b2435fdb29fd5090
Gitweb: https://git.kernel.org/tip/916c31fff946fae0e05862f9b2435fdb29fd5090
Author: Ravi Bangoria
AuthorDate: Tue, 11 Jun 2019 08:31:09 +0530
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 15 Jul 2019 07:59:05 -0300
perf
Hi Numfor,
On 7/11/19 2:15 AM, Numfor Mbiziwo-Tiapo wrote:
> -static bool perf_evsel__should_store_id(struct perf_evsel *counter)
> +static bool perf_evsel__should_store_id(struct perf_evsel *counter, int
> run_idx)
> {
> - return STAT_RECORD || counter->attr.read_format & PERF_FORMAT_ID;
>
On 7/10/19 11:57 AM, Christophe Leroy wrote:
>
>
> Le 10/07/2019 à 06:54, Ravi Bangoria a écrit :
>> On Powerpc64, watchpoint match range is double-word granular. On
>> a watchpoint hit, DAR is set to the first byte of overlap between
>> actual access and watched
v2: https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-July/192967.html
v2->v3:
- Rebase to powerpc/next
- PATCH 2/3 is new
Ravi Bangoria (3):
Powerpc64/Watchpoint: Fix length calculation for unaligned target
Powerpc64/Watchpoint: Don't ignore extraneous exceptions
Powerpc64/Wa
d. So, let
kernel pass it on to user and let user decide what to do with it
instead of silently ignoring it. The drawback is, it can generate
false positive events.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
di
including next doubleword in the length. Plus, fix
ptrace code which is messing up address/len.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/debug.h | 1 +
arch/powerpc/include/asm/hw_breakpoint.h | 9 +++--
arch/powerpc/kernel/dawr.c | 6 ++--
arch/powe
UNALIGNED, WO, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, RO, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, RW, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, DAWR_MAX_LEN, RW, len: 512: Ok
success: ptrace-hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace
On 7/6/19 1:56 PM, Christophe Leroy wrote:
>
>
> Le 03/07/2019 à 08:20, Ravi Bangoria a écrit :
>>
>>
>> On 6/28/19 9:25 PM, Christophe Leroy wrote:
>>> On 8xx, breakpoints stop after executing the instruction, so
>>> stepping/emulation i
On 6/28/19 9:17 PM, Christophe Leroy wrote:
> The purpose of this series is to reduce the amount of #ifdefs
> in ptrace.c
>
> This is a first try. Most of it is done, there are still some #ifdefs that
> could go away.
>
> Please comment and tell whether it is worth continuing in that direction.
On 6/28/19 9:25 PM, Christophe Leroy wrote:
> On 8xx, breakpoints stop after executing the instruction, so
> stepping/emulation is not needed. Move it into a sub-function and
> remove the #ifdefs.
>
> Signed-off-by: Christophe Leroy
> ---
Reviewed-by: Ravi Bangoria
J
On 7/3/19 9:49 AM, Eric Biggers wrote:
> On Wed, Jul 03, 2019 at 09:29:39AM +0530, Ravi Bangoria wrote:
>> Hi Eric,
>>
>> On 7/3/19 9:25 AM, Eric Biggers wrote:
>>> On Wed, Jul 03, 2019 at 09:09:55AM +0530, Ravi Bangoria wrote:
>>>>
>&g
Hi Eric,
On 7/3/19 9:25 AM, Eric Biggers wrote:
> On Wed, Jul 03, 2019 at 09:09:55AM +0530, Ravi Bangoria wrote:
>>
>>
>> On 7/2/19 11:13 AM, Eric Biggers wrote:
>>>
>>> T
On 7/2/19 11:13 AM, Eric Biggers wrote:
>
> Title: possible deadlock in uprobe_clear_state
> Last occurred: 164 days ago
> Reported: 201 days ago
> Branches: Mainline
> Dashboar
On 6/28/19 9:18 PM, Christophe Leroy wrote:
> Create ippc_gethwdinfo() to handle PPC_PTRACE_GETHWDBGINFO and
> reduce ifdef mess
>
> Signed-off-by: Christophe Leroy
> ---
Reviewed-by: Ravi Bangoria
On 6/28/19 9:18 PM, Christophe Leroy wrote:
> ptrace_triggered() is declared in asm/hw_breakpoint.h and
> only needed when CONFIG_HW_BREAKPOINT is set, so move it
> into hw_breakpoint.c
>
> Signed-off-by: Christophe Leroy
Reviewed-by: Ravi Bangoria
> - ret = put_user(child->thread.debug.dac1, datalp);
> -#else
> - dabr_fake = ((child->thread.hw_brk.address &
> (~HW_BRK_TYPE_DABR)) |
> - (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
> - ret = put_user(dabr_fake, datalp);
> -#endif
> + case PTRACE_GET_DEBUGREG:
> + ret = ptrace_get_debugreg(child, addr, datalp);
> break;
> - }
>
> case PTRACE_SET_DEBUGREG:
> ret = ptrace_set_debugreg(child, addr, data);
>
Otherwise,
Reviewed-by: Ravi Bangoria
On 6/28/19 9:17 PM, Christophe Leroy wrote:
> diff --git a/arch/powerpc/kernel/ptrace/ptrace-adv.c
> b/arch/powerpc/kernel/ptrace/ptrace-adv.c
> new file mode 100644
> index ..86e71fa6c5c8
> --- /dev/null
> +++ b/arch/powerpc/kernel/ptrace/ptrace-adv.c
> @@ -0,0 +1,487 @@
> +/* SPDX
UNALIGNED, WO, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, RO, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, RW, len: 6: Ok
PPC_PTRACE_SETHWDEBUG, DAWR_MAX_LEN, RW, len: 512: Ok
success: ptrace-hwbreak
Signed-off-by: Ravi Bangoria
---
.../selftests/powerpc/ptrace
including next doubleword in the length. Watchpoint
exception handler already ignores extraneous exceptions, so no
changes required for that.
Signed-off-by: Ravi Bangoria
---
v1->v2:
- v1: https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-June/192162.html
- No cosmetic patches.
- v1 fi
Commit-ID: 913a90bc5a3a06b1f04c337320e9aeee2328dd77
Gitweb: https://git.kernel.org/tip/913a90bc5a3a06b1f04c337320e9aeee2328dd77
Author: Ravi Bangoria
AuthorDate: Tue, 4 Jun 2019 09:59:53 +0530
Committer: Ingo Molnar
CommitDate: Mon, 24 Jun 2019 19:19:22 +0200
perf/ioctl: Add check for
On 6/18/19 11:47 AM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 08:01 +0200, Christophe Leroy wrote:
>>
>> Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
>>> patch 1-3: Code refactor
>>> patch 4: Speedup disabling breakpoint
>>> patch 5: Fi
On 6/18/19 7:02 PM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
>> Watchpoint match range is always doubleword(8 bytes) aligned on
>> powerpc. If the given range is crossing doubleword boundary, we
>> need to increase the length such
On 6/18/19 12:16 PM, Christophe Leroy wrote:
>> +/* Maximum len for DABR is 8 bytes and DAWR is 512 bytes */
>> +static int hw_breakpoint_validate_len(struct arch_hw_breakpoint *hw)
>> +{
>> + u16 length_max = 8;
>> + u16 final_len;
>
> You should be more consistent in naming. If one is
On 6/18/19 12:01 PM, Christophe Leroy wrote:
>> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
>> index f002d286..265fac9fb3a4 100644
>> --- a/arch/powerpc/kernel/process.c
>> +++ b/arch/powerpc/kernel/process.c
>> @@ -793,10 +793,22 @@ static inline int set_dabr(
On 6/18/19 11:45 AM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
>> Directly setting dawr and dawrx with 0 should be enough to
>> disable watchpoint. No need to reset individual bits in
>> variable and then set in hw.
>
>
On 6/18/19 11:41 AM, Michael Neuling wrote:
> This is going to collide with this patch
> https://patchwork.ozlabs.org/patch/1109594/
Yeah, I'm aware of the patch. I just developed this on powerpc/next.
I'll rebase my patches accordingly once mpe picks up that patche.
On 6/18/19 11:51 AM, Christophe Leroy wrote:
>
>
> Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
>> Move feature availability check at the start of the function.
>> Rearrange comment to it's associated code. Use hw->address and
>> hw->len in the 512 byte
do_dabr() was renamed with do_break() long ago. But I still see
some comments mentioning do_dabr(). Replace it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 2 +-
arch/powerpc/kernel/ptrace.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
including next doubleword in the length. Watchpoint
exception handler already ignores extraneous exceptions, so no
changes required for that.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 7 ++--
arch/powerpc/kernel/hw_breakpoint.c | 44 +---
Remove unnecessary comments. Code itself is self explanatory.
And, ISA already talks about MRD field. I Don't think we need
to re-describe it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/process.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --
Move feature availability check at the start of the function.
Rearrange comment to it's associated code. Use hw->address and
hw->len in the 512 bytes boundary check(to write if statement
in a single line). Add spacing between code blocks.
Signed-off-by: Ravi Bangoria
---
arch/pow
patch 1-3: Code refactor
patch 4: Speedup disabling breakpoint
patch 5: Fix length calculation for unaligned targets
Ravi Bangoria (5):
Powerpc/hw-breakpoint: Replace stale do_dabr() with do_break()
Powerpc/hw-breakpoint: Refactor hw_breakpoint_arch_parse()
Powerpc/hw-breakpoint: Refactor
Directly setting dawr and dawrx with 0 should be enough to
disable watchpoint. No need to reset individual bits in
variable and then set in hw.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 ++-
arch/powerpc/kernel/process.c| 12
2 files
Peter / mpe,
Is the v2 looks good? If so, can anyone of you please pick this up.
On 6/4/19 9:59 AM, Ravi Bangoria wrote:
> perf_event_open() limits the sample_period to 63 bits. See
> commit 0819b2e30ccb ("perf: Limit perf_event_attr::sample_period
> to 63 bits"). Make ioctl()
watchpoint and thus this
instruction was emulated by emulate_step. But because handle_dabr_fault
did not restore emulated register state, r29 still contains stale
value in above register state.
Fixes: 5aae8a5370802 ("powerpc, hw_breakpoints: Implement hw_breakpoints for
64-bit se
watchpoint and thus this
instruction was emulated by emulate_step. But because handle_dabr_fault
did not restore emulated register state, r29 still contains stale
value in above register state.
Fixes: 5aae8a5370802 ("powerpc, hw_breakpoints: Implement hw_breakpoints for
64-bit ser
'perf version' on powerpc segfaults when used with non-supported
option:
# perf version -a
Segmentation fault (core dumped)
Fix this.
Signed-off-by: Ravi Bangoria
Reviewed-by: Kamalesh babulal
Tested-by: Mamatha Inamdar
---
tools/perf/builtin-version.c | 1 +
1 file changed, 1
maybe_unused,
^~
cc1: all warnings being treated as errors
mv: cannot stat './.builtin-kvm.o.tmp': No such file or directory
With the build fix:
Acked-by: Ravi Bangoria
On 6/7/19 11:20 AM, Michael Ellerman wrote:
> Ravi Bangoria writes:
>
>> Powerpc hw triggers watchpoint before executing the instruction.
>> To make trigger-after-execute behavior, kernel emulates the
>> instruction. If the instruction is 'load something i
On 6/7/19 6:20 AM, Michael Neuling wrote:
> On Thu, 2019-06-06 at 12:59 +0530, Ravi Bangoria wrote:
>> Powerpc hw triggers watchpoint before executing the instruction.
>> To make trigger-after-execute behavior, kernel emulates the
>> instruction. If the instruction is &#x
On 6/6/19 12:59 PM, Ravi Bangoria wrote:
> Powerpc hw triggers watchpoint before executing the instruction.
> To make trigger-after-execute behavior, kernel emulates the
> instruction. If the instruction is 'load something into non-
> volatile register', exception
worker_thread+0x444/0x560
kthread+0x160/0x1a0
ret_from_kernel_thread+0x5c/0x70
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/exceptions-64s.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s
erf-fuzzer).
Signed-off-by: Ravi Bangoria
---
kernel/events/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index abbd4b3b96c2..e44c90378940 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -5005,6 +5005,9 @@ static int perf_ev
On 5/30/19 2:08 PM, Ravi Bangoria wrote:
>> ---
>> Subject: perf: Fix perf_sample_regs_user()
>> From: Peter Zijlstra
>> Date: Wed May 29 14:37:24 CEST 2019
>>
>> perf_sample_regs_user() uses 'current->mm' to test for the presence of
>&g
obsoletes: bf05fc25f268 ("powerpc/perf: Fix oops when kthread execs
> user process")
>
> Reported-by: Ravi Bangoria
> Reported-by: Young Xiao <92siuy...@gmail.com>
> Cc: Ravi Bangoria
> Cc: Naveen N. Rao
> Cc: Michael Ellerman
> Cc: Jiri Olsa
> Cc: Freder
t;
> Modify the warning message. "--user-regs=?" should be applied to show
> the available registers for --user-regs.
>
> Signed-off-by: Kan Liang
> ---
For patch 1 and 2,
Tested-by: Ravi Bangoria
Minor neat. Should we update document as well? May be something like:
t
On 5/13/19 2:26 PM, Peter Zijlstra wrote:
> On Mon, May 13, 2019 at 09:42:13AM +0200, Peter Zijlstra wrote:
>> On Sat, May 11, 2019 at 08:12:16AM +0530, Ravi Bangoria wrote:
>>> Add a check for sample_period value sent from userspace. Negative
>>> value does not make
On 5/11/19 8:12 AM, Ravi Bangoria wrote:
> Consider a scenario where user creates two events:
>
> 1st event:
> attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
> attr.branch_sample_type = PERF_SAMPLE_BRANCH_ANY;
> fd = perf_event_open(attr, 0, 1, -1, 0);
>
nfig_bhrb(-1) will set mmcra to -1.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/perf/core-book3s.c | 6 --
arch/powerpc/perf/power8-pmu.c | 3 +++
arch/powerpc/perf/power9-pmu.c | 3 +++
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arc
Add a check for sample_period value sent from userspace. Negative
value does not make sense. And in powerpc arch code this could cause
a recursive PMI leading to a hang (reported when running perf-fuzzer).
Signed-off-by: Ravi Bangoria
---
kernel/events/core.c | 3 +++
1 file changed, 3
pu | grep Thread
Thread(s) per core:4
Apart from that, for the series:
Tested-by: Ravi Bangoria
On 3/18/19 11:56 PM, Arnaldo Carvalho de Melo wrote:
> I added this:
>
> Cc: Sukadev Bhattiprolu
> Fixes: 2a81fa3bb5ed ("perf vendor events: Add power8 PMU events")
>
> - Arnaldo
Sure. Thanks a lot Arnaldo!
On 3/1/19 3:56 PM, Jiri Olsa wrote:
> Ravi Bangoria reported that we fail with empty
> numa node with following message:
>
> $ lscpu
> NUMA node0 CPU(s):
> NUMA node1 CPU(s): 0-4
>
> $ sudo ./perf c2c report
> node/cpu topology bugFailed setup nodes
&g
On 2/28/19 9:52 PM, Jiri Olsa wrote:
> how about attached change (untested)?
LGTM. Would you mind sending a patch.
>
> but I wonder there are some other hidden
> bugs wrt empty node
>
> jirka
>
>
> ---
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 4272763a5e96..
perf c2c report fails if system has empty numa node(0 cpus):
$ lscpu
NUMA node0 CPU(s):
NUMA node1 CPU(s): 0-4
$ sudo ./perf c2c report
node/cpu topology bugFailed setup nodes
Fix this.
Reported-by: Nageswara R Sastry
Signed-off-by: Ravi Bangoria
---
tools/perf/util/cpumap.c
On 2/7/19 3:09 PM, Mamatha Inamdar wrote:
> This patch is to remove following hardware events
> from JSON file which are not supported on POWER8
>
Acked-by: Ravi Bangoria
On 2/8/19 2:03 PM, Ravi Bangoria wrote:
>
>
> On 2/6/19 7:06 PM, Oleg Nesterov wrote:
>> Ravi, I am on vacation till the end of this week, can't read your patch
>> carefully.
>>
>> I am not sure I fully understand the problem, but shouldn't w
Commit-ID: f0fabf9c897327abd39018aefb5029aff8c7e133
Gitweb: https://git.kernel.org/tip/f0fabf9c897327abd39018aefb5029aff8c7e133
Author: Ravi Bangoria
AuthorDate: Tue, 29 Jan 2019 18:54:12 +0530
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 4 Feb 2019 11:32:14 -0300
perf mem/c2c
trylock
> fails.
I don't understand binderfs code much so I'll let Sherry comment on this.
>
> In any case, I don't think memalloc_nofs_save() is what we need, see below.
>
> On 02/04, Ravi Bangoria wrote:
>>
>> There can be a deadloc
sh Kumar K.V
Signed-off-by: Ravi Bangoria
---
kernel/events/uprobes.c | 24
1 file changed, 24 insertions(+)
diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c
index 8aef47ee7bfa..8be39a83d83a 100644
--- a/kernel/events/uprobes.c
+++ b/kernel/events/uprobe
On 2/1/19 1:24 PM, Ravi Bangoria wrote:
> I ran fuzzer for couple of hours but I didn't see any crash with
> your previous patch.
>
> I'll try this newer one as well.
I ran fuzzer for ~8 hrs and no lockup so far.
Thanks.
Hi Jiri,
On 2/1/19 1:13 PM, Jiri Olsa wrote:
> On Thu, Jan 31, 2019 at 09:27:11AM +0100, Jiri Olsa wrote:
>> On Wed, Jan 30, 2019 at 07:36:48PM +0100, Jiri Olsa wrote:
>>
>> SNIP
>>
>>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>>> index 280a72b3a553..22ec63a0782e 100644
>>> --- a/k
Hi Andi,
On 1/25/19 9:30 PM, Andi Kleen wrote:
>> [Fri Jan 25 10:28:53 2019] perf: interrupt took too long (2501 > 2500),
>> lowering kernel.perf_event_max_sample_rate to 79750
>> [Fri Jan 25 10:29:08 2019] perf: interrupt took too long (3136 > 3126),
>> lowering kernel.perf_event_max_sample_rat
://lists.ozlabs.org/pipermail/linuxppc-dev/2018-December/182596.html
Signed-off-by: Ravi Bangoria
---
tools/perf/Documentation/perf-c2c.txt | 16
tools/perf/Documentation/perf-mem.txt | 2 +-
tools/perf/arch/powerpc/util/Build| 1 +
tools/perf/arch/powerpc/util/mem-events.c | 11
On 1/29/19 3:23 PM, Arnaldo Carvalho de Melo wrote:
> I think its just a tooling side, I haven't processed it because I'm
> waiting for Ravi to address Jiri's comment, after that I'm happy to put
> it in my perf/urgent branch that I'm brewing to push to Ingo today or
> tomorrow.
Ah.. Will try to
On 1/14/19 9:44 AM, Ravi Bangoria wrote:
> Powerpc hw does not have inbuilt latency filter (--ldlat) for mem-load
> event and, perf_mem_events by default includes ldlat=30 which is
> causing failure on powerpc. Refactor code to support perf mem/c2c on
> powerpc.
>
> Thi
On 1/21/19 12:44 AM, Tony Jones wrote:
> While updating Perf to work with Python3 and Python2 I noticed that the
> stat-cpi script was dumping core.
[...]
> Fixes: 1fcd03946b52 ("perf stat: Update per-thread shadow stats")
> Signed-off-by: Tony Jones
Tested-by: Ravi Bangoria
nal change.
>>
>> Fix indentation issue, replace spaces with tab
>>
>> Signed-off-by: Seeteena Thoufeek
>> Reviewed-by: Ravi Bangoria
>
> hum, could you please add some info about testing those changes?
> (or even some global into 0/.. patch)
>
> thi
://lists.ozlabs.org/pipermail/linuxppc-dev/2018-December/182596.html
Signed-off-by: Ravi Bangoria
---
tools/perf/Documentation/perf-c2c.txt | 16
tools/perf/Documentation/perf-mem.txt | 2 +-
tools/perf/arch/x86/util/Build| 1 +
tools/perf/arch/x86/util/mem-events.c | 25
201 - 300 of 837 matches
Mail list logo
