time, which
is probably the case, otherwise you wouldn't need the mutex. In other
words, if you're going to do this, you might as well toss the mutex
entirely as it's about the same effect..
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about that, your top wakeups are from br_stp_enable_bridge,
but that is only 26 a second - that doesn't explain a context switch
rate of 150,000 a second..
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about that, your top wakeups are from br_stp_enable_bridge,
but that is only 26 a second - that doesn't explain a context switch
rate of 150,000 a second..
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time, which
is probably the case, otherwise you wouldn't need the mutex. In other
words, if you're going to do this, you might as well toss the mutex
entirely as it's about the same effect..
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2
96 1
0 0 0 1925556 4768 11610400 0 02 147329 0 1
99 0
What did oprofile show? It should be able to narrow down what
function(s) are responsible for the CPU usage..
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4768 11610400 0 02 147329 0 1
99 0
What did oprofile show? It should be able to narrow down what
function(s) are responsible for the CPU usage..
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attempt to
try and issue NCQ commands with result taskfile requested, since the hardware
doesn't allow this.
Signed-off-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c.before2 2007-11-25
16:28:58.0 -0600
+++ linux-2.6.24-rc3-git1edit/d
is disabled, so the kernel still tries to load the serial
driver for it, which finds there's no port there.
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Are you sure forcedeth even supports that feature? I haven't seen any
code for it, and certainly it should never be enabled by default..
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a way we can make this work for any upstream HT bridge,
rather than only for specific NVIDIA chipsets?
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make this work for any upstream HT bridge,
rather than only for specific NVIDIA chipsets?
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forcedeth even supports that feature? I haven't seen any
code for it, and certainly it should never be enabled by default..
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is disabled, so the kernel still tries to load the serial
driver for it, which finds there's no port there.
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attempt to
try and issue NCQ commands with result taskfile requested, since the hardware
doesn't allow this.
Signed-off-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c.before2 2007-11-25
16:28:58.0 -0600
+++ linux-2.6.24-rc3-git1edit/drivers
Jeff Garzik wrote:
Robert Hancock wrote:
Based on a quick look at sata_mv it appears it sets a 64-bit DMA mask
unconditionally, but for non-ATA_PROT_DMA commands (which includes all
ATAPI), it just falls back to ata_qc_issue_prot which issues via the
legacy SFF interface and can only handle
limit
depending on the connected device, unless there is really a way to issue
ATAPI commands with this EDMA interface, as the TODO list in sata_mv.c
suggests may be possible..
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limit
depending on the connected device, unless there is really a way to issue
ATAPI commands with this EDMA interface, as the TODO list in sata_mv.c
suggests may be possible..
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Jeff Garzik wrote:
Robert Hancock wrote:
Based on a quick look at sata_mv it appears it sets a 64-bit DMA mask
unconditionally, but for non-ATA_PROT_DMA commands (which includes all
ATAPI), it just falls back to ata_qc_issue_prot which issues via the
legacy SFF interface and can only handle
() if we try
and send result taskfile commands while NCQ commands are still active, since the
hardware doesn't allow this.
Signed-off-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc3-git1/drivers/ata/sata_nv.c 2007-11-20 17:40:09.0
-0600
+++ linux-2.6.24-rc3-git1edit/drive
is needed for ATAPI
devices).
Signed-off-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c.before2 2007-11-22
19:42:28.0 -0600
+++ linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c 2007-11-22
19:48:25.0 -0600
@@ -247,6
portable code
that works everywhere.
Also, x86 doesn't prohibit unaligned accesses, but I believe they have a
significant performance cost and are best avoided where possible.
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havior changed in the somewhat recent past..
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omeone has a cleaner
proposal than the "try spinlock" approach?
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Tejun Heo wrote:
Hello, Robert.
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA
mode on systems with memory located above 4GB. We need to delay setting the
64-bit DMA mask until the PRD table and padding buffer are allocated so that
they don't
Tejun Heo wrote:
Hello, Robert.
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA
mode on systems with memory located above 4GB. We need to delay setting the
64-bit DMA mask until the PRD table and padding buffer are allocated so that
they don't
in the somewhat recent past..
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More majordomo
() if we try
and send result taskfile commands while NCQ commands are still active, since the
hardware doesn't allow this.
Signed-off-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc3-git1/drivers/ata/sata_nv.c 2007-11-20 17:40:09.0
-0600
+++ linux-2.6.24-rc3-git1edit/drivers/ata
a cleaner
proposal than the try spinlock approach?
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is needed for ATAPI
devices).
Signed-off-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c.before2 2007-11-22
19:42:28.0 -0600
+++ linux-2.6.24-rc3-git1edit/drivers/ata/sata_nv.c 2007-11-22
19:48:25.0 -0600
@@ -247,6 +247,7 @@
void
portable code
that works everywhere.
Also, x86 doesn't prohibit unaligned accesses, but I believe they have a
significant performance cost and are best avoided where possible.
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Vincent Fortier wrote:
Le mardi 20 novembre 2007 à 18:56 -0600, Robert Hancock a écrit :
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA
mode on systems with memory located above 4GB. We need to delay setting the
64-bit DMA mask until the PRD table and padding buffer
Vincent Fortier wrote:
Le mardi 20 novembre 2007 à 18:56 -0600, Robert Hancock a écrit :
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA
mode on systems with memory located above 4GB. We need to delay setting the
64-bit DMA mask until the PRD table and padding buffer
recently selinux will cause accesses by a
non-leader thread to fail when accessing files through /proc/self.
So far the more I look at the current /proc/self behavior the
more I am convinced it is broken, and useless. Please help me see
where it is useful, so we can justify keeping it.
--
Robert
g case where we care if we abort outstanding commands and
the normal case with a RESULT_TF command where we do)..
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is needed for
ATAPI devices). Also, explicitly set a 32-bit DMA mask before allocating the
legacy buffers since setting the DMA mask affects both ports and we need to
ensure the second port's buffers are allocated properly (fixes a problem
with the previous version of this patch).
Signed-off-by: Robert
d this or iTCO_wdt /dev/watchdog not
being active after a default desktop installation.
There is.. it's called "root privileges".
i`d be interested if i`m the only one who thinks this is strange/dangerous
behaviour.
regards
roland
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Robert Hancock Saskatoon, SK, Canada
To e
/watchdog not
being active after a default desktop installation.
There is.. it's called root privileges.
i`d be interested if i`m the only one who thinks this is strange/dangerous
behaviour.
regards
roland
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To email, remove nospam from [EMAIL
is needed for
ATAPI devices). Also, explicitly set a 32-bit DMA mask before allocating the
legacy buffers since setting the DMA mask affects both ports and we need to
ensure the second port's buffers are allocated properly (fixes a problem
with the previous version of this patch).
Signed-off-by: Robert
and
the normal case with a RESULT_TF command where we do)..
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recently selinux will cause accesses by a
non-leader thread to fail when accessing files through /proc/self.
So far the more I look at the current /proc/self behavior the
more I am convinced it is broken, and useless. Please help me see
where it is useful, so we can justify keeping it.
--
Robert
Tejun Heo wrote:
Robert Hancock wrote:
Tejun Heo wrote:
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in
ADMA mode
on systems with memory located above 4GB. We need to delay setting
the 64-bit
DMA mask until the PRD table and padding buffer
Tejun Heo wrote:
Robert Hancock wrote:
Tejun Heo wrote:
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in
ADMA mode
on systems with memory located above 4GB. We need to delay setting
the 64-bit
DMA mask until the PRD table and padding buffer
and read them. How long the drive
will stall trying to read that sector before giving up and returning an
error is up to the drive. I'm not sure if the MMC command set allows any
way to tell the drive to give up more quickly or not..
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Robert Hancock Saskatoon, SK, Canada
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and read them. How long the drive
will stall trying to read that sector before giving up and returning an
error is up to the drive. I'm not sure if the MMC command set allows any
way to tell the drive to give up more quickly or not..
--
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To email, remove
Tejun Heo wrote:
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA mode
on systems with memory located above 4GB. We need to delay setting the 64-bit
DMA mask until the PRD table and padding buffer are allocated so that they don't
get allocated
Tejun Heo wrote:
Robert Hancock wrote:
This fixes some problems with ATAPI devices on nForce4 controllers in ADMA mode
on systems with memory located above 4GB. We need to delay setting the 64-bit
DMA mask until the PRD table and padding buffer are allocated so that they don't
get allocated
is needed for ATAPI
devices).
Signed-off-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c.before 2007-11-13
19:04:18.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-13
19:02:34.0 -0600
@@ -247,6
-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc1-git10/drivers/ata/sata_nv.c2007-11-01
20:01:32.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-13
19:01:09.0 -0600
@@ -791,11 +797,13 @@
static void nv_adma_tf_read(struct ata_po
Tejun Heo wrote:
Could be done.. but, I don't want to constrain the ADMA APRD/CPB area in
that way (there are some dual-socket Opteron boxes with this controller,
forcing an allocation below 4GB for this could force a non-optimal node
allocation I think..) To do this I'd have to raise the mask
Tejun Heo wrote:
Could be done.. but, I don't want to constrain the ADMA APRD/CPB area in
that way (there are some dual-socket Opteron boxes with this controller,
forcing an allocation below 4GB for this could force a non-optimal node
allocation I think..) To do this I'd have to raise the mask
-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc1-git10/drivers/ata/sata_nv.c2007-11-01
20:01:32.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-13
19:01:09.0 -0600
@@ -791,11 +797,13 @@
static void nv_adma_tf_read(struct ata_port *ap
is needed for ATAPI
devices).
Signed-off-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c.before 2007-11-13
19:04:18.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-13
19:02:34.0 -0600
@@ -247,6 +247,7 @@
void
Tejun Heo wrote:
How about always initialize DMA mask to ATA_DMA_MASK regardless of ADMA
mode such that PRD and PAD buffers are always accessible by register
mode and just raising PCI dma mask and queue bounce limit if ADMA mode
is active?
Could be done.. but, I don't want to constrain the
-by: Robert Hancock <[EMAIL PROTECTED]>
--- linux-2.6.24-rc1-git10/drivers/ata/sata_nv.c2007-11-01
20:01:32.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-10
19:57:47.0 -0600
@@ -247,6 +247,7 @@
void __iomem*ctl
to sata_nv.c from Robert Hancock see
https://bugzilla.redhat.com/show_bug.cgi?id=351451) seem to be
very sensitive in this area. Whenever I got them to oops, I did
not have much time to get anything read on the screen.
I managed under the patched 2.6.24-rc1-git10 to manually load
sata_nv
to sata_nv.c from Robert Hancock see
https://bugzilla.redhat.com/show_bug.cgi?id=351451) seem to be
very sensitive in this area. Whenever I got them to oops, I did
not have much time to get anything read on the screen.
I managed under the patched 2.6.24-rc1-git10 to manually load
sata_nv
-by: Robert Hancock [EMAIL PROTECTED]
--- linux-2.6.24-rc1-git10/drivers/ata/sata_nv.c2007-11-01
20:01:32.0 -0600
+++ linux-2.6.24-rc1-git10edit/drivers/ata/sata_nv.c2007-11-10
19:57:47.0 -0600
@@ -247,6 +247,7 @@
void __iomem*ctl_block;
void
Tejun Heo wrote:
How about always initialize DMA mask to ATA_DMA_MASK regardless of ADMA
mode such that PRD and PAD buffers are always accessible by register
mode and just raising PCI dma mask and queue bounce limit if ADMA mode
is active?
Could be done.. but, I don't want to constrain the
the adma=0 parameter to the sata_nv module (not sure how this
would be done on Suse's setup) or pass sata_nv.adma=0 on the kernel
command line if sata_nv is built into the kernel. If that does help, I
could ask you to test patches :-)
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to reinforce...
sata_nv support and bug fixes are primarily done right now through the
valiant efforts of Robert Hancock (with assists from Alan, Tejun, and
others).
Robert's job is difficult, because he has no hardware documentation[1],
and NVIDIA does not seem to be helping out much with driver
to reinforce...
sata_nv support and bug fixes are primarily done right now through the
valiant efforts of Robert Hancock (with assists from Alan, Tejun, and
others).
Robert's job is difficult, because he has no hardware documentation[1],
and NVIDIA does not seem to be helping out much with driver
the adma=0 parameter to the sata_nv module (not sure how this
would be done on Suse's setup) or pass sata_nv.adma=0 on the kernel
command line if sata_nv is built into the kernel. If that does help, I
could ask you to test patches :-)
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Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
That means now we get the region 2 at e000 and everything is fine.
This looks more reasonable, though it's still mapped the BAR over top of
a region that's
(or whatever it's called) on my notebook and is clean
but I'm not sure it's using NCQ (I don't even know if it'd log
spurious completions somewhere).
Which driver is installed for the SATA controller in Windows, the
chipset-manufacturer-provided AHCI driver or the default Microsoft
driver? You'd need the
driver is installed for the SATA controller in Windows, the
chipset-manufacturer-provided AHCI driver or the default Microsoft
driver? You'd need the AHCI driver installed for NCQ to be used.
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errors are the same and unfortunately the lack of
verbosity as well.
Ok, that's it. Any help is much appreciated.
Thanks
Rainer
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, and the card indicates DMA support,
which libata tries to use but which doesn't work. It looks like it never
tried falling back to PIO after DMA failed. Seems like a deficiency in
the speed-down logic?
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drives goes into hard reset
failures), .config, lspci -v output.
Are there any chances that using 2.6.23 will improve/fix this? Any other
suggestions?
I would consider it an hardware problem, but since it started at one big
io thingy and is persistent since then I am a bit sceptic.
--
Robert
s. It seems unlikely that
this many drives from multiple vendors would have the exact same,
relatively obscure problem..
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drives goes into hard reset
failures), .config, lspci -v output.
Are there any chances that using 2.6.23 will improve/fix this? Any other
suggestions?
I would consider it an hardware problem, but since it started at one big
io thingy and is persistent since then I am a bit sceptic.
--
Robert
.
I'll keep your email in my todo list and add the drive to the blacklist
once the problem is verified.
I agree that something seems fishy with this. It seems unlikely that
this many drives from multiple vendors would have the exact same,
relatively obscure problem..
--
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, and the card indicates DMA support,
which libata tries to use but which doesn't work. It looks like it never
tried falling back to PIO after DMA failed. Seems like a deficiency in
the speed-down logic?
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.. the received packet should
just get dropped.
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.. the received packet should
just get dropped.
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Linus Torvalds wrote:
On Tue, 30 Oct 2007, Robert Hancock wrote:
You have to, anyway. Even now the MMCONFIG stuff uses CONF1 cycles for
startup.
If it does, it's not by necessity. As soon as you read the table location out
of the ACPI tables you can start using it, and that shouldn't require
Alan Cox wrote:
On Mon, 29 Oct 2007 22:17:40 -0600
Robert Hancock <[EMAIL PROTECTED]> wrote:
In the sata_nv driver, when running in ADMA mode, we can do 64-bit DMA.
However, when an ATAPI device like a DVD drive is connected, we can't
use ADMA mode, and so we have to abide by the restri
Linus Torvalds wrote:
On Tue, 30 Oct 2007, Arjan van de Ven wrote:
the problem is... you're not supposed to mix both types of accesses.
You have to, anyway. Even now the MMCONFIG stuff uses CONF1 cycles for
startup.
If it does, it's not by necessity. As soon as you read the table
Linus Torvalds wrote:
On Tue, 30 Oct 2007, Arjan van de Ven wrote:
the problem is... you're not supposed to mix both types of accesses.
You have to, anyway. Even now the MMCONFIG stuff uses CONF1 cycles for
startup.
If it does, it's not by necessity. As soon as you read the table
Alan Cox wrote:
On Mon, 29 Oct 2007 22:17:40 -0600
Robert Hancock [EMAIL PROTECTED] wrote:
In the sata_nv driver, when running in ADMA mode, we can do 64-bit DMA.
However, when an ATAPI device like a DVD drive is connected, we can't
use ADMA mode, and so we have to abide by the restrictions
Linus Torvalds wrote:
On Tue, 30 Oct 2007, Robert Hancock wrote:
You have to, anyway. Even now the MMCONFIG stuff uses CONF1 cycles for
startup.
If it does, it's not by necessity. As soon as you read the table location out
of the ACPI tables you can start using it, and that shouldn't require
be switched out on the port, so the mask might need to be
updated at runtime..
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vicky wrote:
Hi,
Can Read-Only(RO) Section/Data of kernel can ever be paged out memory?
-Vicky
All kernel code and data is non-swappable in Linux..
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is this?
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More maj
ow_bug.cgi?id=251493
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is this?
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vicky wrote:
Hi,
Can Read-Only(RO) Section/Data of kernel can ever be paged out memory?
-Vicky
All kernel code and data is non-swappable in Linux..
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be switched out on the port, so the mask might need to be
updated at runtime..
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the body
ged in months beyond taking the
defaults during make oldconfig looks like:
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beyond taking the
defaults during make oldconfig looks like:
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Greg KH wrote:
On Thu, Oct 25, 2007 at 04:22:35PM -0700, Jesse Barnes wrote:
I think Greg doesn't like it, even though we don't have an alternative
at this point...
Yes, I didn't like it, Ivan didn't like it, and I got reports that it
wasn't even needed at all once you upgraded your BIOS to
rformance on one workload using
a predicated instruction instead of a branch on newer Xeons in such a case.
I suspect that if branch prediction fails often, the data dependency
created by the cmov, etc. is less expensive than the pipeline flush
required by mispredicts..
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Robert Hancock
-acpi-motherboard-resources.patch
This patch was dropped because it was merged into mainline or a subsystem tree
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Subject: MMCONFIG: validate against ACPI motherboard resources
From: Robert Hancock <[EMAIL PROTECTED]>
This path adds vali
-acpi-motherboard-resources.patch
This patch was dropped because it was merged into mainline or a subsystem tree
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Subject: MMCONFIG: validate against ACPI motherboard resources
From: Robert Hancock [EMAIL PROTECTED]
This path adds validation
workload using
a predicated instruction instead of a branch on newer Xeons in such a case.
I suspect that if branch prediction fails often, the data dependency
created by the cmov, etc. is less expensive than the pipeline flush
required by mispredicts..
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Robert Hancock Saskatoon, SK
Greg KH wrote:
On Thu, Oct 25, 2007 at 04:22:35PM -0700, Jesse Barnes wrote:
I think Greg doesn't like it, even though we don't have an alternative
at this point...
Yes, I didn't like it, Ivan didn't like it, and I got reports that it
wasn't even needed at all once you upgraded your BIOS to
Rajkumar S wrote:
On 10/24/07, Robert Hancock <[EMAIL PROTECTED]> wrote:
Rajkumar S wrote:
Hello,
I am using a Core 2 Duo E6750 CPU on an intel DG33FB mother board with
4GB Ram, running Debian Lenny.
Since the box has 4 GB ram I compiled a big mem kernel, but the
machine is very slow
.)
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mark all of RAM as cachable.
When the top memory starts being used with the bigmem kernel it causes a
major slowdown. Check for a BIOS update from Intel, first.
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.)
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