Re: [RFC PATCH v2 1/9] crypto: qce: Add core driver implementation

Hi Herbert, On 04/28/2014 11:59 AM, Herbert Xu wrote: > On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote: >> >> +#define QCE_MAJOR_VERSION5 0x05 >> +#define QCE_QUEUE_LENGTH50 > > What is the purpose of this software queue? Why can't you directly > feed the requests to the

Re: [RFC PATCH v2 1/9] crypto: qce: Add core driver implementation

Hi Herbert, On 04/28/2014 11:59 AM, Herbert Xu wrote: On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote: +#define QCE_MAJOR_VERSION5 0x05 +#define QCE_QUEUE_LENGTH50 What is the purpose of this software queue? Why can't you directly feed the requests to the hardware?

Re: [PATCH 1/2] dmaengine: qcom_bam_dma: Add v1.3.0 driver support

Hi Andy, Thanks for the patch! On 04/17/2014 12:45 AM, Andy Gross wrote: > This patch adds support for the v1.3.0 version of the BAM dma ip block. This > patch adds register access abstraction to deal with the changes to the > register > map between the two versions. Blocks of registers moved

Re: [PATCH 1/2] dmaengine: qcom_bam_dma: Add v1.3.0 driver support

Hi Andy, Thanks for the patch! On 04/17/2014 12:45 AM, Andy Gross wrote: This patch adds support for the v1.3.0 version of the BAM dma ip block. This patch adds register access abstraction to deal with the changes to the register map between the two versions. Blocks of registers moved

Re: [PATCH v2] ARM: qcom: Add initial APQ8064 SoC and IFC6410 board device trees

Hi Kumar, > + intc: interrupt-controller@200 { > + compatible = "qcom,msm-qgic2"; > + interrupt-controller; > + #interrupt-cells = <3>; > + reg = < 0x0200 0x1000 >, > +

Re: [PATCH v2] ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees

Hi Kumar, > diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts > b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts > new file mode 100644 > index 000..5e6f456 > --- /dev/null > +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts > @@ -0,0 +1,12 @@ > +#include "qcom-ipq8064-v1.0.dtsi" > + > +/ { > +

Re: [PATCH v2] ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees

Hi Kumar, snip diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts new file mode 100644 index 000..5e6f456 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -0,0 +1,12 @@ +#include qcom-ipq8064-v1.0.dtsi + +/ { +

Re: [PATCH v2] ARM: qcom: Add initial APQ8064 SoC and IFC6410 board device trees

Hi Kumar, snip + intc: interrupt-controller@200 { + compatible = qcom,msm-qgic2; + interrupt-controller; + #interrupt-cells = 3; + reg = 0x0200 0x1000 , +

Re: [PATCH 2/9] crypto: qce: Add register defines

Hi Srini, Thanks for the comments. On 04/04/2014 12:23 PM, Srinivas Kandagatla wrote: > > Minor nitpicks. > > On 03/04/14 17:17, Stanimir Varbanov wrote: >> +#define REQ_SIZE17 /* bit 20-17 */ > > I would have defined macros like this with _SHIFT at the end, something > like this:

Re: [PATCH 2/9] crypto: qce: Add register defines

Hi Srini, Thanks for the comments. On 04/04/2014 12:23 PM, Srinivas Kandagatla wrote: Minor nitpicks. On 03/04/14 17:17, Stanimir Varbanov wrote: +#define REQ_SIZE17 /* bit 20-17 */ I would have defined macros like this with _SHIFT at the end, something like this:

Re: [Patch v8 2/2] dmaengine: add Qualcomm BAM dma driver

Hi Andy, Thanks for the patch. > +#define BAM_IRQ_SRCS_EE(pipe)(0x0800 + ((pipe) * 0x80)) > +#define BAM_IRQ_SRCS_MSK_EE(pipe)(0x0804 + ((pipe) * 0x80)) s/pipe/ee ? > +struct bam_chan { > + struct virt_dma_chan vc; > + > + struct bam_device *bdev; > + > + /*

Re: [Patch v8 2/2] dmaengine: add Qualcomm BAM dma driver

Hi Andy, Thanks for the patch. snip +#define BAM_IRQ_SRCS_EE(pipe)(0x0800 + ((pipe) * 0x80)) +#define BAM_IRQ_SRCS_MSK_EE(pipe)(0x0804 + ((pipe) * 0x80)) s/pipe/ee ? snip +struct bam_chan { + struct virt_dma_chan vc; + + struct bam_device *bdev; + + /*