The AUO G104SN02 V2 is an LVDS display which supports 6 and 8 bpc PSWG.
Add the corresponding connector type and 8 bpc as default bus_format.
Signed-off-by: Stefan Riedmueller
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel
The connector_type for following two EDT displays is missing:
- EDT ETM0430G0DH6
- EDT ETM0700G0BDH6
Both are parallel displays thus add the corresponding connector_type.
Signed-off-by: Stefan Riedmueller
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff
Add corresponding bus_format and bus_flags for the EDT ETM0430G0DH6
display.
Signed-off-by: Stefan Riedmueller
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index
When using devicetree, gpio_base holds its initial zero value which can
lead to a rejection if another gpio controller already occupies this
base. To prevent that collision let the gpio base be assigned dynamically.
Signed-off-by: Stefan Riedmueller
---
drivers/leds/leds-pca9532.c | 2 ++
1
hytec phyFLEX-i.MX6 Ouad module")
Signed-off-by: Stefan Riedmueller
Reviewed-by: Fabio Estevam
---
Changes in v2:
- Added fixes tag
- Added reviewed-by
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller
Reviewed-by: Fabio Estevam
---
Changes in v2
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller
---
Changes in v2:
- Use default pad ctl value instead of 0x8000
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
Setting the vmmc supplies is crucial since otherwise the supplying
regulators get disabled and the SD interfaces are no longer powered
which leads to system failures if the system is booted from that SD
interface.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6qdl-phytec-pfla02
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 8
1 file
version.
Signed-off-by: Stefan Riedmueller
---
drivers/mtd/nand/raw/nand_bbt.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c
index dced32a126d9..6e25a5ce5ba9 100644
--- a/drivers/mtd/nand/raw/nand_bbt.c
+++ b/drivers/mtd/nand
start Bit
The Restart Bit is cleared automatically and must not be cleared
manually as this would cause undefined behavior.
Signed-off-by: Dirk Bender
Signed-off-by: Stefan Riedmueller
---
No changes in v2
---
drivers/media/i2c/mt9p031.c | 25 +
1 file changed, 25 i
From: Enrico Scholz
Implement g_register and s_register v4l2_subdev_core_ops to access
camera register directly from userspace for debug purposes.
Signed-off-by: Enrico Scholz
Signed-off-by: Stefan Riedmueller
---
No changes in v2
---
drivers/media/i2c/mt9p031.c | 28
From: Christian Hemp
Evaluate the desired pixel clock polarity from the device tree.
Signed-off-by: Christian Hemp
Signed-off-by: Stefan Riedmueller
---
Changes in v2:
- Initialise endpoint bus_type field to V4L2_MBUS_PARALLEL since the
sensor only supports a parallel interface
From: Enrico Scholz
The real and requested clock can differ and because it is used to
calculate PLL values, the real clock rate should be read.
Signed-off-by: Enrico Scholz
Signed-off-by: Stefan Riedmueller
---
No changes in v2
---
drivers/media/i2c/mt9p031.c | 9 ++---
1 file changed, 6
Luebbe
Signed-off-by: Stefan Riedmueller
---
Changes in v2:
- Use unsigned int for num_fmts and loop variable in find_datafmt
- Remove superfluous const qualifier from find_datafmt
---
drivers/media/i2c/mt9p031.c | 50 +
1 file changed, 40 insertions(+), 10
From: Christian Hemp
Evaluate the desired pixel clock polarity from the device tree.
Signed-off-by: Christian Hemp
Signed-off-by: Stefan Riedmueller
---
drivers/media/i2c/Kconfig | 1 +
drivers/media/i2c/mt9p031.c | 19 ++-
include/media/i2c/mt9p031.h | 1 +
3 files
From: Enrico Scholz
Implement g_register and s_register v4l2_subdev_core_ops to access
camera register directly from userspace for debug purposes.
Signed-off-by: Enrico Scholz
Signed-off-by: Stefan Riedmueller
---
drivers/media/i2c/mt9p031.c | 28
1 file changed
start Bit
The Restart Bit is cleared automatically and must not be cleared
manually as this would cause undefined behavior.
Signed-off-by: Dirk Bender
Signed-off-by: Stefan Riedmueller
---
drivers/media/i2c/mt9p031.c | 25 +
1 file changed, 25 insertions(+)
diff --git
From: Enrico Scholz
The real and requested clock can differ and because it is used to
calculate PLL values, the real clock rate should be read.
Signed-off-by: Enrico Scholz
Signed-off-by: Stefan Riedmueller
---
drivers/media/i2c/mt9p031.c | 9 ++---
1 file changed, 6 insertions(+), 3
Luebbe
Signed-off-by: Stefan Riedmueller
---
drivers/media/i2c/mt9p031.c | 50 +
1 file changed, 40 insertions(+), 10 deletions(-)
diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c
index dc23b9ed510a..0002dd299ffa 100644
--- a/drivers/media/i2c
From: Christian Hemp
Make use of device tree alias for device enumeration to keep the device
order consistent with the naming in the datasheet.
Otherwise for the i.MX 6UL/ULL the ENET1 interface is enumerated as eth1
and ENET2 as eth0.
Signed-off-by: Christian Hemp
Signed-off-by: Stefan
Make use of generic touchscreen_properties structure to add axis
inversion and swapping capabilities. It's configurable via devicetree
properties:
touchscreen-inverted-x
touchscreen-inverted-y
touchscreen-swapped-x-y
Signed-off-by: Stefan Riedmueller
---
drivers/input/touchscreen/stmpe
Add devicetree bindings for i.MX6 based phyCORE-i.MX6, phyBOARD-Mira and
phyFLEX-i.MX6.
Signed-off-by: Stefan Riedmueller
---
Changes in v2:
- Use seperate description for each board instead of squashing them into
the standard board.
---
Documentation/devicetree/bindings/arm/fsl.yaml | 37
Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and
phyBOARD-Segin.
Signed-off-by: Stefan Riedmueller
---
Changes in v2:
- Use seperate description for each board instead of squashing them into
the standard board.
---
Documentation/devicetree/bindings/arm/fsl.yaml | 18
Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and
phyBOARD-Segin.
Signed-off-by: Stefan Riedmueller
---
Documentation/devicetree/bindings/arm/fsl.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b
Add devicetree bindings for i.MX6 based phyCORE-i.MX6, phyBOARD-Mira and
phyFLEX-i.MX6.
Signed-off-by: Stefan Riedmueller
---
Documentation/devicetree/bindings/arm/fsl.yaml | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b
The ECSPI interface is available on the expansion connector of every
PHYTEC phyBOARD-Segin. Move its definition to the board include file
for better reuse.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts | 14 --
arch/arm/boot/dts/imx6ul
The phyCORE-i.MX 6UL/ULL now comes either with NAND flash or eMMC. We
have to configure the populated memory type in the device tree files. So
the GPMI node gets disabled by default and only enabled if populated.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore
Move the imx6ul.dtsi include to the dts files so it is easier to reuse
the SOM dtsi for e.g. an i.MX 6ULL SOM.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 1 -
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts | 1 +
2 files changed, 1
The phyCORE-i.MX 6UL/ULL now can have eMMC instead of the NAND flash
memory. Add the eMMC node and disable it by default so it can be enabled
in case it is populated.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 24
1 file
Use the same name scheme for the phyBOARD-Segin and the phyCORE-i.MX
6UL as is used for the PHYTEC phyBOARD-Mira and phyCORE-i.MX 6.
This is only a cosmetic change and there is no functional change
intended.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/Makefile
@@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 PHYTEC Messtechnik GmbH
+ * Author: Stefan Riedmueller
+ */
+
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+ model = "PHYTEC phyCORE-i.MX6 ULL";
+ compatible = "phytec,imx6
To disable Ethernet interfaces in case they are not populated
make the FEC and Ethernet PHY status configurable in the dts files.
Also change the Ethernet PHYs labels to make them correspond to
the MDIO address.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore
with the phyBORAD-Segin. It comes in a
full featured option with either NAND flash or eMMC and a low cost option
only with NAND flash.
Stefan Riedmueller (10):
ARM: dts: imx6ul: phyboard-segin: Rename dts to PHYTEC name scheme
ARM: dts: imx6ul: segin: Add boot media to dts filename
ARM: dts: imx6ul
There is now a PHYTEC phyCORE-i.MX 6UL with eMMC instead of NAND flash
available. The dts filename needs to reflect that to differentiate both.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/Makefile | 2 +-
...l-phytec-segin-ff-rdk.dts
Fix node name for the user LEDs to prevent the pinctrl of the phyCORE's
leds node from being overwritten. Also use more generic names for user
LEDs.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 3 +--
arch/arm/boot/dts/imx6ul-phytec-segin-peb
Reduce the drive strength for the MDC, MDIO and TX pins of FEC1 and FEC2
on the phyBOARD-Segin to improve signal quality and EMC. Also disable
internal pull-ups on the MDC and MDIO pins.
Signed-off-by: Stefan Riedmueller
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 12
Add compatibility for the i.MX 6QuadPlus to make it behave like the
i.MX 6Quad, as both SOCs use the same operating points. Otherwise the
i.MX 6QuadPlus tries to run with 1.2 GHz even though it only
supports 1 GHz.
Signed-off-by: Stefan Riedmueller <s.riedmuel...@phytec.de>
---
drivers/c
Add compatibility for the i.MX 6QuadPlus to make it behave like the
i.MX 6Quad, as both SOCs use the same operating points. Otherwise the
i.MX 6QuadPlus tries to run with 1.2 GHz even though it only
supports 1 GHz.
Signed-off-by: Stefan Riedmueller
---
drivers/cpufreq/imx6q-cpufreq.c | 8
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