will be generated in the output
.so files from the jitted code.
Signed-off-by: Stephane Eranian
---
tools/build/feature/Makefile | 8 +++-
tools/perf/builtin-inject.c | 3 +++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/tools/build/feature/Makefile b/tools/build/feature/Makefile
On Thu, Nov 23, 2017 at 7:22 AM, Arnaldo Carvalho de Melo
wrote:
>
> Em Wed, Nov 22, 2017 at 06:25:41PM -0600, Kim Phillips escreveu:
> > From: Ben Gainey
> > @@ -405,7 +405,9 @@ jvmti_write_debug_info(void *agent, uint64_t code,
> > const char *file,
> >
On Thu, Nov 23, 2017 at 7:22 AM, Arnaldo Carvalho de Melo
wrote:
>
> Em Wed, Nov 22, 2017 at 06:25:41PM -0600, Kim Phillips escreveu:
> > From: Ben Gainey
> > @@ -405,7 +405,9 @@ jvmti_write_debug_info(void *agent, uint64_t code,
> > const char *file,
> > return -1;
> > }
>
On Mon, Nov 20, 2017 at 2:50 PM, Milian Wolff <milian.wo...@kdab.com> wrote:
> On Montag, 20. November 2017 21:53:04 CET Stephane Eranian wrote:
>> Hi,
>>
>> I have been using the perf script -F option on the latest perf and I
>> find it not very convenient to use
On Mon, Nov 20, 2017 at 2:50 PM, Milian Wolff wrote:
> On Montag, 20. November 2017 21:53:04 CET Stephane Eranian wrote:
>> Hi,
>>
>> I have been using the perf script -F option on the latest perf and I
>> find it not very convenient to use. I appreciate the + and
Hi,
I have been using the perf script -F option on the latest perf and I
find it not very convenient to use. I appreciate the + and - prefix to
field names to add or suppress them. But most of the time, I want to
print only one or two fields and I have to guess which ones are there
by default so
Hi,
I have been using the perf script -F option on the latest perf and I
find it not very convenient to use. I appreciate the + and - prefix to
field names to add or suppress them. But most of the time, I want to
print only one or two fields and I have to guess which ones are there
by default so
oth at the same time. This patch makes this possible by specifying
PERF_SAMPLE_IP|PERF_SAMPLE_SKID_IP.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
include/linux/perf_event.h | 2 ++
include/uapi/linux/perf_event.h | 4 +++-
kernel/events/core.c| 14
oth at the same time. This patch makes this possible by specifying
PERF_SAMPLE_IP|PERF_SAMPLE_SKID_IP.
Signed-off-by: Stephane Eranian
---
include/linux/perf_event.h | 2 ++
include/uapi/linux/perf_event.h | 4 +++-
kernel/events/core.c| 14 ++
3 files changed,
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type. This is done as an event term and as such can be enabled
per event: cpu/event=xxx,skid-ip=1/. This is a boolean term which is
false by default.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/i
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type. This is done as an event term and as such can be enabled
per event: cpu/event=xxx,skid-ip=1/. This is a boolean term which is
false by default.
Signed-off-by: Stephane Eranian
---
tools/include/uapi/linux
branches and their target.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-record.txt | 8
1 file changed, 8 insertions(+)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index 5a626ef666c2..f0e363
branches and their target.
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-record.txt | 8
1 file changed, 8 insertions(+)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index 5a626ef666c2..f0e3636dc4be 100644
--- a/tools
This atch adds support for SKID_IP to Intel x86 processors in PEBS
mode.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 3674a4
This atch adds support for SKID_IP to Intel x86 processors in PEBS
mode.
Signed-off-by: Stephane Eranian
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 3674a4b6f8bd..dd248ceda452 100644
.
The new way to specify skid ip is per event:
$ perf record -e cpu/event=0xc5,skid-ip=1/
In V4, we fix document of the ski-ip event option and move a session.c
change to the correct patch as per Jiri's remark.
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record type
perf
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
The field is not enabled by default.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-script.tx
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
The field is not enabled by default.
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-script.txt | 2 +-
tools/perf
.
The new way to specify skid ip is per event:
$ perf record -e cpu/event=0xc5,skid-ip=1/
In V4, we fix document of the ski-ip event option and move a session.c
change to the correct patch as per Jiri's remark.
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record type
perf
On Wed, Nov 8, 2017 at 12:56 PM, Andi Kleen wrote:
>> diff --git a/tools/perf/Documentation/perf-record.txt
>> b/tools/perf/Documentation/perf-record.txt
>> index 5a626ef666c2..3b156fa03c99 100644
>> --- a/tools/perf/Documentation/perf-record.txt
>> +++
On Wed, Nov 8, 2017 at 12:56 PM, Andi Kleen wrote:
>> diff --git a/tools/perf/Documentation/perf-record.txt
>> b/tools/perf/Documentation/perf-record.txt
>> index 5a626ef666c2..3b156fa03c99 100644
>> --- a/tools/perf/Documentation/perf-record.txt
>> +++ b/tools/perf/Documentation/perf-record.txt
oth at the same time. This patch makes this possible by specifying
PERF_SAMPLE_IP|PERF_SAMPLE_SKID_IP.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
include/linux/perf_event.h | 2 ++
include/uapi/linux/perf_event.h | 4 +++-
kernel/events/core.c| 14
oth at the same time. This patch makes this possible by specifying
PERF_SAMPLE_IP|PERF_SAMPLE_SKID_IP.
Signed-off-by: Stephane Eranian
---
include/linux/perf_event.h | 2 ++
include/uapi/linux/perf_event.h | 4 +++-
kernel/events/core.c| 14 ++
3 files changed,
This patch adds support for SKID_IP for Intel x86 processors
when PEBS mode is enabled.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
This patch adds support for SKID_IP for Intel x86 processors
when PEBS mode is enabled.
Signed-off-by: Stephane Eranian
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 3674a4b6f8bd
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type. This is done as an event term and as such can be enabled
per event: cpu/event=xxx,skid-ip=1/. This is a boolean term which is
false by default.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/i
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type. This is done as an event term and as such can be enabled
per event: cpu/event=xxx,skid-ip=1/. This is a boolean term which is
false by default.
Signed-off-by: Stephane Eranian
---
tools/include/uapi/linux
branches and their target.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-record.txt | 8
1 file changed, 8 insertions(+)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index 5a626ef666c2..3b156f
branches and their target.
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-record.txt | 8
1 file changed, 8 insertions(+)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index 5a626ef666c2..3b156fa03c99 100644
--- a/tools
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
The field is not enabled by default.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-script.tx
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
The field is not enabled by default.
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-script.txt | 2 +-
tools/perf
.
The new way to specify skid ip is per event:
$ perf record -e cpu/event=0xc5,skid-ip=1/
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record type
perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS
perf/tools: add support for PERF_SAMPLE_SKID_IP
perf/record: add
.
The new way to specify skid ip is per event:
$ perf record -e cpu/event=0xc5,skid-ip=1/
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record type
perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS
perf/tools: add support for PERF_SAMPLE_SKID_IP
perf/record: add
On Thu, Nov 2, 2017 at 11:59 AM, Peter Zijlstra <pet...@infradead.org> wrote:
> On Thu, Nov 02, 2017 at 11:15:55AM -0700, Stephane Eranian wrote:
>
>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>> index 874b71a70058..772530501025 100644
>> --
On Thu, Nov 2, 2017 at 11:59 AM, Peter Zijlstra wrote:
> On Thu, Nov 02, 2017 at 11:15:55AM -0700, Stephane Eranian wrote:
>
>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>> index 874b71a70058..772530501025 100644
>> --- a/include/linux/perf_
From: Stephane Eranian <eran...@gmail.com>
This atch adds support for SKID_IP to Intel x86 processors in PEBS
mode.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel
From: Stephane Eranian
This atch adds support for SKID_IP to Intel x86 processors in PEBS
mode.
Signed-off-by: Stephane Eranian
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index e1965e5ff570
From: Stephane Eranian <eran...@gmail.com>
This patchs adds a new sample record type. The goal
is to record the interrupted instruction pointer (IP)
as seen by the kernel and reflected in the machine state (pt_regs).
On some architectures, it is possible to avoid the IP skid using
ha
From: Stephane Eranian
This patchs adds a new sample record type. The goal
is to record the interrupted instruction pointer (IP)
as seen by the kernel and reflected in the machine state (pt_regs).
On some architectures, it is possible to avoid the IP skid using
hardware support. For instance
to collect both IPs in a single run to determine
how often the conditional branch is taken vs. non-taken.
Understanding the skid is also interesting for other precise events.
In V2, we rebased to 10d94ff4d558 (v4.14-rc7).
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record
to collect both IPs in a single run to determine
how often the conditional branch is taken vs. non-taken.
Understanding the skid is also interesting for other precise events.
In V2, we rebased to 10d94ff4d558 (v4.14-rc7).
Stephane Eranian (5):
perf/core: add PERF_RECORD_SAMPLE_SKID_IP record
on the event and precise sampling mode.
$ perf record --skid-ip .
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-record.txt | 8
tools/perf/builtin-record.c | 2 ++
2 files changed, 10 insertions(+)
diff --git a/tools/perf/Documen
on the event and precise sampling mode.
$ perf record --skid-ip .
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-record.txt | 8
tools/perf/builtin-record.c | 2 ++
2 files changed, 10 insertions(+)
diff --git a/tools/perf/Documentation/perf-record.txt
b
From: Stephane Eranian <eran...@gmail.com>
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/builtin-
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/include/uapi/linux/perf_event.h | 4 +++-
tools/perf/perf.h | 1 +
tools/perf/util/event.h | 1 +
tools/per
From: Stephane Eranian
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F +ip,+skid_ip ..
Signed-off-by: Stephane Eranian
---
tools/perf/builtin-script.c | 6 ++
tools/perf/util/session.c | 2 +-
2
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type.
Signed-off-by: Stephane Eranian
---
tools/include/uapi/linux/perf_event.h | 4 +++-
tools/perf/perf.h | 1 +
tools/perf/util/event.h | 1 +
tools/perf/util/evsel.c
On Tue, Oct 17, 2017 at 12:54 PM, Liang, Kan wrote:
>> On Mon, Oct 16, 2017 at 3:26 PM, wrote:
>> > From: Kan Liang
>> >
>> > There could be different types of memory in the system. E.g normal
>> > System Memory, Persistent Memory.
On Tue, Oct 17, 2017 at 12:54 PM, Liang, Kan wrote:
>> On Mon, Oct 16, 2017 at 3:26 PM, wrote:
>> > From: Kan Liang
>> >
>> > There could be different types of memory in the system. E.g normal
>> > System Memory, Persistent Memory. To understand how the workload
>> maps to
>> > those memories,
On Mon, Oct 16, 2017 at 3:26 PM, wrote:
> From: Kan Liang
>
> There could be different types of memory in the system. E.g normal
> System Memory, Persistent Memory. To understand how the workload maps to
> those memories, it's important to know the I/O
On Mon, Oct 16, 2017 at 3:26 PM, wrote:
> From: Kan Liang
>
> There could be different types of memory in the system. E.g normal
> System Memory, Persistent Memory. To understand how the workload maps to
> those memories, it's important to know the I/O statistics on different
> type of memorys.
On Thu, Aug 31, 2017 at 12:51 PM, Stephane Eranian <eran...@google.com> wrote:
> Hi,
>
> On Thu, Aug 31, 2017 at 10:18 AM, Peter Zijlstra <pet...@infradead.org> wrote:
>> On Wed, Aug 23, 2017 at 11:54:15AM +0300, Alexey Budankov wrote:
>>> On 22.08.2017 23:47
On Thu, Aug 31, 2017 at 12:51 PM, Stephane Eranian wrote:
> Hi,
>
> On Thu, Aug 31, 2017 at 10:18 AM, Peter Zijlstra wrote:
>> On Wed, Aug 23, 2017 at 11:54:15AM +0300, Alexey Budankov wrote:
>>> On 22.08.2017 23:47, Peter Zijlstra wrote:
>>> > On Thu, Aug
On Fri, Sep 1, 2017 at 12:59 AM, Jiri Olsa <jo...@redhat.com> wrote:
> On Wed, Aug 30, 2017 at 11:21:23PM -0700, Stephane Eranian wrote:
>> Hi,
>>
>>
>> On Mon, Aug 28, 2017 at 1:41 PM, Andi Kleen <a...@firstfloor.org> wrote:
>> >> So I think
On Fri, Sep 1, 2017 at 12:59 AM, Jiri Olsa wrote:
> On Wed, Aug 30, 2017 at 11:21:23PM -0700, Stephane Eranian wrote:
>> Hi,
>>
>>
>> On Mon, Aug 28, 2017 at 1:41 PM, Andi Kleen wrote:
>> >> So I think we are good to go. to capture multiplexing scaling fact
Hi,
On Thu, Aug 31, 2017 at 10:18 AM, Peter Zijlstra wrote:
> On Wed, Aug 23, 2017 at 11:54:15AM +0300, Alexey Budankov wrote:
>> On 22.08.2017 23:47, Peter Zijlstra wrote:
>> > On Thu, Aug 10, 2017 at 06:57:43PM +0300, Alexey Budankov wrote:
>> >> The key thing in the
Hi,
On Thu, Aug 31, 2017 at 10:18 AM, Peter Zijlstra wrote:
> On Wed, Aug 23, 2017 at 11:54:15AM +0300, Alexey Budankov wrote:
>> On 22.08.2017 23:47, Peter Zijlstra wrote:
>> > On Thu, Aug 10, 2017 at 06:57:43PM +0300, Alexey Budankov wrote:
>> >> The key thing in the patch is explicit updating
Hi,
On Mon, Aug 28, 2017 at 1:41 PM, Andi Kleen wrote:
>> So I think we are good to go. to capture multiplexing scaling factor
>> when sampling simply use the S
>> modifier.
>> But to my surprise, newer kernels are not happy with the cmdline:
>> $ perf record -e cycles:S
Hi,
On Mon, Aug 28, 2017 at 1:41 PM, Andi Kleen wrote:
>> So I think we are good to go. to capture multiplexing scaling factor
>> when sampling simply use the S
>> modifier.
>> But to my surprise, newer kernels are not happy with the cmdline:
>> $ perf record -e cycles:S noploop 1
>> Error:
>>
Hi,
On Tue, Aug 22, 2017 at 12:24 AM, Stephane Eranian <eran...@google.com> wrote:
> On Tue, Aug 22, 2017 at 12:03 AM, Jiri Olsa <jo...@redhat.com> wrote:
>>
>> On Mon, Aug 21, 2017 at 06:25:45PM -0700, Andi Kleen wrote:
>> > On Mon, Aug 21, 2017 at 05:1
Hi,
On Tue, Aug 22, 2017 at 12:24 AM, Stephane Eranian wrote:
> On Tue, Aug 22, 2017 at 12:03 AM, Jiri Olsa wrote:
>>
>> On Mon, Aug 21, 2017 at 06:25:45PM -0700, Andi Kleen wrote:
>> > On Mon, Aug 21, 2017 at 05:13:29PM -0700, Stephane Eranian wrote:
>> >
On Wed, Aug 23, 2017 at 7:39 AM, Peter Zijlstra wrote:
> On Wed, Aug 23, 2017 at 04:33:08PM +0200, Peter Zijlstra wrote:
>> > @@ -6145,6 +6183,9 @@ void perf_prepare_sample(struct perf_event_header
>> > *header,
>> >
>> > header->size += size;
>> > }
>> > +
On Wed, Aug 23, 2017 at 7:39 AM, Peter Zijlstra wrote:
> On Wed, Aug 23, 2017 at 04:33:08PM +0200, Peter Zijlstra wrote:
>> > @@ -6145,6 +6183,9 @@ void perf_prepare_sample(struct perf_event_header
>> > *header,
>> >
>> > header->size += size;
>> > }
>> > +
>> > + if
On Tue, Aug 22, 2017 at 12:03 AM, Jiri Olsa <jo...@redhat.com> wrote:
>
> On Mon, Aug 21, 2017 at 06:25:45PM -0700, Andi Kleen wrote:
> > On Mon, Aug 21, 2017 at 05:13:29PM -0700, Stephane Eranian wrote:
> > > On Mon, Aug 21, 2017 at 4:02 PM, Andi Kleen
On Tue, Aug 22, 2017 at 12:03 AM, Jiri Olsa wrote:
>
> On Mon, Aug 21, 2017 at 06:25:45PM -0700, Andi Kleen wrote:
> > On Mon, Aug 21, 2017 at 05:13:29PM -0700, Stephane Eranian wrote:
> > > On Mon, Aug 21, 2017 at 4:02 PM, Andi Kleen wrote:
> > > >
On Mon, Aug 21, 2017 at 4:02 PM, Andi Kleen <a...@firstfloor.org> wrote:
>
> Stephane Eranian <eran...@google.com> writes:
> >
> > To activate, the user must use:
> > $ perf record -a -R
>
> I don't know why you're overloading the existing raw mod
On Mon, Aug 21, 2017 at 4:02 PM, Andi Kleen wrote:
>
> Stephane Eranian writes:
> >
> > To activate, the user must use:
> > $ perf record -a -R
>
> I don't know why you're overloading the existing raw mode?
>
> It has nothing to do with that.
>
and do not add yet another option.
With this patch, it is possible to evaluate the total number
of occurrences of each sampling event even when multiplexing is
active.
Signed-off-by: Stephane Eranian <eran...@google.com>
---
tools/perf/Documentation/perf-record.txt | 2 ++
tools/perf/util/e
and do not add yet another option.
With this patch, it is possible to evaluate the total number
of occurrences of each sampling event even when multiplexing is
active.
Signed-off-by: Stephane Eranian
---
tools/perf/Documentation/perf-record.txt | 2 ++
tools/perf/util/evsel.c | 5
On Thu, Aug 17, 2017 at 8:51 AM, wrote:
> From: Kan Liang
>
> For understanding how the workload maps to memory channels and hardware
> behavior, it's very important to collect address maps with physical
> addresses. For example, 3D XPoint access can
On Thu, Aug 17, 2017 at 8:51 AM, wrote:
> From: Kan Liang
>
> For understanding how the workload maps to memory channels and hardware
> behavior, it's very important to collect address maps with physical
> addresses. For example, 3D XPoint access can only be found by filtering
> the physical
On Wed, Aug 9, 2017 at 1:42 PM, wrote:
> From: Kan Liang
>
> For understanding how the workload maps to memory channels and hardware
> behavior, it's very important to collect address maps with physical
> addresses. For example, 3D XPoint access can
On Wed, Aug 9, 2017 at 1:42 PM, wrote:
> From: Kan Liang
>
> For understanding how the workload maps to memory channels and hardware
> behavior, it's very important to collect address maps with physical
> addresses. For example, 3D XPoint access can only be found by filtering
> the physical
Commit-ID: b3625980a65db6b6b6bbd5790a77ab95ce6397c5
Gitweb: http://git.kernel.org/tip/b3625980a65db6b6b6bbd5790a77ab95ce6397c5
Author: Stephane Eranian <eran...@google.com>
AuthorDate: Thu, 13 Jul 2017 10:35:45 -0700
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Mon,
Commit-ID: b3625980a65db6b6b6bbd5790a77ab95ce6397c5
Gitweb: http://git.kernel.org/tip/b3625980a65db6b6b6bbd5790a77ab95ce6397c5
Author: Stephane Eranian
AuthorDate: Thu, 13 Jul 2017 10:35:45 -0700
Committer: Ingo Molnar
CommitDate: Mon, 24 Jul 2017 11:13:17 +0200
perf/x86/intel/uncore
Commit-ID: ba883b4abc9cd837441b01eb9cf8d9196181294d
Gitweb: http://git.kernel.org/tip/ba883b4abc9cd837441b01eb9cf8d9196181294d
Author: Stephane Eranian <eran...@google.com>
AuthorDate: Thu, 13 Jul 2017 10:35:50 -0700
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Mon,
Commit-ID: ba883b4abc9cd837441b01eb9cf8d9196181294d
Gitweb: http://git.kernel.org/tip/ba883b4abc9cd837441b01eb9cf8d9196181294d
Author: Stephane Eranian
AuthorDate: Thu, 13 Jul 2017 10:35:50 -0700
Committer: Ingo Molnar
CommitDate: Mon, 24 Jul 2017 11:13:18 +0200
perf/x86/intel/uncore
Commit-ID: 8aa7b7b4b4a601978672dce6604b9f5630b2eeb8
Gitweb: http://git.kernel.org/tip/8aa7b7b4b4a601978672dce6604b9f5630b2eeb8
Author: Stephane Eranian <eran...@google.com>
AuthorDate: Thu, 13 Jul 2017 10:35:49 -0700
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Mon,
Commit-ID: 8aa7b7b4b4a601978672dce6604b9f5630b2eeb8
Gitweb: http://git.kernel.org/tip/8aa7b7b4b4a601978672dce6604b9f5630b2eeb8
Author: Stephane Eranian
AuthorDate: Thu, 13 Jul 2017 10:35:49 -0700
Committer: Ingo Molnar
CommitDate: Mon, 24 Jul 2017 11:13:18 +0200
perf/x86/intel/uncore
On Fri, Jun 16, 2017 at 10:50 AM, Andi Kleen wrote:
>> > Yeah, I think it is easier and more portable, especially on hardware with a
>> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
>> > implementation yesterday to evaluate the difficulty.
>> >
On Fri, Jun 16, 2017 at 10:50 AM, Andi Kleen wrote:
>> > Yeah, I think it is easier and more portable, especially on hardware with a
>> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
>> > implementation yesterday to evaluate the difficulty.
>> >
>> A more generalized
On Fri, Jun 16, 2017 at 10:08 AM, Stephane Eranian <eran...@google.com> wrote:
> On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen <a...@linux.intel.com> wrote:
>> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>>> Andi,
>>>
>>
On Fri, Jun 16, 2017 at 10:08 AM, Stephane Eranian wrote:
> On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>>> Andi,
>>>
>>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>&
On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen <a...@linux.intel.com> wrote:
> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>> Andi,
>>
>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen <a...@linux.intel.com> wrote:
>> >>
On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>> Andi,
>>
>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> >> Looking at this approach, the user interface is straightforward,
>
Andi,
On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> Looking at this approach, the user interface is straightforward,
>> implementation in the x86 code is a bit more hairy because of the way
>> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
>>
Andi,
On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> Looking at this approach, the user interface is straightforward,
>> implementation in the x86 code is a bit more hairy because of the way
>> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
>> that SKID_IP cannot
On Thu, Jun 15, 2017 at 1:20 PM, Stephane Eranian <eran...@google.com> wrote:
> On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen <a...@linux.intel.com> wrote:
>> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>>> On Thu, Jun 15, 2017 at 10:23 AM, An
On Thu, Jun 15, 2017 at 1:20 PM, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
>>> > On Thu, Jun 15, 2017
On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen <a...@linux.intel.com> wrote:
> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen <a...@linux.intel.com> wrote:
>> > On Thu, Jun 15, 2017 at 09:44:07AM
On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> >> On Thu, Jun 1
On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen <a...@linux.intel.com> wrote:
> On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen <a...@linux.intel.com> wrote:
>> > On Thu, Jun 15, 2017 at 06:56:24AM
On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> >> This patchs
Hi,
On Thu, Jun 15, 2017 at 9:39 AM, Stephane Eranian <eran...@google.com> wrote:
> On Thu, Jun 15, 2017 at 8:40 AM, Liang, Kan <kan.li...@intel.com> wrote:
>>
>>
>>> This patch adds support for SKID_IP to Intel x86 processors in PEBS mode. In
>>> tha
Hi,
On Thu, Jun 15, 2017 at 9:39 AM, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 8:40 AM, Liang, Kan wrote:
>>
>>
>>> This patch adds support for SKID_IP to Intel x86 processors in PEBS mode. In
>>> that case, the off-by-1 IP from PEBS is returned in the
On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen <a...@linux.intel.com> wrote:
> On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> This patchs adds a new sample record type called
>> PERF_SAMPLE_SKID_IP. The goal is to record
>> the unmodified interrup
On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> This patchs adds a new sample record type called
>> PERF_SAMPLE_SKID_IP. The goal is to record
>> the unmodified interrupted instruction pointer (IP) as
ferent skid_ip and ip with :pp event
> (attr.precise = 2).
> With the :p event (attr.precise = 1), the skid_ip and ip are the same. Right?
>
Correct, because skid_ip would be equal to the pebs->ip.
> Thanks,
> Kan
>
>>
>> Signed-off-by: Stephane Eranian <eran...@g
p event
> (attr.precise = 2).
> With the :p event (attr.precise = 1), the skid_ip and ip are the same. Right?
>
Correct, because skid_ip would be equal to the pebs->ip.
> Thanks,
> Kan
>
>>
>> Signed-off-by: Stephane Eranian
>> ---
>> arch/x86/events/
. With precise=1, the IP would point to
0x42c2f3. It is interesting to collect both IPs in a single run to determine
how often the conditional branch is taken vs. non-taken.
Stephane Eranian (5):
perf/core: add PERF_SAMPLE_SKID_IP record type
perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS
perf
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