Quoting Doug Anderson (2020-12-10 17:51:53)
> Hi,
>
> On Thu, Dec 10, 2020 at 5:39 PM Stephen Boyd wrote:
> >
> > Quoting Doug Anderson (2020-12-10 17:30:17)
> > > On Thu, Dec 10, 2020 at 5:21 PM Stephen Boyd wrote:
> > > >
> > > >
The following changes since commit c277ca155d2f0028a5c79708426d3f79b54a5fc1:
clk: imx8m: fix bus critical clk registration (2020-11-04 17:13:12 -0800)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
tags/clk-fixes-for-linus
for you to
Quoting Vinod Koul (2020-12-10 21:43:49)
> On 10-12-20, 12:43, Stephen Boyd wrote:
> > > +static struct clk_branch gcc_camera_ahb_clk = {
> > > + .halt_reg = 0x26004,
> > > + .halt_check = BRANCH_HALT_DELAY,
> > > + .hwcg_reg
Quoting Vinod Koul (2020-12-10 21:02:57)
> On 10-12-20, 12:36, Stephen Boyd wrote:
> > > +
> > > + return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
> > > + (BIT(pll->width) - 1) <<
> > > pll->
Quoting Doug Anderson (2020-12-10 17:30:17)
> On Thu, Dec 10, 2020 at 5:21 PM Stephen Boyd wrote:
> >
> > Yeah and so if it comes way later because it timed out then what's the
> > point of calling synchronize_irq() again? To make the completion
> > variable set wh
Quoting Doug Anderson (2020-12-10 17:04:06)
> On Thu, Dec 10, 2020 at 4:51 PM Stephen Boyd wrote:
> >
> > I'm worried about the buffer disappearing if spi core calls handle_err()
> > but the geni_spi_isr() handler runs both an rx and a cancel/abort
> > routine. That
Quoting Doug Anderson (2020-12-10 15:50:04)
> Hi,
>
> On Thu, Dec 10, 2020 at 3:32 PM Stephen Boyd wrote:
> >
> > Quoting Doug Anderson (2020-12-10 15:07:39)
> > > Hi,
> > >
> > > On Thu, Dec 10, 2020 at 2:58 PM Stephen Boyd wrote:
> > >
Quoting Doug Anderson (2020-12-10 15:07:39)
> Hi,
>
> On Thu, Dec 10, 2020 at 2:58 PM Stephen Boyd wrote:
> > right? It will only ensure that other irq handlers have completed, which
> > may be a problem, but not the only one.
> >
> > TL;DR: Peek at the irq sta
Quoting Doug Anderson (2020-12-10 09:14:15)
>
> This is my untested belief of what's happening
>
> CPU0CPU1
>
> setup_fifo_xfer()
> ...
>
Quoting Douglas Anderson (2020-12-09 16:41:03)
> Conceptually, we can envision the input on Qualcomm SoCs to pass
> through a bunch of blocks between coming into the chip and becoming a
> GPIO interrupt. From guessing and running a handful of tests, I
> believe that we can represent the state of
cks are always rounded down in the clock drivers.
> Let's add a warning in the Qualcomm SDHCI driver to help catch the
> problem.
>
> This would have saved a bunch of time [1].
>
> [1]
> http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c
Quoting Doug Anderson (2020-12-10 13:20:03)
> On Thu, Dec 10, 2020 at 1:03 PM Stephen Boyd wrote:
> >
> >
> > Can we use dev_warn?
>
> What's here matches other prints including other ones in the same
> function and in much of the MMC subsystem. mmc_hostname()
do there will still be a period of time
> where we can't tell the difference between a real transition (or more
> than one transition) and the phantom.
>
> Fixes: f55c73aef890 ("irqchip/pdc: Add PDC interrupt controller for QCOM
> SoCs")
> Signed-off-by: Douglas Anderson
> Reviewed-by: Maulik Shah
> Tested-by: Maulik Shah
> ---
Reviewed-by: Stephen Boyd
no SoC code needs to be updated since we can rely
> on zero-initialization.
>
> Signed-off-by: Douglas Anderson
> ---
Reviewed-by: Stephen Boyd
Quoting Douglas Anderson (2020-12-10 12:57:25)
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 3451eb325513..dd41f6a4dbfb 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -353,6 +353,7 @@ static void
Quoting Dmitry Osipenko (2020-10-25 15:42:12)
> The periph_clks[] array contains duplicated entry for Security Engine
> clock which was meant to be defined for T210, but it wasn't added
> properly. This patch corrects the T210 SE entry and fixes the following
> error message on T114/T124: "Tegra
Quoting Vinod Koul (2020-12-07 22:46:58)
> Add bindings and update documentation for clock rpmh driver on SM8350.
>
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
Applied to clk-next
Quoting Vinod Koul (2020-12-07 22:46:59)
> This adds the RPMH clocks present in SM8350 SoC
>
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
Applied to clk-next with lots of noise!
Quoting Vinod Koul (2020-12-07 22:47:02)
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 3a965bd326d5..5015dd9332cd 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -437,6 +437,15 @@ config SM_GCC_8250
> Say Y if you want to use
Quoting Vinod Koul (2020-12-07 22:47:01)
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c
> b/drivers/clk/qcom/clk-alpha-pll.c
> index 564431130a76..6a399663d564 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -146,6 +146,12 @@
Quoting Vinod Koul (2020-12-09 22:11:59)
> On 09-12-20, 22:01, Rob Herring wrote:
> > On Tue, Dec 08, 2020 at 12:17:00PM +0530, Vinod Koul wrote:
>
> > > +required:
> > > + - compatible
> > > + - clocks
> > > + - clock-names
> > > + - reg
> > > + - '#clock-cells'
> > > + - '#reset-cells'
>
Quoting Krzysztof Kozlowski (2020-11-03 08:24:35)
> The scpi_clk_match (struct of_device_id) is referenced only with
> CONFIG_OF builds thus mark it as __maybe_unused:
>
> drivers/clk/clk-scpi.c:132:34: warning:
> ‘scpi_clk_match’ defined but not used [-Wunused-const-variable=]
>
>
Quoting Douglas Anderson (2020-12-10 10:22:38)
> I would repeat the same commit message that was in commit 5e4b7e82d497
> ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks") but it seems
> silly to do so when you could just go read that commit.
>
> NOTE: this is actually extra terrible because
Quoting Taniya Das (2020-11-20 08:40:17)
> The LPASSCC driver's suspend/resume is invoked multiple number of times
> and thus allow the device to autosuspend for 500ms.
>
> Signed-off-by: Taniya Das
> ---
Applied to clk-next
Quoting Douglas Anderson (2020-12-10 10:22:39)
> 50 MHz is an incredibly common clock rate for SD cards to run at.
> It's "high speed" mode in SD (not very fast these days, but it used to
> be) or:
> #define HIGH_SPEED_MAX_DTR5000
>
> If we don't support this then older "high speed"
Quoting Douglas Anderson (2020-12-10 10:22:38)
> I would repeat the same commit message that was in commit 5e4b7e82d497
> ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks") but it seems
> silly to do so when you could just go read that commit.
>
> NOTE: this is actually extra terrible because
Quoting Krzysztof Kozlowski (2020-11-03 08:24:28)
> The driver can match only via the DT table so the table should be always
> used and the of_match_ptr does not have any sense (this also allows ACPI
> matching via PRP0001, even though it might be not relevant here). This
> fixes compile warning
Quoting Doug Anderson (2020-12-03 08:40:46)
> I would guess that if "mas->cur_xfer" is NULL then
> geni_spi_handle_rx() should read all data in the FIFO and throw it
> away and geni_spi_handle_tx() should set SE_GENI_TX_WATERMARK_REG to
> 0. NOTE: I _think_ that with the synchronize_irq() I'm
;
| ^
As the dummy var isn't needed, remove it.
Reviewed-by: Stephen Boyd
Signed-off-by: Mauro Carvalho Chehab
Link:
https://lore.kernel.org/r/aacfd03835b7d1b3b6c21665b44000fe7242e535.1601360391.git.mchehab+hua...@kernel.org
Signed-off-by: Stephen Boyd
---
drivers/spmi
spmi: fix some coding style issues at the spmi core
Stephen Boyd (1):
MAINTAINERS: Mark SPMI as maintained
MAINTAINERS | 6 --
drivers/spmi/spmi.c | 19 ++-
include/linux/spmi.h | 1 +
3 files changed, 19 insertions(+), 7 deletions(-)
base-commit
From: Hsin-Hsiung Wang
Add new shutdown() method. Use it in the standard driver model style.
Signed-off-by: Hsin-Hsiung Wang
Link:
https://lore.kernel.org/r/1603187810-30481-2-git-send-email-hsin-hsiung.w...@mediatek.com
Signed-off-by: Stephen Boyd
---
drivers/spmi/spmi.c | 9
Cc:
Signed-off-by: Stephen Boyd
Link: https://lore.kernel.org/r/20201207214204.1284946-1-sb...@kernel.org
---
MAINTAINERS | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b75f29..a8b02bb842c4 100644
--- a/MAINTAINERS
+++ b
From: Mauro Carvalho Chehab
While preparing to port the HiSilicon 6421v600 SPMI driver,
I noticed some coding style issues at the SPMI core.
Address them.
Reviewed-by: Stephen Boyd
Signed-off-by: Mauro Carvalho Chehab
Link:
https://lore.kernel.org/r/fec878502147336cbf2cf86e476e9dd797cd7e6f
Quoting Dmitry Osipenko (2020-10-25 15:42:12)
> The periph_clks[] array contains duplicated entry for Security Engine
> clock which was meant to be defined for T210, but it wasn't added
> properly. This patch corrects the T210 SE entry and fixes the following
> error message on T114/T124: "Tegra
Quoting Manivannan Sadhasivam (2020-11-25 23:28:40)
> From: Naveen Yadav
>
> Add Global Clock Controller (GCC) support for SDX55 SoCs from Qualcomm.
>
> Signed-off-by: Naveen Yadav
> [mani: converted to parent_data, commented critical clocks, cleanups]
> Signed-off-by: Manivannan Sadhasivam
>
Quoting Manivannan Sadhasivam (2020-11-25 23:28:41)
> From: Vinod Koul
>
> Add compatible for SDX55 RPMHCC and DT include.
>
> Signed-off-by: Vinod Koul
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Bjorn Andersson
> Acked-by: Rob Herring
> ---
Applied to clk-next
Quoting Manivannan Sadhasivam (2020-11-25 23:28:42)
> Add support for following clocks maintained by RPMh in SDX55 SoCs.
>
> * BI TCXO
> * RF_CLK1
> * RF_CLK1_AO
> * RF_CLK2
> * RF_CLK2_AO
> * QPIC (Qualcomm Technologies, Inc. Parallel Interface Controller)
>
> Signed-off-by: Manivannan
Quoting Manivannan Sadhasivam (2020-11-25 23:28:44)
> Add GDSC support to control the power supply of power domains in SDX55
> GCC.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
Applied to clk-next
Quoting Manivannan Sadhasivam (2020-11-25 23:28:43)
> Add GDSC instances in SDX55 GCC block.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
Applied to clk-next
Quoting Manivannan Sadhasivam (2020-11-25 23:28:39)
> From: Vinod Koul
>
> Add device tree bindings for global clock controller on SDX55 SoCs.
>
> Signed-off-by: Vinod Koul
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Rob Herring
> ---
Applied to clk-next
Quoting Geert Uytterhoeven (2020-12-08 00:37:00)
> Hi Stephen,
>
> On Mon, Dec 7, 2020 at 11:06 PM Stephen Rothwell
> wrote:
> > In commit
> >
> > c3f207f6d23d ("clk: renesas: r8a779a0: Make
> > rcar_r8a779a0_cpg_clk_register() static")
> >
> > Fixes tag
> >
> > Fixes: c07439dea94050b6
already keep the l3 main clock always on with the legacy
> platform code.
>
> Later on we may want to start managing the l3 main clock with a dedicated
> interconnect driver instead of using simple-pm-bus and GENPD_FLAG_PM_CLK.
>
> Cc: linux-...@vger.kernel.org
> Cc: Michael Tu
Quoting Michael Walle (2020-11-05 11:27:45)
> This will simplify drivers which would only unregister the clk in their
> remove() op.
>
> Signed-off-by: Michael Walle
> ---
Applied to clk-next
Quoting Michael Walle (2020-11-05 11:27:46)
> Simplify the driver by using that helper and drop the remove() function.
>
> Signed-off-by: Michael Walle
> ---
Applied to clk-next
Quoting Michael Walle (2020-11-05 11:27:44)
> If the device is removed we don't unregister the composite clock. Fix
> that.
>
> Fixes: 9cd10205227c ("clk: fsl-sai: new driver")
> Signed-off-by: Michael Walle
> ---
Applied to clk-next
r Layerscape support.
>
> Signed-off-by: Geert Uytterhoeven
> Acked-by: Arnd Bergmann
> Acked-by: Li Yang
> Acked-by: Stephen Boyd
> ---
Applied to clk-next
Quoting Geert Uytterhoeven (2020-11-10 07:51:17)
> The Xtensa time code is not a clock provider, and just needs to call
> of_clk_init().
>
> Hence it can include instead of .
>
> Signed-off-by: Geert Uytterhoeven
> Reviewed-by: Stephen Boyd
> Acked-by: Max Filippov
> ---
Applied to clk-next
Quoting Geert Uytterhoeven (2020-11-10 07:50:29)
> The SuperH/J2 DT platform code is not a clock provider, and just needs
> to call of_clk_init().
>
> Hence it can include instead of .
>
> Signed-off-by: Geert Uytterhoeven
> Reviewed-by: Stephen Boyd
> ---
Applied to clk-next
Quoting Geert Uytterhoeven (2020-11-30 00:57:43)
> The R9A06G032 clock driver uses an array of packed structures to reduce
> kernel size. However, this array contains pointers, which are no longer
> aligned naturally, and cannot be relocated on PPC64. Hence when
> compile-testing this driver on
Cc:
Signed-off-by: Stephen Boyd
---
MAINTAINERS | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b75f29..a8b02bb842c4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16533,8 +16533,10 @@ F:
Documentation/networking
Quoting diksh...@codeaurora.org (2020-12-06 22:13:30)
> From: Dikshita Agarwal
>
> Add support to dump video FW region during FW crash
> using devcoredump helpers.
>
> Signed-off-by: Dikshita Agarwal
> ---
One nit below.
Reviewed-by: Stephen Boyd
Usually this contai
packed accesses, the
> net size increase is only 76 bytes (gcc 9.3.0 on arm32).
>
> Reported-by: Stephen Rothwell
> Fixes: 4c3d88526eba2143 ("clk: renesas: Renesas R9A06G032 clock driver")
> Signed-off-by: Geert Uytterhoeven
> ---
Acked-by: Stephen Boyd
Unless you want me to pick this up for clk-fixes?
Quoting Arnd Bergmann (2020-12-03 15:07:52)
> From: Arnd Bergmann
>
> When CONFIG_MXC_CLK_SCU is enabled, but CONFIG_CLK_IMX8QXP is not,
> the kernel fails to link with:
>
> aarch64-linux-ld: no input files
> make[5]: *** [scripts/Makefile.build:434: drivers/clk/imx/clk-imx-scu.o]
> Error 1
>
Some cros ECs support a front proximity MKBP event via
'EC_MKBP_FRONT_PROXIMITY'. Map this to the 'SW_FRONT_PROXIMITY' input
event code so it can be reported up to userspace.
Cc: Dmitry Torokhov
Cc: Benson Leung
Cc: Guenter Roeck
Signed-off-by: Stephen Boyd
---
drivers/input/keyboard
derson
Cc: Alexandru M Stan
Signed-off-by: Stephen Boyd
---
drivers/spi/spi-geni-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 25810a7eef10..c4c88984abc9 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-g
This is already handed by default in spi_setup() if the bits_per_word is
0, so just drop it to shave off a line.
Cc: Simon Glass
Cc: Gwendal Grignou
Reviewed-by: Douglas Anderson
Tested-by: Douglas Anderson
Acked-by: Enric Balletbo i Serra
Cc: Alexandru M Stan
Signed-off-by: Stephen Boyd
c: Gwendal Grignou
Reviewed-by: Douglas Anderson
Tested-by: Douglas Anderson
Acked-by: Enric Balletbo i Serra
Cc: Alexandru M Stan
Signed-off-by: Stephen Boyd
---
drivers/platform/chrome/cros_ec_spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/platform/chrome/cros_ec_spi.c
: Akash Asthana
Cc: Simon Glass
Cc: Gwendal Grignou
Cc: Douglas Anderson
Cc: Alexandru M Stan
Stephen Boyd (3):
platform/chrome: cros_ec_spi: Don't overwrite spi::mode
platform/chrome: cros_ec_spi: Drop bits_per_word assignment
spi: spi-geni-qcom: Use the new method of gpio CS control
Quoting Doug Anderson (2020-12-03 12:06:10)
> On Wed, Dec 2, 2020 at 4:47 PM Stephen Boyd wrote:
> >
> > And that is wrong. With even more investigation and Doug's eagle eyes it
> > seems that the cros-ec driver is overriding the spi::mode to clear out
> > the SPI_CS
8b0cf82677d1 ("coresight: stm: Allow to build coresight-stm as a
> module")
> Signed-off-by: Arnd Bergmann
> ---
Reviewed-by: Stephen Boyd
Quoting Hsin-Hsiung Wang (2020-10-20 02:56:48)
> Add new shutdown() method. Use it in the standard driver model style.
>
> Signed-off-by: Hsin-Hsiung Wang
> ---
Applied to spmi-next. The line endings are all confused still though.
Quoting Dikshita Agarwal (2020-11-29 21:36:12)
> diff --git a/drivers/media/platform/qcom/venus/core.c
> b/drivers/media/platform/qcom/venus/core.c
> index 6103aaf..01a0cfe 100644
> --- a/drivers/media/platform/qcom/venus/core.c
> +++ b/drivers/media/platform/qcom/venus/core.c
> @@ -22,6 +24,48
Quoting Maulik Shah (2020-11-26 02:18:18)
> lockdep_assert_irqs_disabled() was added to check rpmh_flush()
> can only be invoked when irqs are disabled, this is true for
> APPS RSC as the last CPU going to deepest low power mode is
> writing sleep and wake TCSes.
>
> However for RSCs that support
c: Gwendal Grignou
Cc: Douglas Anderson
Cc: Alexandru M Stan
Signed-off-by: Stephen Boyd
---
drivers/platform/chrome/cros_ec_spi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/platform/chrome/cros_ec_spi.c
b/drivers/platform/chrome/cros_ec_spi.c
index dfa1f816a45f..f9df218fc
: Alexandru M Stan
Stephen Boyd (2):
platform/chrome: cros_ec_spi: Don't overwrite spi::mode
platform/chrome: cros_ec_spi: Drop bits_per_word assignment
drivers/platform/chrome/cros_ec_spi.c | 2 --
1 file changed, 2 deletions(-)
base-commit: b65054597872ce3aefbc6a666385eabdf9e288da
--
https
This is already handed by default in spi_setup() if the bits_per_word is
0, so just drop it to shave off a line.
Cc: Simon Glass
Cc: Gwendal Grignou
Cc: Douglas Anderson
Cc: Alexandru M Stan
Signed-off-by: Stephen Boyd
---
drivers/platform/chrome/cros_ec_spi.c | 1 -
1 file changed, 1
Quoting Stephen Boyd (2020-12-02 15:28:45)
> Quoting Alexandru M Stan (2020-12-02 14:18:20)
> > Unfortunately this patch makes my cros-ec (the main EC that used to
> > work even before my debugging) also fail to probe:
> > [0.839533] cros-ec-spi spi6.0: EC fail
Quoting Alexandru M Stan (2020-12-02 14:18:20)
> On Wed, Dec 2, 2020 at 1:49 PM Stephen Boyd wrote:
> >
> > Let's set the 'use_gpio_descriptors' field so that we use the new way of
> > requesting the CS GPIOs in the core. This allows us to avoid having to
> > confi
s Anderson
Acked-by: Alexandru M Stan
Signed-off-by: Stephen Boyd
---
drivers/spi/spi-geni-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 25810a7eef10..c4c88984abc9 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/sp
than 31. Also use clamp() because we're here.
Cc: Daniel Campello
Cc: Lars-Peter Clausen
Cc: Peter Meerwald-Stadler
Cc: Douglas Anderson
Cc: Gwendal Grignou
Cc: Evan Green
Signed-off-by: Stephen Boyd
---
Changes from v2
(https://lore.kernel.org/r/20201120182944.543428-1-swb...@chromium.org
Quoting Jonathan Cameron (2020-11-21 07:02:45)
> On Sat, 21 Nov 2020 14:58:49 +
> Jonathan Cameron wrote:
>
> > On Fri, 20 Nov 2020 10:29:44 -0800
> > Stephen Boyd wrote:
> > > diff --git a/drivers/iio/proximity/sx9310.c
> > > b/drivers/iio/prox
Quoting Xu Wang (2020-11-27 01:05:51)
> Because clk_prepare_enable() already checked NULL clock parameter,
> so the additional check is unnecessary, just remove it.
>
> Signed-off-by: Xu Wang
> ---
Acked-by: Stephen Boyd
Quoting Colin King (2020-11-26 15:24:00)
> From: Colin Ian King
>
> There is a spelling mistake in the Kconfig help text. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
Applied to clk-next
Quoting Krzysztof Kozlowski (2020-11-25 06:15:05)
> On Tue, Nov 24, 2020 at 04:11:31PM -0800, Stephen Boyd wrote:
> >
> > Ok so this patch isn't necessary then?
>
> For this particular build failure - it is not necessary anymore.
>
> However there might more of such e
Quoting Manivannan Sadhasivam (2020-11-24 19:49:24)
>
>
> On 25 November 2020 7:44:10 AM IST, Stephen Boyd wrote:
> >Quoting Manivannan Sadhasivam (2020-11-18 23:27:11)
> >> diff --git
> >a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
> >b/Doc
> Move Ingenic USB PHY bindings from Documentation/devicetree/bindings/usb
> to Documentation/devicetree/bindings/phy, and add bindings for JZ4775 SoC
> and X2000 SoC.
>
Acked-by: Stephen Boyd
Quoting Ahmad Fatoum (2020-11-13 06:53:09)
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index ba33c79158de..b2e4b6234ac0 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -337,10 +337,10 @@ static void init_ldb_clks(struct device_node
Quoting Manivannan Sadhasivam (2020-11-18 23:27:11)
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
> b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
> new file mode 100644
> index ..9d8981817ae3
> --- /dev/null
> +++
Quoting Dmitry Osipenko (2020-11-15 06:10:04)
> 15.11.2020 00:16, Stephen Boyd пишет:
> > Quoting Dmitry Osipenko (2020-11-04 05:48:10)
> >> The 600MHz is a too high clock rate for some SoC versions for the video
> >> decoder hardware and this may cause s
Quoting Thierry Reding (2020-11-20 08:18:39)
> On Fri, Nov 20, 2020 at 05:16:56PM +0100, Thierry Reding wrote:
> > On Wed, Oct 28, 2020 at 05:48:20PM -0700, Nicolin Chen wrote:
> > > Return values from read_dt_param() will be either TRUE (1) or
> > > FALSE (0), while dfll_fetch_pwm_params()
Quoting Thara Gopinath (2020-11-19 07:52:31)
> Partial hash was being copied into the final result buffer without the
> entire message block processed. Depending on how the end user processes
> this result buffer, errors vary from result buffer corruption to result
> buffer poisoing. Fix this
Quoting Thara Gopinath (2020-11-19 07:52:29)
> Qualcomm CE clock resource that is managed by BCM is required
> by crypto driver to access the core clock.
>
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Thara Gopinath
> ---
Applied to clk-next
Quoting Thara Gopinath (2020-11-19 07:52:28)
> Add clock id forc CE clock resource which is required to bring up the
> crypto engine on sdm845.
>
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Thara Gopinath
> ---
Applied to clk-next
was enabled. Now that isn't necessary and any
user-selectable options should be moved to depends syntax.
Reviewed-by: Stephen Boyd
Quoting Krzysztof Kozlowski (2020-11-17 23:48:12)
> On Tue, Nov 17, 2020 at 11:41:57PM -0800, Stephen Boyd wrote:
> > Quoting Krzysztof Kozlowski (2020-11-15 09:09:48)
> > > COMMON_CLK even though is a user-selectable symbol, is still selected by
> > > multiple other
This interrupt has an external pull-up so we don't need to pull it up
again. Drop the internal pull here. Note I don't think this really
changes anything, just noticed while looking at this irq pin.
Cc: Douglas Anderson
Signed-off-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7180
There's a proximity sensor on Lazor devices, but only for LTE SKUs.
Enable it only on the Lazor LTE SKUs and also configure it properly so
it works.
Cc: Douglas Anderson
Cc: Matthias Kaehlcke
Reviewed-by: Douglas Anderson
Signed-off-by: Stephen Boyd
---
Changes from v3
(https
than 16.
Cc: Daniel Campello
Cc: Lars-Peter Clausen
Cc: Peter Meerwald-Stadler
Cc: Douglas Anderson
Cc: Gwendal Grignou
Cc: Evan Green
Signed-off-by: Stephen Boyd
---
Changes from v1
(https://lore.kernel.org/r/20201120073842.3232458-1-swb...@chromium.org):
* Changed ternary to consider 17
There's a proximity sensor on Lazor devices, but only for LTE SKUs.
Enable it only on the Lazor LTE SKUs and also configure it properly so
it works.
Cc: Douglas Anderson
Cc: Matthias Kaehlcke
Signed-off-by: Stephen Boyd
---
Changes from v2
(https://lore.kernel.org/r/20201120074508.3236616-1
Quoting Doug Anderson (2020-11-20 09:50:38)
> Hi,
>
> On Thu, Nov 19, 2020 at 11:45 PM Stephen Boyd wrote:
> >
> > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts
> > @@ -13,6 +13
Quoting Doug Anderson (2020-11-20 10:16:28)
>
> Checking the math for the documented possible values of pos. What we want:
>
> 0 => 0
> 16 => 1
> 64 => 2
> 128 => 3
> 256 => 4
> 512 => 5
> 1024 => 6
> 4294967295 => 7
>
> So looks OK. Do we care about anything other than the documented
>
There's a proximity sensor on Lazor devices, but only for LTE SKUs.
Enable it only on the LTE SKUs and also configure it properly so it
works.
Cc: Douglas Anderson
Cc: Matthias Kaehlcke
Signed-off-by: Stephen Boyd
---
Changes from v1
(https://lore.kernel.org/r/20201118045454.2503325-1-swb
than 16.
Cc: Daniel Campello
Cc: Lars-Peter Clausen
Cc: Peter Meerwald-Stadler
Cc: Douglas Anderson
Cc: Gwendal Grignou
Cc: Evan Green
Signed-off-by: Stephen Boyd
---
This fixes commit 5b19ca2c78a0 ("iio: sx9310: Set various settings from
DT") in the togreg branch.
drivers/iio
Quoting Manivannan Sadhasivam (2020-11-18 06:44:01)
> On Sat, Nov 14, 2020 at 12:35:27PM -0800, Stephen Boyd wrote:
> > Quoting Vinod Koul (2020-11-06 01:38:19)
> > > On 05-11-20, 16:18, Manivannan Sadhasivam wrote:
> > > > +#include "reset.h"
> >
Quoting Krzysztof Kozlowski (2020-11-15 09:09:48)
> COMMON_CLK even though is a user-selectable symbol, is still selected by
> multiple other config options. COMMON_CLK should not be used when
> legacy clocks are provided by architecture, so it correctly depends on
> !HAVE_LEGACY_CLK.
>
>
There's a proximity sensor on Lazor devices, but only for LTE SKUs.
Enable it only on the LTE SKUs and also configure it properly so it
works.
Cc: Douglas Anderson
Cc: Matthias Kaehlcke
Signed-off-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts | 8
arch
in V2:
> -- add dp_display_handle_port_ststus_changed()
> -- fix kernel test robot complaint
>
> Reported-by: kernel test robot
> Fixes: 26b8d66a399e ("drm/msm/dp: promote irq_hpd handle to handle link
> training correctly")
> Signed-off-by: Kuogee Hsieh
> ---
Tested-by: Stephen Boyd
Quoting claudiu.bez...@microchip.com (2020-11-16 03:24:54)
>
>
> On 14.11.2020 23:14, Stephen Boyd wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > Quoting Claudiu Beznea (2020-11-06 01:46:23)
&
Quoting Enrico Weigelt, metux IT consult (2020-11-17 08:03:06)
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index c715d4681a0b..99e0188a15be 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -38,6 +38,14 @@ menuconfig COMMON_CLK
>
> if COMMON_CLK
>
> +config
Quoting abhin...@codeaurora.org (2020-11-17 12:34:56)
> On 2020-11-17 09:26, Stephen Boyd wrote:
> > I don't know what this debug print is for but it is super chatty,
> > throwing 8 lines of debug prints in the logs every time we update a
> > plane. It looks like it has no va
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