On 10/17/2018 7:50 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-17 05:04:10)
On 10/17/2018 5:07 PM, Taniya Das wrote:
Hello Stephen,
On 10/12/2018 11:05 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 23:12:27)
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya
Hello Stephen,
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:47)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 0cc4909..6d3136a 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
Hello Stephen,
On 10/10/2018 2:04 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:47)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 0cc4909..6d3136a 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
Hello Stephen,
On 10/10/2018 2:16 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:46)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 6e3bd19..ca6142f 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -10,6 +10,7
Hello Stephen,
On 10/10/2018 2:16 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 06:57:46)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 6e3bd19..ca6142f 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -10,6 +10,7
On 10/17/2018 5:07 PM, Taniya Das wrote:
Hello Stephen,
On 10/12/2018 11:05 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 23:12:27)
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote
On 10/17/2018 5:07 PM, Taniya Das wrote:
Hello Stephen,
On 10/12/2018 11:05 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 23:12:27)
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote
Hello Stephen,
On 10/12/2018 11:05 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 23:12:27)
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add
Hello Stephen,
On 10/12/2018 11:05 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 23:12:27)
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 11
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 11
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by the hardware engine.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 173 +
1
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 173 ++
drivers/cpufreq/Kconfig.ar
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by the hardware engine.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 173 +
1
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 173 ++
drivers/cpufreq/Kconfig.ar
Hello Viresh,
Thanks for your review comments.
On 10/5/2018 4:25 PM, Viresh Kumar wrote:
On 23-09-18, 16:03, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface
Hello Viresh,
Thanks for your review comments.
On 10/5/2018 4:25 PM, Viresh Kumar wrote:
On 23-09-18, 16:03, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface
Hello Niklas,
Thanks for your review comments.
On 10/5/2018 2:34 AM, Niklas Cassel wrote:
On Sun, Sep 23, 2018 at 04:03:13PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
Hello Niklas,
Thanks for your review comments.
On 10/5/2018 2:34 AM, Niklas Cassel wrote:
On Sun, Sep 23, 2018 at 04:03:13PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
Hello Rob,
Thanks for your review comments.
On 9/27/2018 9:01 PM, Rob Herring wrote:
On Sun, Sep 23, 2018 at 04:03:12PM +0530, Taniya Das wrote:
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which
Hello Rob,
Thanks for your review comments.
On 9/27/2018 9:01 PM, Rob Herring wrote:
On Sun, Sep 23, 2018 at 04:03:12PM +0530, Taniya Das wrote:
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral
On 10/10/2018 2:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-09 10:26:38)
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral
M845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (1):
clk: qcom: Add lpass clock controller driver for SDM845
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers
access.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 198 ++
4 files changed, 243 insertions(+)
create
M845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (1):
clk: qcom: Add lpass clock controller driver for SDM845
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers
access.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 198 ++
4 files changed, 243 insertions(+)
create
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
LPASS clocks
Hello Stephen,
On 10/8/2018 8:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-10-04 05:02:26)
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
LPASS clocks
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/dispcc-sdm845.c | 232 +
include/dt-bindings/clock/qcom,dispcc-sdm845.h | 11 ++
2 files changed, 243 insertions(+)
diff
New display port clock ops supported for display port clocks.
Also add support for the display port related branches and RCGs.
Taniya Das (2):
clk: qcom: rcg2: Add support for display port clock ops
clk: qcom : dispcc: Add support for display port clocks
drivers/clk/qcom/clk-rcg.h
New display port clock ops supported for display port clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 86 +
2 files changed, 87 insertions(+)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/dispcc-sdm845.c | 232 +
include/dt-bindings/clock/qcom,dispcc-sdm845.h | 11 ++
2 files changed, 243 insertions(+)
diff
New display port clock ops supported for display port clocks.
Also add support for the display port related branches and RCGs.
Taniya Das (2):
clk: qcom: rcg2: Add support for display port clock ops
clk: qcom : dispcc: Add support for display port clocks
drivers/clk/qcom/clk-rcg.h
New display port clock ops supported for display port clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 86 +
2 files changed, 87 insertions(+)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers
On 10/8/2018 4:08 PM, Niklas Cassel wrote:
On Mon, Oct 08, 2018 at 03:29:52PM +0530, Viresh Kumar wrote:
On 08-10-18, 10:40, Niklas Cassel wrote:
+ ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
+ "#freq-domain-cells", 0, );
Hello
On 10/8/2018 4:08 PM, Niklas Cassel wrote:
On Mon, Oct 08, 2018 at 03:29:52PM +0530, Viresh Kumar wrote:
On 08-10-18, 10:40, Niklas Cassel wrote:
+ ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
+ "#freq-domain-cells", 0, );
Hello
On 10/7/2018 7:01 PM, Vinod wrote:
Hi Taniya,
Thanks for the review, It would be great if you can strip the irrelevant
context while replying, makes it easier for people to follow.
On 06-10-18, 23:28, Taniya Das wrote:
+static struct clk_rcg2 pclk0_clk_src = {
+ .cmd_rcgr = 0x4d000
On 10/7/2018 7:01 PM, Vinod wrote:
Hi Taniya,
Thanks for the review, It would be great if you can strip the irrelevant
context while replying, makes it easier for people to follow.
On 06-10-18, 23:28, Taniya Das wrote:
+static struct clk_rcg2 pclk0_clk_src = {
+ .cmd_rcgr = 0x4d000
Jain
Signed-off-by: Taniya Das
Co-developed-by: Taniya Das
Signed-off-by: Anu Ramanathan
[rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
.../devicetree/bindings/clock/qcom,gcc.txt |1 +
drivers/clk/qcom/Kconfig
Jain
Signed-off-by: Taniya Das
Co-developed-by: Taniya Das
Signed-off-by: Anu Ramanathan
[rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
.../devicetree/bindings/clock/qcom,gcc.txt |1 +
drivers/clk/qcom/Kconfig
, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.
Signed-off-by: Shefali Jain
Signed-off-by: Taniya Das
Co-developed-by: Taniya Das
Signed-off-by: Anu Ramanathan
[rebase and tidyup for upstream]
Who did the tidying?
both of us
, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.
Signed-off-by: Shefali Jain
Signed-off-by: Taniya Das
Co-developed-by: Taniya Das
Signed-off-by: Anu Ramanathan
[rebase and tidyup for upstream]
Who did the tidying?
both of us
atic.
* Remove using child nodes and use reg-names to differentiate various
domains of LPASS CC.
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Da
tree flag. Also do not gate
these clocks if they are left unused.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 201
atic.
* Remove using child nodes and use reg-names to differentiate various
domains of LPASS CC.
Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Da
tree flag. Also do not gate
these clocks if they are left unused.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 201
On 9/29/2018 12:21 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-09-18 03:25:38)
@@ -3469,6 +3495,8 @@ enum {
[GCC_QSPI_CORE_CLK_SRC] = _qspi_core_clk_src.clkr,
[GCC_QSPI_CORE_CLK] = _qspi_core_clk.clkr,
[GCC_QSPI_CNOC_PERIPH_AHB_CLK
On 9/29/2018 12:21 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-09-18 03:25:38)
@@ -3469,6 +3495,8 @@ enum {
[GCC_QSPI_CORE_CLK_SRC] = _qspi_core_clk_src.clkr,
[GCC_QSPI_CORE_CLK] = _qspi_core_clk.clkr,
[GCC_QSPI_CNOC_PERIPH_AHB_CLK
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by the hardware engine.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 169 +
1
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by the hardware engine.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 169 +
1
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 11
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 11
tialization of 'index'
* Check for valid 'c'
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
.../bindings/cpufreq/cpufreq-qcom-hw.txt
tialization of 'index'
* Check for valid 'c'
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
.../bindings/cpufreq/cpufreq-qcom-hw.txt
On 9/11/2018 1:00 AM, Matthias Kaehlcke wrote:
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine
On 9/11/2018 1:00 AM, Matthias Kaehlcke wrote:
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine
rying to pinpoint the source of the problem, but it
would be nice to know what tree you're testing against.
Regards,
Amit
[1]
https://git.linaro.org/people/amit.kucheria/kernel.git/log/?h=integration/qcomlt-automerge-result
On Tue, Jul 24, 2018 at 4:12 PM, Taniya Das wrote:
The CPUfreq HW pre
rying to pinpoint the source of the problem, but it
would be nice to know what tree you're testing against.
Regards,
Amit
[1]
https://git.linaro.org/people/amit.kucheria/kernel.git/log/?h=integration/qcomlt-automerge-result
On Tue, Jul 24, 2018 at 4:12 PM, Taniya Das wrote:
The CPUfreq HW pre
Hello Matthias,
Thanks for your review comments.
On 8/29/2018 11:31 PM, Matthias Kaehlcke wrote:
Hi Taniya,
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver
Hello Matthias,
Thanks for your review comments.
On 8/29/2018 11:31 PM, Matthias Kaehlcke wrote:
Hi Taniya,
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver
Hello Stephen,
On 8/24/2018 12:08 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-08 03:15:26)
On 8/8/2018 11:52 AM, Stephen Boyd wrote:
Binding describes hardware controllable by the OS. That's the reality.
Let's not add mandatory clock bindings for clocks that the OS can't do
Hello Stephen,
On 8/24/2018 12:08 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-08 03:15:26)
On 8/8/2018 11:52 AM, Stephen Boyd wrote:
Binding describes hardware controllable by the OS. That's the reality.
Let's not add mandatory clock bindings for clocks that the OS can't do
tree flag.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 195 ++
4 files changed, 240 insertions
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt | 2 ++
.../devicetree/bindings/clock/qcom,lpasscc.txt | 35 ++
include/dt
tree flag.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 195 ++
4 files changed, 240 insertions
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt | 2 ++
.../devicetree/bindings/clock/qcom,lpasscc.txt | 35 ++
include/dt
pass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (2):
dt-bindings: clock: Introduce QCOM LPASS clock bindings
clk: qcom: Add lpass clock controller driver for SDM845
.../devicetree/bindings/clock/qcom,gcc.txt | 2 +
.../devicetree/bind
pass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (2):
dt-bindings: clock: Introduce QCOM LPASS clock bindings
clk: qcom: Add lpass clock controller driver for SDM845
.../devicetree/bindings/clock/qcom,gcc.txt | 2 +
.../devicetree/bind
Hello Rob,
Thanks for the review comments.
On 9/17/2018 8:48 AM, Rob Herring wrote:
On Tue, Sep 11, 2018 at 10:30:05PM +0530, Taniya Das wrote:
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
Hello Rob,
Thanks for the review comments.
On 9/17/2018 8:48 AM, Rob Herring wrote:
On Tue, Sep 11, 2018 at 10:30:05PM +0530, Taniya Das wrote:
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
tree flag.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 195 ++
4 files changed, 240 insertions
tree flag.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/gcc-sdm845.c | 35 +++
drivers/clk/qcom/lpasscc-sdm845.c | 195 ++
4 files changed, 240 insertions
ound on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (2):
dt-bindings: clock: Introduce QCOM LPASS clock bindings
clk: qcom: Add lpass clock controller driver for SDM845
.../devicetree/bindings/clock/
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt | 2 ++
.../devicetree/bindings/clock/qcom,lpasscc.txt | 31 ++
include/dt
ound on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
Taniya Das (2):
dt-bindings: clock: Introduce QCOM LPASS clock bindings
clk: qcom: Add lpass clock controller driver for SDM845
.../devicetree/bindings/clock/
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt | 2 ++
.../devicetree/bindings/clock/qcom,lpasscc.txt | 31 ++
include/dt
On 9/6/2018 7:21 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-09-05 11:26:10)
On 8/28/2018 2:41 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:14)
diff --git a/drivers/clk/qcom/lpasscc-sdm845.c
b/drivers/clk/qcom/lpasscc-sdm845.c
new file mode 100644
index 000
On 9/6/2018 7:21 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-09-05 11:26:10)
On 8/28/2018 2:41 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:14)
diff --git a/drivers/clk/qcom/lpasscc-sdm845.c
b/drivers/clk/qcom/lpasscc-sdm845.c
new file mode 100644
index 000
Hello Stephen,
Thanks for the review comments.
On 8/28/2018 2:44 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:13)
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree
Hello Stephen,
Thanks for the review comments.
On 8/28/2018 2:44 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:13)
Add device tree bindings for Low Power Audio subsystem clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree
Hello Stephen,
Thanks for the review comments.
On 8/28/2018 2:41 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:14)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 2b69cf2..7bd940d 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
Hello Stephen,
Thanks for the review comments.
On 8/28/2018 2:41 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-03 05:21:14)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 2b69cf2..7bd940d 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
On 8/28/2018 2:34 AM, Stephen Boyd wrote:
Quoting Stephen Boyd (2018-08-23 11:25:41)
Quoting Taniya Das (2018-08-22 03:28:31)
H. Ok. That won't work then. recalc_rate() better not try to
populate the frequency table then or it will not work. So I suppose it
needs to fallback
On 8/28/2018 2:34 AM, Stephen Boyd wrote:
Quoting Stephen Boyd (2018-08-23 11:25:41)
Quoting Taniya Das (2018-08-22 03:28:31)
H. Ok. That won't work then. recalc_rate() better not try to
populate the frequency table then or it will not work. So I suppose it
needs to fallback
On 8/21/2018 9:00 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-21 04:36:20)
On 8/18/2018 11:31 PM, Taniya Das wrote:
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-10 18:53:54)
[v4]
* Add
On 8/21/2018 9:00 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-21 04:36:20)
On 8/18/2018 11:31 PM, Taniya Das wrote:
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-10 18:53:54)
[v4]
* Add
Hello Stephen,
Thanks for the changes, I have tested the changes and would require the
change mentioned below for this to work.
On 8/18/2018 11:31 PM, Taniya Das wrote:
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das
Hello Stephen,
Thanks for the changes, I have tested the changes and would require the
change mentioned below for this to work.
On 8/18/2018 11:31 PM, Taniya Das wrote:
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-10 18:53:54)
[v4]
* Add recalc_clk_ops to calculate the clock frequency reading the current
perf state, also add CLK_GET_RATE_NOCACHE flag.
* Cleanup 'goto
Hello Stephen,
I will test these changes and get back.
On 8/18/2018 7:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-10 18:53:54)
[v4]
* Add recalc_clk_ops to calculate the clock frequency reading the current
perf state, also add CLK_GET_RATE_NOCACHE flag.
* Cleanup 'goto
Hello Craig,
Could you please correct the authorship and also provide the reference
to code where this is picked from?
On 8/11/2018 1:51 AM, Craig Tatlor wrote:
Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to
Hello Craig,
Could you please correct the authorship and also provide the reference
to code where this is picked from?
On 8/11/2018 1:51 AM, Craig Tatlor wrote:
Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to
QUPv3 clocks support DFS and thus register the RCGs which require support
for the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/gcc-sdm845.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index
-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 2 +
drivers/clk/qcom/clk-rcg2.c | 224
2 files changed, 226 insertions(+)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index dbd5a9e..e6300e0 100644
--- a/drivers/clk/qcom
here a RCG requires a Dynamic Frequency switch support
requires to register which would at runtime read the clock perf level
registers to identify the frequencies supported and update the frequency
table accordingly.
Taniya Das (2):
clk: qcom: Add support for RCG to register for DFS
clk: qcom:
QUPv3 clocks support DFS and thus register the RCGs which require support
for the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/gcc-sdm845.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index
-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 2 +
drivers/clk/qcom/clk-rcg2.c | 224
2 files changed, 226 insertions(+)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index dbd5a9e..e6300e0 100644
--- a/drivers/clk/qcom
here a RCG requires a Dynamic Frequency switch support
requires to register which would at runtime read the clock perf level
registers to identify the frequencies supported and update the frequency
table accordingly.
Taniya Das (2):
clk: qcom: Add support for RCG to register for DFS
clk: qcom:
core_clk.clkr,
+ [GCC_QSPI_CNOC_PERIPH_AHB_CLK] = _qspi_cnoc_periph_ahb_clk.clkr,
};
static const struct qcom_reset_map gcc_sdm845_resets[] = {
Reviewed-by: Taniya Das
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.
--
301 - 400 of 709 matches
Mail list logo
