Hi Masami,
On 15/09/2023 09:01, Masami Hiramatsu (Google) wrote:
Hi Tero,
On Mon, 11 Sep 2023 17:17:04 +0300
Tero Kristo wrote:
The synth traces incorrectly print pointer to the synthetic event values
instead of the actual value when using u64 type. Fix by addressing the
contents
The synth traces incorrectly print pointer to the synthetic event values
instead of the actual value when using u64 type. Fix by addressing the
contents of the union properly.
Fixes: ddeea494a16f ("tracing/synthetic: Use union instead of casts")
Cc: sta...@vger.kernel.org
Signed-of
equently M to satisfy the
constraint imposed by SSC.
Signed-off-by: Dario Binacchi
Reviewed-by: Tero Kristo
---
Changes in v5:
- Remove ssc_ack_mask field from dpll_data structure. It was not used.
- Change ssc_downspread type from u8 to bool in dpll_data structure.
Changes in v4:
- Update comm
Hi Dario,
Spent some time looking at this, had to read through the TRM chapter of
it also in quite detailed level to figure out how this is supposed to
work out.
Other than couple of minor nits below, the code seems ok to me. What is
the testing that has been done with this?
On 01/04/2021
-bindings: arm: keystone: Convert ti,sci to json schema
For the whole series:
Reviewed-by: Tero Kristo
.../bindings/arm/keystone/ti,sci.txt | 86
.../bindings/arm/keystone/ti,sci.yaml | 129 ++
.../devicetree/bindings/clock/ti,sci-clk.txt
On 11/04/2021 22:30, Dario Binacchi wrote:
Il 09/04/2021 12:32 Tero Kristo ha scritto:
On 08/04/2021 23:24, Dario Binacchi wrote:
Il 07/04/2021 15:21 Tero Kristo ha scritto:
On 07/04/2021 15:52, Rob Herring wrote:
On Wed, Apr 7, 2021 at 2:07 AM Dario Binacchi wrote:
Il 07
On 08/04/2021 23:24, Dario Binacchi wrote:
Il 07/04/2021 15:21 Tero Kristo ha scritto:
On 07/04/2021 15:52, Rob Herring wrote:
On Wed, Apr 7, 2021 at 2:07 AM Dario Binacchi wrote:
Il 07/04/2021 03:16 Rob Herring ha scritto:
On Tue, Apr 6, 2021 at 5:02 PM Dario Binacchi wrote
On 07/04/2021 15:52, Rob Herring wrote:
On Wed, Apr 7, 2021 at 2:07 AM Dario Binacchi wrote:
Il 07/04/2021 03:16 Rob Herring ha scritto:
On Tue, Apr 6, 2021 at 5:02 PM Dario Binacchi wrote:
Il 06/04/2021 16:06 Rob Herring ha scritto:
On Fri, Apr 2, 2021 at 2:21 PM Dario Binacchi
On 02/04/2021 22:20, Dario Binacchi wrote:
Until now, only the register offset was retrieved from the device tree
to be added, during access, to a common base address for the clocks.
If possible, we try to retrieve the physical address of the register
directly from the device tree.
The
| 3 +-
drivers/clk/ti/dpll3xxx.c | 20 ++---
drivers/clk/ti/dpll44xx.c | 6 +-
For the TI portions:
Reviewed-by: Tero Kristo
drivers/clk/zynq/pll.c | 12 +--
drivers/clk/zynqmp/divider.c | 1 +
include/linux/clk/imx.h
On 20/01/2021 21:51, Nishanth Menon wrote:
We can use CPU specific pmu configuration to expose the appropriate
CPU specific events rather than just the basic generic pmuv3 perf
events.
Reported-by: Sudeep Holla
Signed-off-by: Nishanth Menon
Reviewed-by: Tero Kristo
---
AM65: https
'
description in 'omap36xx_gate_clk_enable_with_hsdiv_restore'
Cc: Tero Kristo
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-o...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Lee Jones
Reviewed-by: Tero Kristo
---
drivers/clk/ti/gate.c | 2 +-
1 file changed, 1 insertion
in '_register_dpll'
Cc: Tero Kristo
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-o...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Lee Jones
Reviewed-by: Tero Kristo
---
drivers/clk/ti/dpll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/ti/dpll.c b
'
description in 'omap2_init_clk_clkdm'
Cc: Tero Kristo
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-o...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Lee Jones
Reviewed-by: Tero Kristo
---
drivers/clk/ti/clockdomain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
myself as secondary contact point where someone else has
taken over the maintainership.
Cc: Stephen Boyd
Cc: Michael Turquette
Cc: Nishanth Menon
Cc: Santosh Shilimkar
Cc: Borislav Petkov
Cc: Tony Luck
Signed-off-by: Tero Kristo
Signed-off-by: Tero Kristo
---
MAINTAINERS | 12 ++--
1
b366b2409c97 ("arm64: dts: ti: k3-am6: Add crypto accelarator node")
Signed-off-by: Nishanth Menon
Cc: Keerthy
Acked-by: Tero Kristo
---
Changes since V1:
- No change.
V1: https://lore.kernel.org/linux-arm-kernel/20201104224356.18040-4...@ti.com/
arch/arm64/boot/dts/ti/k3-am65-m
On 12/11/2020 15:21, Lee Jones wrote:
On Thu, 12 Nov 2020, Tero Kristo wrote:
On 12/11/2020 12:31, Lee Jones wrote:
Cc:ing a few people I know.
On Tue, 03 Nov 2020, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/knav_qmss_queue.c: In function
On 12/11/2020 12:31, Lee Jones wrote:
Cc:ing a few people I know.
On Tue, 03 Nov 2020, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/knav_qmss_queue.c: In function ‘knav_setup_queue_pools’:
drivers/soc/ti/knav_qmss_queue.c:1310:6: warning: variable
_generic_set_opp_regulator complaining about multiple
regulators not being supported.
Fixes: dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return
-EPROBE_DEFER")
Signed-off-by: Tero Kristo
---
drivers/opp/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/op
On 28/10/2020 16:54, Viresh Kumar wrote:
On 28-10-20, 16:13, Tero Kristo wrote:
The error check is incorrectly negated causing the helper to never
register anything. This causes platforms that depend on this
functionality to fail always with any cpufreq transition, and at least
TI DRA7 based
)
Reported-by: Nishanth Menon
Signed-off-by: Tero Kristo
Acked-by: Nishanth Menon
Acked-by: Santosh Shilimkar
---
drivers/soc/ti/ti_sci_pm_domains.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/ti/ti_sci_pm_domains.c
b/drivers/soc/ti/ti_sci_pm_domains.c
index af
)
Reported-by: Nishanth Menon
Signed-off-by: Tero Kristo
---
drivers/soc/ti/ti_sci_pm_domains.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/ti/ti_sci_pm_domains.c
b/drivers/soc/ti/ti_sci_pm_domains.c
index af2126d2b2ff..8afb3f45d263 100644
--- a/driv
Add stdout-path property in /chosen node so that earlycon can be
used by just adding earlycon in bootargs.
Signed-off-by: Tero Kristo
---
arch/arm/boot/dts/keystone-k2g.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm
On 08/10/2020 12:40, Faiz Abbas wrote:
Tero,
On 08/10/20 2:49 pm, Tero Kristo wrote:
On 08/10/2020 11:59, Faiz Abbas wrote:
Tero,
On 06/10/20 6:40 pm, Tero Kristo wrote:
On 06/10/2020 16:03, Faiz Abbas wrote:
Hi Tero,
On 06/10/20 5:21 pm, Tero Kristo wrote:
On 02/10/2020 19:45, Faiz
On 08/10/2020 11:59, Faiz Abbas wrote:
Tero,
On 06/10/20 6:40 pm, Tero Kristo wrote:
On 06/10/2020 16:03, Faiz Abbas wrote:
Hi Tero,
On 06/10/20 5:21 pm, Tero Kristo wrote:
On 02/10/2020 19:45, Faiz Abbas wrote:
The following patches enable configs in the arm64 defconfig to support
GPIO
On 06/10/2020 16:03, Faiz Abbas wrote:
Hi Tero,
On 06/10/20 5:21 pm, Tero Kristo wrote:
On 02/10/2020 19:45, Faiz Abbas wrote:
The following patches enable configs in the arm64 defconfig to support
GPIO and I2C support on TI's J721e platform.
Faiz Abbas (2):
arm64: defconfig: Enable OMAP
On 02/10/2020 19:45, Faiz Abbas wrote:
The following patches enable configs in the arm64 defconfig to support
GPIO and I2C support on TI's J721e platform.
Faiz Abbas (2):
arm64: defconfig: Enable OMAP I2C driver
arm64: defconfig: Enable DAVINCI_GPIO driver
arch/arm64/configs/defconfig
are registered with the onecell approach, but
we also add our own xlate service due to recent introduction of the
extended flag for TI SCI PM domains; genpd core xlate service requires
a single cell per powerdomain, but we are using two cells.
Signed-off-by: Tero Kristo
---
drivers/soc/ti/ti_sci_pm_domains.c
If a clock is disabled, its frequency should be allowed to change as
it is no longer in use. Add a flag towards this to the firmware clock
API handler routines.
Tested-by: Tomi Valkeinen
Signed-off-by: Tero Kristo
---
drivers/firmware/ti_sci.c | 6 --
1 file changed, 4 insertions(+), 2
to use frequency as close to the target freq as
possible despite the slack given here.
Signed-off-by: Tero Kristo
---
drivers/clk/keystone/sci-clk.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index
ter Ujfalusi
Signed-off-by: Tero Kristo
---
drivers/clk/keystone/sci-clk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index 2ad26cb927fd..f126b6045afa 100644
--- a/drivers/clk/keystone/sci-clk.c
+++ b/driv
Hi Santosh,
This series contains a few fixes for the TI SCI clock driver.
- Patch #1 is a clear bug fix, where we missed to parse assigned-clock
data properly to detect which clocks are in use on the SoC.
- Patch #2 is a performance improvement patch which avoids some
unnecessary round trips
Cache results of the latest query rate operation. This optimizes the
firmware interface a bit, avoiding unnecessary calls to firmware if we
know the result already; the firmware interface is pretty expensive
to use for query rate functionality.
Signed-off-by: Tero Kristo
---
drivers/clk
On 27/08/2020 10:07, Krzysztof Kozlowski wrote:
platform_get_irq() returns -ERRNO on error. In such case comparison
to 0 would pass the check.
Fixes: 86a18ee21e5e ("EDAC, ti: Add support for TI keystone and DRA7xx EDAC")
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: T
so:
Reviewed-by: Tero Kristo
Tested-by: Tero Kristo
diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c
index 5bc099052bd2..66629cad9531 100644
--- a/drivers/crypto/sa2ul.c
+++ b/drivers/crypto/sa2ul.c
@@ -9,8 +9,10 @@
* Tero Kristo
*/
#include
+#include
#includ
Hi Alexander,
One comment below.
On 18/07/2020 13:55, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If
On 19/07/2020 03:31, Randy Dunlap wrote:
Drop the repeated word "an" in a comment.
Insert "and" between "source" and "destination" as is done a few
lines earlier.
Signed-off-by: Randy Dunlap
Cc: Nishanth Menon
Cc: Tero Kristo
Cc: Santosh Shilimkar
On 15/07/2020 13:03, Grygorii Strashko wrote:
Hi All,
On 07/07/2020 10:02, Peter Ujfalusi wrote:
On 01/07/2020 13.18, Grygorii Strashko wrote:
On 19/06/2020 19:25, Grygorii Strashko wrote:
Select TI chip id driver for TI's SoCs based on K3 architecture to
provide
this information to user
On 17/07/2020 16:09, Arnd Bergmann wrote:
On Fri, Jul 17, 2020 at 1:20 PM Tero Kristo wrote:
On 17/07/2020 11:38, Faiz Abbas wrote:
On 16/07/20 11:58 pm, Arnd Bergmann wrote:
On Thu, Jul 16, 2020 at 3:25 PM Sekhar Nori wrote:
I tend to ignore individual patches to the defconfig file unless
Hi,
V4 of this series only fixes 32bit compile issue with patch #3. Appears
to be compiling now fine with ARM32 allmodconfig.
-Tero
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
the __watchdog_ping handle the bookkeeping for the worker and
last keepalive times.
Signed-off-by: Tero Kristo
Reviewed-by: Guenter Roeck
---
drivers/watchdog/watchdog_dev.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/watchdog_dev.c b
PM runtime should be disabled in the fail path of probe and when
the driver is removed.
Fixes: 2d63908bdbfb ("watchdog: Add K3 RTI watchdog support")
Signed-off-by: Tero Kristo
Reviewed-by: Guenter Roeck
---
drivers/watchdog/rti_wdt.c | 2 ++
1 file changed, 2 insertions(+)
timer, so add a new driver API for this purpose.
Signed-off-by: Tero Kristo
---
.../watchdog/watchdog-kernel-api.rst | 12
drivers/watchdog/watchdog_dev.c | 30 +++
include/linux/watchdog.h | 2 ++
3 files changed, 44
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout is probed from
hardware, and the last keepalive ping is adjusted to match it also.
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 112
On 17/07/2020 11:38, Faiz Abbas wrote:
Hi,
On 16/07/20 11:58 pm, Arnd Bergmann wrote:
On Thu, Jul 16, 2020 at 3:25 PM Sekhar Nori wrote:
On 7/16/20 5:49 PM, Faiz Abbas wrote:
Hi,
On 19/06/20 6:28 pm, Faiz Abbas wrote:
Enable CONFIG_SDHCI_AM654 to Support AM65x sdhci controller.
On 29/06/2020 15:52, Roger Quadros wrote:
Hi Tero,
This series adds SERDES PHY support and Type-C USB Super-Speed support
to the J721E EVM.
Please queue this for -next. Thanks.
Queued up for 5.9, thanks.
-Tero
cheers,
-roger
Changelog:
v4:
- Removed redundant patch
- used compaible
On 26/06/2020 21:34, Grygorii Strashko wrote:
The preferable name for gic-its is msi-controller, so rename it to fix
dtbs_check warning:
k3-j721e-common-proc-board.dt.yaml: interrupt-controller@180:
gic-its@182: False schema does not allow {'compatible':
['arm,gic-v3-its'], 'reg': [[0,
On 26/06/2020 21:40, Suman Anna wrote:
On 6/26/20 1:36 PM, Grygorii Strashko wrote:
On 26/06/2020 21:35, Grygorii Strashko wrote:
Rename smmu node to iommu to fix dtbs_check warning:
k3-j721e-common-proc-board.dt.yaml: smmu@3660: $nodename:0:
'smmu@3660' does not match
On 13/07/2020 13:14, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
On 10/07/2020 22:02, Faiz Abbas wrote:
The following patches add support for SD card node in am654x-evm
Because of fundamental interface issues (see patch 2 for details),
SD card was never enabled for silicon revision 1.0
These issues have been fixed with SR2.0 but boards with SR1.0 are
On 03/07/2020 10:44, Peter Ujfalusi wrote:
Hi,
Change since v1:
- not including dt-bindings/sound/ti-mcasp.h as it is not needed
the DT binding document and the driver is now in linux-next:
https://lore.kernel.org/lkml/159364215574.10630.2058528286314798186.b4...@kernel.org/
Before adding the
Acked-by: Tero Kristo
Santosh, are you going to pick this up?
-Tero
---
Continuing my work started at 93431e0607e5.
See also: git log --oneline '--author=Alexander A. Klimov
' v5.7..master
(Actually letting a shell for loop submit all this stuff for me.)
If there are any URLs
On 14/07/2020 10:06, Guenter Roeck wrote:
On 7/13/20 11:50 PM, Tero Kristo wrote:
On 14/07/2020 08:15, Guenter Roeck wrote:
On 7/13/20 6:18 AM, Tero Kristo wrote:
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout
On 14/07/2020 08:15, Guenter Roeck wrote:
On 7/13/20 6:18 AM, Tero Kristo wrote:
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout is probed from
hardware, and the last keepalive ping is adjusted to match it also
timer, so add a new driver API for this purpose.
Signed-off-by: Tero Kristo
---
.../watchdog/watchdog-kernel-api.rst | 12
drivers/watchdog/watchdog_dev.c | 30 +++
include/linux/watchdog.h | 2 ++
3 files changed, 44
Hi,
Changes from previous version:
- Documentation changes for patch #2
- Dropped the configurable module parameter for window size
- Merged any needed functionality from old patches #3 and #4 to patch #3
now
- Added new rti driver internal API for getting remaining milliseconds
left on the
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout is probed from
hardware, and the last keepalive ping is adjusted to match it also.
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 111
PM runtime should be disabled in the fail path of probe and when
the driver is removed.
Fixes: 2d63908bdbfb ("watchdog: Add K3 RTI watchdog support")
Signed-off-by: Tero Kristo
Reviewed-by: Guenter Roeck
---
drivers/watchdog/rti_wdt.c | 2 ++
1 file changed, 2 insertions(+)
the __watchdog_ping handle the bookkeeping for the worker and
last keepalive times.
Signed-off-by: Tero Kristo
Reviewed-by: Guenter Roeck
---
drivers/watchdog/watchdog_dev.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/watchdog_dev.c b
On 05/07/2020 18:07, Guenter Roeck wrote:
On 7/3/20 5:04 AM, Tero Kristo wrote:
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout is probed from
hardware, and the last keepalive ping is adjusted to match it also
On 05/07/2020 17:49, Guenter Roeck wrote:
On 7/3/20 5:04 AM, Tero Kristo wrote:
RTI watchdog can support different open window sizes. Add support for
these and add a new module parameter to configure it. The default open
window size for the driver still remains at 50%.
Also, modify the margin
On 05/07/2020 17:58, Guenter Roeck wrote:
On 7/3/20 5:04 AM, Tero Kristo wrote:
Certain watchdogs require the watchdog only to be pinged within a
specific time window, pinging too early or too late cause the watchdog
to fire. In cases where this sort of watchdog has been started before
kernel
Looks fine to me.
Acked-by: Tero Kristo
---
Continuing my work started at 93431e0607e5.
See also: git log --oneline '--author=Alexander A. Klimov
' v5.7..master
(Actually letting a shell for loop submit all this stuff for me.)
If there are any URLs to be removed completely
window config, assume the 32k source
clock is running slower.
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 112 +++--
1 file changed, 95 insertions(+), 17 deletions(-)
diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c
index
Hi,
Version 2 of the series has quite a few changes based on feedback on
previous version.
1) Add new watchdog core API for adjusting the last hw keepalive time
(Patch #2)
2) Modify the driver to support adjusting the window size, current
driver only supports 50% window size. The window
timer, so add a new driver API for this purpose.
Signed-off-by: Tero Kristo
---
drivers/watchdog/watchdog_dev.c | 23 +++
include/linux/watchdog.h| 2 ++
2 files changed, 25 insertions(+)
diff --git a/drivers/watchdog/watchdog_dev.c b/drivers/watchdog/watchdog_dev.c
If the RTI watchdog is running already during probe, the driver must
configure itself to match the HW. Window size and timeout is probed from
hardware, and the last keepalive ping is adjusted to match it also.
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 26
PM runtime should be disabled in the fail path of probe and when
the driver is removed.
Fixes: 2d63908bdbfb ("watchdog: Add K3 RTI watchdog support")
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/watchdog/r
the __watchdog_ping handle the bookkeeping for the worker and
last keepalive times.
Signed-off-by: Tero Kristo
Reviewed-by: Guenter Roeck
---
drivers/watchdog/watchdog_dev.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/watchdog_dev.c b
On 01/07/2020 16:34, Guenter Roeck wrote:
On 6/30/20 10:50 PM, Tero Kristo wrote:
[ ... ]
Hardware supports changing the timeout value, however it only updates this
during the next window (preload values are picked once user pings the watchdog.)
The current driver doesn't support or use
On 30/06/2020 23:23, Guenter Roeck wrote:
On Thu, Jun 25, 2020 at 08:04:50PM +0300, Tero Kristo wrote:
On 25/06/2020 16:35, Guenter Roeck wrote:
On 6/25/20 1:32 AM, Tero Kristo wrote:
On 24/06/2020 18:24, Jan Kiszka wrote:
On 24.06.20 13:45, Tero Kristo wrote:
If the RTI watchdog has been
On 25/06/2020 16:35, Guenter Roeck wrote:
On 6/25/20 1:32 AM, Tero Kristo wrote:
On 24/06/2020 18:24, Jan Kiszka wrote:
On 24.06.20 13:45, Tero Kristo wrote:
If the RTI watchdog has been started by someone (like bootloader) when
the driver probes, we must adjust the initial ping timeout
On 24/06/2020 18:24, Jan Kiszka wrote:
On 24.06.20 13:45, Tero Kristo wrote:
If the RTI watchdog has been started by someone (like bootloader) when
the driver probes, we must adjust the initial ping timeout to match the
currently running watchdog window to avoid generating watchdog reset
Hi,
This series fixes attaching the RTI watchdog driver to an already
running timer; it can be started by boot loader for example. In this
case, we must read the current remaining timeout, and adjust the
min_hw_heartbeat based on that so that we don't attempt to either pet
the watchdog too early,
If the RTI watchdog has been started by someone (like bootloader) when
the driver probes, we must adjust the initial ping timeout to match the
currently running watchdog window to avoid generating watchdog reset.
Signed-off-by: Tero Kristo
---
drivers/watchdog/rti_wdt.c | 25
the __watchdog_ping handle the bookkeeping for the worker and
last keepalive times.
Signed-off-by: Tero Kristo
---
drivers/watchdog/watchdog_dev.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/watchdog_dev.c b/drivers/watchdog/watchdog_dev.c
On 19/05/2020 11:20, Faiz Abbas wrote:
According to the latest AM65x Data Manual[1], a different output tap
delay value is optimum for a given speed mode. Update these values.
[1] http://www.ti.com/lit/gpn/am6526
Signed-off-by: Faiz Abbas
Queued up for 5.9, thanks.
-Tero
---
v3: Updated
On 19/06/2020 19:26, Grygorii Strashko wrote:
On 15/06/2020 10:47, Peter Ujfalusi wrote:
Hi Grygorii,
On 13/06/2020 19.43, Grygorii Strashko wrote:
Hi Tero,
Hence k3 platforms chipid module driver was merged, there is follow
up series
to add corresponding DT chipid nodes.
[1]
On 18/06/2020 19:09, Jan Kiszka wrote:
On 12.03.20 10:58, Tero Kristo wrote:
TI K3 SoCs contain an RTI (Real Time Interrupt) module which can be
used to implement a windowed watchdog functionality. Windowed watchdog
will generate an error if it is petted outside the time window, either
too
On 18/06/2020 10:28, Herbert Xu wrote:
On Fri, Jun 12, 2020 at 11:22:02PM +0200, Julia Lawall wrote:
From: kernel test robot
PTR_ERR should normally access the value just tested by IS_ERR
Generated by: scripts/coccinelle/tests/odd_ptr_err.cocci
Fixes: 5b8516f3bedb ("crypto: sa2ul: Add
On 07/05/2020 21:15, Faiz Abbas wrote:
According to the latest AM65x Data Manual[1], a different output tap
delay value is optimum for a given speed mode. Update these values.
[1] http://www.ti.com/lit/gpn/am6526
Signed-off-by: Faiz Abbas
---
v2: Rebased to the latest mainline kernel
ARCH_OMAP2PLUS
select CPU_V6
+ select PM_GENERIC_DOMAINS if PM
select SOC_HAS_OMAP2_SDRC
config ARCH_OMAP3
diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c
--- a/drivers/soc/ti/omap_prm.c
+++ b/drivers/soc/ti/omap_prm.c
@@ -6,18 +6,50 @@
*Tero Kristo
On 12/05/2020 23:38, Tony Lindgren wrote:
The PRM (Power and Reset Module) has registers to enable and disable
power domains, so let's update the binding for that.
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Signed-off-by: Tony Lindgren
---
asily when CONFIG_PREEMPT is enabled.
Signed-off-by: Tero Kristo
---
drivers/soc/ti/omap_prm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c
index 96c6f777519c..c9b3f9ebf0bb 100644
--- a/drivers/soc/ti/omap_prm.c
+++ b/d
,
Suman
regards
Suman
Please see the v1 cover-letter [1] for the details on the issues.
regards
Suman
[1] https://patchwork.kernel.org/cover/11422723/
[2] https://patchwork.kernel.org/comment/23274389/
Suman Anna (1):
remoteproc: Fix and restore the parenting hierarchy for vdev
Tero Kristo
a minor comments on patch #2, other than that looks fine to me. Once
that is fixed, for whole series:
Reviewed-by: Tero Kristo
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 05/05/2020 22:34, Grygorii Strashko wrote:
The Texas Instruments K3 Multicore SoC platforms have chipid module which
is represented by CTRLMMR_xxx_JTAGID register and contains information
about SoC id and revision.
Bits:
31-28 VARIANT Device variant
27-12 PARTNO Part number
11-1
On 22/10/2019 19:21, Benoit Parrot wrote:
Tony Lindgren wrote on Tue [2019-Oct-22 08:48:16 -0700]:
* Benoit Parrot [191016 18:47]:
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -704,6 +704,60 @@
ti,bit-shift = <8>;
On 09/10/2019 12:57, Faiz Abbas wrote:
Hi,
On 19/09/19 9:02 PM, Faiz Abbas wrote:
The following are dts patches to add MMC/SD Support on TI's J721e base
board.
Patches depend on Lokesh's gpio patches[1] and device exclusivity patches[2].
[1] https://patchwork.kernel.org/cover/11085643/
[2]
On 03/10/2019 14:42, Faiz Abbas wrote:
MMC0_SDWP is not connected to the card. Indicate this by adding a
disable-wp flag.
Signed-off-by: Faiz Abbas
---
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
On 09/10/2019 17:23, H. Nikolaus Schaller wrote:
Am 09.10.2019 um 15:55 schrieb Tero Kristo :
On 09/10/2019 15:53, H. Nikolaus Schaller wrote:
Am 08.10.2019 um 22:15 schrieb H. Nikolaus Schaller :
But I can't access the sgx registers and get memory faults. Maybe
my script has a bug
On 09/10/2019 15:53, H. Nikolaus Schaller wrote:
Am 08.10.2019 um 22:15 schrieb H. Nikolaus Schaller :
Am 08.10.2019 um 10:00 schrieb Tero Kristo :
On 07/10/2019 22:24, H. Nikolaus Schaller wrote:
Hi Tero,
Am 07.10.2019 um 21:18 schrieb Tero Kristo :
On 07/10/2019 18:52, Tony Lindgren
anything
obviously broken, thus:
Reviewed-by: Tero Kristo
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
, it can affect the latenc/delay
Signed-off-by: Peter Ujfalusi
Reviewed-by: Tero Kristo
---
drivers/dma/dmaengine.h | 8
include/linux/dmaengine.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
index 501c0b063f85
On 01/10/2019 09:16, Peter Ujfalusi wrote:
It might be good to add some sort of description for the patch. At least
telling what cppi5 actually is and why it is needed for UDMA.
Other than that, looks fine to me.
-Tero
Signed-off-by: Peter Ujfalusi
---
include/linux/dma/ti-cppi5.h |
, but other than that:
Reviewed-by: Tero Kristo
---
drivers/dma/dmaengine.c | 73 ++
include/linux/dmaengine.h | 108 ++
+ * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA
+ * driver. The client driver
On 01/10/2019 09:16, Peter Ujfalusi wrote:
Update the provider and client documentation with details about the
metadata support.
Signed-off-by: Peter Ujfalusi
Couple of typos below, but they don't really change the readability of
the document so:
Reviewed-by: Tero Kristo
, it is just
cosmetic so I don't mind.
Reviewed-by: Tero Kristo
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 07/10/2019 22:24, H. Nikolaus Schaller wrote:
Hi Tero,
Am 07.10.2019 um 21:18 schrieb Tero Kristo :
On 07/10/2019 18:52, Tony Lindgren wrote:
Hi,
* H. Nikolaus Schaller [191005 16:59]:
Please try with Tero's current github branch at github.com/t-kristo/linux-pm.git
5.4-rc1-ipc from few
On 07/10/2019 18:52, Tony Lindgren wrote:
Hi,
* H. Nikolaus Schaller [191005 16:59]:
Hi all,
with the arrival of v5.4-rc1 some of Tony's sysc patches have arrived
upstream, so we do no longer need them here.
Therefore, I have rebased my drivers/staging/pvr driver [1] and fixed some
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