On 05/19/2014 10:41 AM, Dan Carpenter wrote:
This one does feel like a bug in the original code as you mention. I
have added the TI devs to the CC list so they can help us.
Yes this is a bug, the dra7_apll_enable() should return some sort of
error code if the lock fails. EBUSY maybe?
-Tero
-by: Julia Lawall julia.law...@lip6.fr
Acked-by: Tero Kristo t-kri...@ti.com
Mike, do you want to queue this as a fix or shall I add this to be
queued for 3.16?
-Tero
---
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
index b986f61..efc71a0 100644
--- a/drivers/clk/ti/apll.c
+++ b
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote:
Mike,
On 04/24/2014 06:03 PM, Tero Kristo wrote:
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote:
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote
On 04/30/2014 02:39 PM, Peter Ujfalusi wrote:
In order to get correct clock dividers for AESS/ABE we need to set the
dpll_abe_m2x2_ck rate to be double of dpll_abe_ck.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Thanks, queued for 3.15-rc/ti-clk-drv.
-Tero
---
On 04/30/2014 03:30 PM, Tero Kristo wrote:
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Yeah, looks like this bug was copied over from the legacy clock data
On 04/30/2014 03:31 PM, Tero Kristo wrote:
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
abe_iclk's parent is aess_fclk and not abe_clk.
Also correct the parameters for clock rate calculation as used for OMAP4
since in PRCM level there's no difference between the two platform
regarding to AESS
On 05/07/2014 01:20 PM, Peter Ujfalusi wrote:
Hi,
Changes since v1:
- ATL binding documentation and driver has been separated.
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors
On 04/26/2014 02:02 AM, Joel Fernandes wrote:
From: Lokesh Vutla
DES IP already has main and interface clk as des_fck.
Node for des_fck is missing in clk tree. Adding the same.
Signed-off-by: Lokesh Vutla
Signed-off-by: Joel Fernandes
---
arch/arm/boot/dts/omap44xx-clocks.dtsi |8
On 04/26/2014 02:02 AM, Joel Fernandes wrote:
From: Lokesh Vutla lokeshvu...@ti.com
DES IP already has main and interface clk as des_fck.
Node for des_fck is missing in clk tree. Adding the same.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
running PTP.
clockcheck: clock jumped backward or running slower than expected!
By selecting dpll_core_m5_ck as the clocksource fixes this issue.
In AM335x dpll_core_m5_ck is the default clocksource.
Signed-off-by: George Cherian
Acked-by: Tero Kristo
---
drivers/clk/ti/clk-43xx.c | 16
running PTP.
clockcheck: clock jumped backward or running slower than expected!
By selecting dpll_core_m5_ck as the clocksource fixes this issue.
In AM335x dpll_core_m5_ck is the default clocksource.
Signed-off-by: George Cherian george.cher...@ti.com
Acked-by: Tero Kristo t-kri...@ti.com
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Yeah, looks like this bug was copied over from the legacy clock data.
Acked-by: Tero Kristo
Signed-off
Acked-by: Tero Kristo
---
arch/arm/boot/dts/omap54xx-clocks.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index d784ff5d3904..86fc507a0567 100644
--- a/arch/arm/boot/dts
peter.ujfal...@ti.com
Acked-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap54xx-clocks.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index d784ff5d3904
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Yeah, looks like this bug was copied over from the legacy clock data.
Acked-by: Tero Kristo t-kri...@ti.com
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote:
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote:
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL requironments.
The dpll_abe_m2x2_ck clock need to be set to double
of ABE DPLL rate in order to have correct clocks
for audio.
Do you have some sort of TRM
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL requironments.
The dpll_abe_m2x2_ck clock need to be set to double
of ABE DPLL rate in order to have correct clocks
for audio.
Do you have some sort of TRM
On 03/13/2014 10:35 PM, Joel Fernandes wrote:
Signed-off-by: Joel Fernandes
---
arch/arm/boot/dts/am33xx.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 4e6c959..51b7008 100644
---
On 03/14/2014 01:36 AM, Joel Fernandes wrote:
On 03/13/2014 04:52 PM, Rob Herring wrote:
On Thu, Mar 13, 2014 at 3:35 PM, Joel Fernandes wrote:
Introduce a generic omap timer initialization function that can
be used by all SoCs for which support is available in the clocksource
driver
On 03/14/2014 01:36 AM, Joel Fernandes wrote:
On 03/13/2014 04:52 PM, Rob Herring wrote:
On Thu, Mar 13, 2014 at 3:35 PM, Joel Fernandes jo...@ti.com wrote:
Introduce a generic omap timer initialization function that can
be used by all SoCs for which support is available in the clocksource
On 03/13/2014 10:35 PM, Joel Fernandes wrote:
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 4e6c959..51b7008 100644
---
On 03/10/2014 02:49 PM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Program USB_DLL_M2 output to half rate as well.
Patch depends on
https://www.mail-archive.com/linux-omap@vger.kernel.org/msg101300.html
CC: Mike Turquette
CC: Tero
...@linaro.org
CC: Tero Kristo t-kri...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 597979b..f376923 100644
--- a/arch/arm/boot/dts/dra7.dtsi
of usb_otg_ss1_refclk960m and
usb_otg_ss2_refclk960m.
CC: Tero Kristo
Signed-off-by: Roger Quadros
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index
On 03/07/2014 03:09 PM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Also program USB_DLL_M2 output to half rate.
CC: Mike Turquette
CC: Tero Kristo
Signed-off-by: Roger Quadros
---
drivers/clk/ti/clk-7xx.c | 11 +++
1 file
On 03/07/2014 03:09 PM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Also program USB_DLL_M2 output to half rate.
CC: Mike Turquette mturque...@linaro.org
CC: Tero Kristo t-kri...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
of usb_otg_ss1_refclk960m and
usb_otg_ss2_refclk960m.
CC: Tero Kristo t-kri...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot
good to me.
Acked-by: Tero Kristo
---
arch/arm/boot/dts/am33xx.dtsi |4
arch/arm/boot/dts/am4372.dtsi |5 +
arch/arm/boot/dts/dra7.dtsi |5 +
arch/arm/boot/dts/omap3.dtsi |5 +
arch/arm/boot/dts/omap4.dtsi |5 +
arch/arm/boot/dts/omap5.dtsi
On 01/29/2014 08:19 PM, Nishanth Menon wrote:
cpu0 clock node has no functionality, since cpufreq-cpu0 is already
capable of picking up the clock from dts.
Signed-off-by: Nishanth Menon
Acked-by: Tero Kristo
---
drivers/clk/ti/clk-33xx.c |1 -
1 file changed, 1 deletion(-)
diff
On 01/29/2014 08:19 PM, Nishanth Menon wrote:
cpu0 clock node has no functionality, since cpufreq-cpu0 is already
capable of picking up the clock from dts.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/ti/clk-33xx.c |1 -
1 file
Looks good to me.
Acked-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |4
arch/arm/boot/dts/am4372.dtsi |5 +
arch/arm/boot/dts/dra7.dtsi |5 +
arch/arm/boot/dts/omap3.dtsi |5 +
arch/arm/boot/dts/omap4.dtsi |5 +
arch/arm
On 02/14/2014 01:13 AM, Tony Lindgren wrote:
* Nishanth Menon [140205 01:06]:
omap3_noncore_dpll_set_rate forces a reparent to the same clk_ref
for every call that takes place. This is an can be done only if a change
is detected.
Signed-off-by: Nishanth Menon
Would like to see acks on this
On 02/14/2014 01:13 AM, Tony Lindgren wrote:
* Nishanth Menon n...@ti.com [140205 01:06]:
omap3_noncore_dpll_set_rate forces a reparent to the same clk_ref
for every call that takes place. This is an can be done only if a change
is detected.
Signed-off-by: Nishanth Menon n...@ti.com
Would
On 01/29/2014 01:21 PM, Christoph Fritz wrote:
On Tue, 2014-01-28 at 18:02 +0100, Christoph Fritz wrote:
On Tue, 2014-01-28 at 15:40 +0200, Tero Kristo wrote:
Due to a regression since next-20140122 the following errors are present:
- pin sys_clkout2, which gets configured to 24 Mhz
On 01/29/2014 01:21 PM, Christoph Fritz wrote:
On Tue, 2014-01-28 at 18:02 +0100, Christoph Fritz wrote:
On Tue, 2014-01-28 at 15:40 +0200, Tero Kristo wrote:
Due to a regression since next-20140122 the following errors are present:
- pin sys_clkout2, which gets configured to 24 Mhz
On 01/29/2014 01:21 PM, Christoph Fritz wrote:
On Tue, 2014-01-28 at 18:02 +0100, Christoph Fritz wrote:
On Tue, 2014-01-28 at 15:40 +0200, Tero Kristo wrote:
Due to a regression since next-20140122 the following errors are present:
- pin sys_clkout2, which gets configured to 24 Mhz
On 01/29/2014 11:38 AM, Tomi Valkeinen wrote:
On 2014-01-29 11:29, Ivaylo Dimitrov wrote:
On 29.01.2014 11:10, Tero Kristo wrote:
It looks like the omap36xx version of the omap96m_alwon_fck is modelled
improperly in the dts files. I don't have access to omap36xx hardware
myself, but give
improperly in the dts files. I don't have access to omap36xx hardware
myself, but give a try for the following patch:
From: Tero Kristo
Date: Wed, 29 Jan 2014 11:03:46 +0200
Subject: [PATCH] ARM: dts: omap36xx: fix omap96m_alwon_fck
OMAP36xx has different hardware implementation
improperly in the dts files. I don't have access to omap36xx hardware
myself, but give a try for the following patch:
From: Tero Kristo t-kri...@ti.com
Date: Wed, 29 Jan 2014 11:03:46 +0200
Subject: [PATCH] ARM: dts: omap36xx: fix omap96m_alwon_fck
OMAP36xx has different hardware implementation
On 01/29/2014 11:38 AM, Tomi Valkeinen wrote:
On 2014-01-29 11:29, Ivaylo Dimitrov wrote:
On 29.01.2014 11:10, Tero Kristo wrote:
It looks like the omap36xx version of the omap96m_alwon_fck is modelled
improperly in the dts files. I don't have access to omap36xx hardware
myself, but give
On 01/29/2014 01:21 PM, Christoph Fritz wrote:
On Tue, 2014-01-28 at 18:02 +0100, Christoph Fritz wrote:
On Tue, 2014-01-28 at 15:40 +0200, Tero Kristo wrote:
Due to a regression since next-20140122 the following errors are present:
- pin sys_clkout2, which gets configured to 24 Mhz
On 01/28/2014 11:48 AM, Tomi Valkeinen wrote:
On 2014-01-28 11:35, Christoph Fritz wrote:
On Tue, 2014-01-28 at 11:04 +0200, Tomi Valkeinen wrote:
On 2014-01-27 20:41, Christoph Fritz wrote:
On Mon, 2014-01-27 at 19:30 +0200, Ivaylo Dimitrov wrote:
linux-next-20140124 DSS is broken on N900
On 01/28/2014 11:48 AM, Tomi Valkeinen wrote:
On 2014-01-28 11:35, Christoph Fritz wrote:
On Tue, 2014-01-28 at 11:04 +0200, Tomi Valkeinen wrote:
On 2014-01-27 20:41, Christoph Fritz wrote:
On Mon, 2014-01-27 at 19:30 +0200, Ivaylo Dimitrov wrote:
linux-next-20140124 DSS is broken on N900
regmap_debugfs_early list is created for
this purpose which is parsed later in the boot.
Signed-off-by: Tero Kristo
---
drivers/base/regmap/regmap-debugfs.c | 57 +++---
1 file changed, 52 insertions(+), 5 deletions(-)
diff --git a/drivers/base/regmap/regmap-debugfs.c
On 10/24/2013 12:18 PM, Mark Brown wrote:
On Thu, Oct 24, 2013 at 12:07:48PM +0300, Tero Kristo wrote:
+ if (!regmap_debugfs_root) {
+ struct regmap_debugfs_node *node;
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
+ if (!node
regmap_debugfs_early list is created for
this purpose which is parsed later in the boot.
Signed-off-by: Tero Kristo
---
drivers/base/regmap/regmap-debugfs.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/base/regmap/regmap-debugfs.c
b/drivers/base
regmap_debugfs_early list is created for
this purpose which is parsed later in the boot.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/base/regmap/regmap-debugfs.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/base/regmap/regmap-debugfs.c
b
On 10/24/2013 12:18 PM, Mark Brown wrote:
On Thu, Oct 24, 2013 at 12:07:48PM +0300, Tero Kristo wrote:
+ if (!regmap_debugfs_root) {
+ struct regmap_debugfs_node *node;
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
+ if (!node
regmap_debugfs_early list is created for
this purpose which is parsed later in the boot.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/base/regmap/regmap-debugfs.c | 57 +++---
1 file changed, 52 insertions(+), 5 deletions(-)
diff --git a/drivers/base/regmap
Hi,
Chirping in my thoughts below.
On 09/05/2013 11:30 PM, Stephen Warren wrote:
On 09/05/2013 12:29 PM, Mike Turquette wrote:
On Wed, Sep 4, 2013 at 11:36 AM, Stephen Warren wrote:
On 09/03/2013 05:22 PM, Mike Turquette wrote:
Quoting Stephen Warren (2013-08-30 14:37:46)
On 08/30/2013
Hi,
Chirping in my thoughts below.
On 09/05/2013 11:30 PM, Stephen Warren wrote:
On 09/05/2013 12:29 PM, Mike Turquette wrote:
On Wed, Sep 4, 2013 at 11:36 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/03/2013 05:22 PM, Mike Turquette wrote:
Quoting Stephen Warren (2013-08-30
On 08/29/2013 09:23 PM, Santosh Shilimkar wrote:
Mike,
On Thursday 22 August 2013 01:53 AM, Mike Turquette wrote:
This series introduces binding definitions for common register-mapped
clock multiplexer, divider and gate IP blocks along with the
corresponding setup functions for matching DT
On 08/29/2013 09:23 PM, Santosh Shilimkar wrote:
Mike,
On Thursday 22 August 2013 01:53 AM, Mike Turquette wrote:
This series introduces binding definitions for common register-mapped
clock multiplexer, divider and gate IP blocks along with the
corresponding setup functions for matching DT
minor beautification of clk-provider.h where some whitespace is
added and of_fixed_factor_clock_setup is relocated to maintain a
consistent style.
Tero Kristo contributed helpful bug fixes to this patch.
Signed-off-by: Mike Turquette
Tested-by: Heiko Stuebner
Reviewed-by: Heiko Stuebner
minor beautification of clk-provider.h where some whitespace is
added and of_fixed_factor_clock_setup is relocated to maintain a
consistent style.
Tero Kristo contributed helpful bug fixes to this patch.
Signed-off-by: Mike Turquette mturque...@linaro.org
Tested-by: Heiko Stuebner he...@sntech.de
On 08/02/2013 10:30 AM, Roger Quadros wrote:
Hi Nishant,
On 08/01/2013 06:06 PM, Nishanth Menon wrote:
On 08/01/2013 09:58 AM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Also program USB_DLL_M2 output to half rate.
Signed-off-by: Roger
On 08/02/2013 10:30 AM, Roger Quadros wrote:
Hi Nishant,
On 08/01/2013 06:06 PM, Nishanth Menon wrote:
On 08/01/2013 09:58 AM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Also program USB_DLL_M2 output to half rate.
Signed-off-by: Roger
Looks good to me. Ack.
On Fri, 2013-02-15 at 22:23 +0800, Axel Lin wrote:
> Since commit ba305e31 "regulator: twl: fix twl4030 support for smps
> regulators",
> VDD1_VSEL_table and VDD2_VSEL_table are not used any more. Remove them.
>
> Signed-off-by: Axel Lin
> ---
>
Looks good to me. Ack.
On Fri, 2013-02-15 at 22:23 +0800, Axel Lin wrote:
Since commit ba305e31 regulator: twl: fix twl4030 support for smps
regulators,
VDD1_VSEL_table and VDD2_VSEL_table are not used any more. Remove them.
Signed-off-by: Axel Lin axel@ingics.com
---
to
me, thus for whole set:
Acked-by: Tero Kristo
On Tue, 2012-11-13 at 09:28 +0100, Peter Ujfalusi wrote:
> Hello,
>
> This series converts the twl-core to use regmap for IO towards the chip.
> With the conversion to regmap IO we no longer need to allocate bigger buffer
> for
>
to
me, thus for whole set:
Acked-by: Tero Kristo t-kri...@ti.com
On Tue, 2012-11-13 at 09:28 +0100, Peter Ujfalusi wrote:
Hello,
This series converts the twl-core to use regmap for IO towards the chip.
With the conversion to regmap IO we no longer need to allocate bigger buffer
for
writes.
I
Acked-by: Tero Kristo
On Wed, 2012-10-31 at 15:54 +0100, Peter Ujfalusi wrote:
> The correct chip id is 1 since the PWM module is on address 0x49. With the
> current TWL6030_MODULE_ID1 the kernel will crash early since:
> #define TWL6030_MODULE_ID1 0x0E
> and
> static st
Acked-by: Tero Kristo t-kri...@ti.com
On Wed, 2012-10-31 at 15:54 +0100, Peter Ujfalusi wrote:
The correct chip id is 1 since the PWM module is on address 0x49. With the
current TWL6030_MODULE_ID1 the kernel will crash early since:
#define TWL6030_MODULE_ID1 0x0E
and
static struct twl_client
Hi Peter,
The MFD patches in this set look good to me except for the minor comment
on patch 2 I just sent. That is with my limited knowledge of DT
though...
-Tero
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On Tue, 2012-08-14 at 17:22 +0300, Peter Ujfalusi wrote:
> Signed-off-by: Peter Ujfalusi
I think this one could use a short commit message, also about why
kfree():s are dropped (handled internally by devm_* etc.)
-Tero
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On Tue, 2012-08-14 at 17:22 +0300, Peter Ujfalusi wrote:
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
I think this one could use a short commit message, also about why
kfree():s are dropped (handled internally by devm_* etc.)
-Tero
--
To unsubscribe from this list: send the line
Hi Peter,
The MFD patches in this set look good to me except for the minor comment
on patch 2 I just sent. That is with my limited knowledge of DT
though...
-Tero
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