To simplify the code, move the logging into the common mmc_blk_alloc_req()
and drop the rather useless information about the partition type/id.
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/block.c | 25 +
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git
_workqueue() in the error path.
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/block.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index 39308b35a1fb..02b656305042 100644
--- a/drivers/mmc/core/blo
mmc_blk_probe() isn't a hotpath, which makes it's questionable to use
unlikely(). Therefore let's simply drop it.
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index
While working on fixing KASAN splats for the mmc block device driver, I stumbled
over a couple of annoying things in the mmc_blk_probe() path. This series takes
care of them.
Ulf Hansson (3):
mmc: block: Drop use of unlikely() in mmc_blk_probe()
mmc: block: Simplify logging during probe about
On Wed, 3 Mar 2021 at 07:30, DooHyun Hwang wrote:
>
> On Tue, 2 Mar 2021 at 10:38, Ulf Hansson wrote:
> >On Wed, 10 Feb 2021 at 06:12, DooHyun Hwang
> >wrote:
> >>
> >> A power cycle is required if CMD11 fails.
> >> CMD11 failure should be handled as
On Thu, 25 Feb 2021 at 12:13, Renius Chen wrote:
>
> Short circuit protection mechanism of GL9755 is disabled by HW default
> setting. Enable short circuit protection to prevent GL9755 from being
> damaged by short circuit or over current.
>
> Signed-off-by: Renius Chen
Applied for next,
On Thu, 25 Feb 2021 at 15:55, Yann Gautier wrote:
>
> To properly manage commands awaiting R1B responses, the capability
> MMC_CAP_NEED_RSP_BUSY is enabled in mmci driver, for stm32 variant.
> The issue was seen on STM32MP157C-EV1 board, with an erase command,
> with secure erase argument,
On Thu, 25 Feb 2021 at 04:22, wrote:
>
> From: Peng Fan
>
> V3:
> Patch 1, drop unneeded pinctrl-0/1/2
> Patch 2 is new to avoid break dt bindings check
> V2:
> patch 1, 2, 3 is new
> patch 4 is not changed
>
>
On Sat, 20 Feb 2021 at 15:29, Christophe JAILLET
wrote:
>
> A 'uniphier_sd_clk_enable()' call should be balanced by a corresponding
> 'uniphier_sd_clk_disable()' call.
> This is done in the remove function, but not in the error handling path of
> the probe.
>
> Add the missing call.
>
> Fixes:
On Sat, 20 Feb 2021 at 15:29, Christophe JAILLET
wrote:
>
> A 'tmio_mmc_host_free()' call is missing in the remove function, in order
> to balance a 'tmio_mmc_host_alloc()' call in the probe.
> This is done in the error handling path of the probe, but not in the remove
> function.
>
> Add the
On Mon, 22 Feb 2021 at 09:15, Seunghui Lee wrote:
>
> Some of SD cards sets permanent write protection
> due to lifespan or internal problem.
> Host can find out it's protected permanantly during initialization.
> Once set read only during initialization,
> it could prevent unnecessary write
On Wed, 10 Feb 2021 at 06:12, DooHyun Hwang wrote:
>
> A power cycle is required if CMD11 fails.
> CMD11 failure should be handled as no response.
>
> If there is a timeout error that means no response to the CMD11,
> do not send the CMD11 again and the power cycle is required.
> Any other errors
On Mon, 15 Feb 2021 at 02:51, Yue Hu wrote:
>
> From: Yue Hu
>
> mmc_spi_send_{csd|cid} have similar function body. Let's remove the
> duplicated part to simplify the code, just add opcode to distinguish
> them in changed mmc_spi_send_cxd().
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
On Mon, 1 Mar 2021 at 22:59, Marten Lindahl wrote:
>
> Hi Ulf!
>
> Thank you for your comments!
>
> On Mon, Mar 01, 2021 at 09:50:56AM +0100, Ulf Hansson wrote:
> > + Adrian
> >
> > On Tue, 16 Feb 2021 at 23:43, Mårten Lindahl
> > wrote:
> &
+ Adrian
On Tue, 16 Feb 2021 at 23:43, Mårten Lindahl wrote:
>
> Sometimes SD cards that has been run for a long time enters a state
> where it cannot by itself be recovered, but needs a power cycle to be
> operational again. Card status analysis has indicated that the card can
> end up in a
On Wed, 17 Feb 2021 at 09:46, DooHyun Hwang wrote:
>
>
> On 17/02/21 8:00 am, Adrian Hunter wrote:
> >On 17/02/21 7:46 am, Adrian Hunter wrote:
> >> On 17/02/21 7:22 am, DooHyun Hwang wrote:
> >>> This makes to handle read errors faster by not retrying multiple
> >>> block read(CMD18) errors with
ode in __rpm_callback() to always check
> the device's PM-runtime status under its PM lock.
>
> Link:
> https://lore.kernel.org/linux-pm/capdykfqm06kdw_p8wxsm4dijdbho4bb6t4k50uqqvr1_cos...@mail.gmail.com/
> Fixes: 21d5c57b3726 ("PM / runtime: Use device links")
> Reported-by:
, hence limit the new helper function, mmc_regulator_set_vqmmc2() to
this too.
Note that, to allow for flexibility mmc host drivers need to manage the
enable/disable of the vqmmc2 regulator themselves, while the regulator is
looked up through the common mmc_regulator_get_supply().
Signed-off-by: Ulf
ear.
Note that, the new print for UHS-II cards doesn't include the actual
selected speed mode. Instead, this is going to be added from subsequent
change.
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/bus.c | 4 +++-
drivers/mmc/core/host.h | 5 +
2 files changed, 8 insertions(+), 1 deletion(-)
implementation of the UHS-II specific bits.
At this point, there is only one new host ops added to manage the various
ios settings needed for UHS-II. Additional host ops that are needed, are
being added from subsequent changes.
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/Makefile | 2
The current print of the bus speed mode in mmc_add_card() has grown over
the years and is now difficult to parse. Let's clean up the code and also
take the opportunity to properly announce "DDR" for eMMCs as
"high speed DDR", which is according to the eMMC spec.
Signed
. Hopefully this can provide some guidance
and an overall structure, of how I think the code could evolve.
More details are available in the commit messages and through comments in the
code, for each path.
Kind regards
Uffe
[1]
https://lkml.org/lkml/2020/11/5/1472
Ulf Hansson (4):
mmc: core
to take some actions.
Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit d7fb9c24209556478e65211d7a1f056f2d43cceb:
mmc: sdhci-pltfm: Fix linking err for sdhci-brcmstb (2021-02-01 11:13:09
+0100)
are available in the Git repository at:
git://git.kernel.org/pub
reference counting to avoid
unnecessary code-paths and lockings.
Cc: Pierre Ossman
Cc: Russell King
Signed-off-by: Ulf Hansson
---
drivers/mmc/core/core.c | 89 ++--
include/linux/mmc/host.h | 2 -
2 files changed, 4 insertions(+), 87 deletions(-)
diff --git
, the corresponding host->bus_ops pointer stays valid and
assigned.
For these reasons, let's drop the superfluous reference counting and the
redundant validations in mmc_hw|sw_reset().
Signed-off-by: Ulf Hansson
---
Note, ideally mmc_hw|sw_reset() shall be converted to take a struct mmc_c
On Tue, 9 Feb 2021 at 20:09, wrote:
>
> From: Roman Kiryanov
>
> Android Studio Emulator no longer uses
> this driver.
>
> Signed-off-by: Roman Kiryanov
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/Kconfig| 7 -
> drivers/mmc/host/Makefile |
On Mon, 8 Feb 2021 at 10:52, Jiapeng Chong
wrote:
>
> Fix the following coccicheck warning:
>
> ./drivers/mmc/host/omap_hsmmc.c:297:6-25: WARNING: Comparison of 0/1 to
> bool variable.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
I already have a patch for this:
On Tue, 9 Feb 2021 at 15:52, wrote:
>
> From: Yann Gautier
>
> Since [1], the erase argument for mmc_erase() function is saved in
> erase_arg field of card structure. It is preferable to use it instead of
> hard-coded MMC_SECURE_ERASE_ARG, which from eMMC 4.51 spec is not
> recommended:
>
On Tue, 9 Feb 2021 at 15:01, Yann Gautier wrote:
>
> On 2/8/21 4:03 PM, Ulf Hansson wrote:
> > On Mon, 8 Feb 2021 at 13:16, Yann GAUTIER wrote:
> >>
> >> On 2/5/21 1:19 PM, Yann GAUTIER wrote:
> >>> On 2/5/21 10:53 AM, Ulf Hansson wrote:
> >>&g
On Tue, 9 Feb 2021 at 01:23, wrote:
>
> From: Roman Kiryanov
>
> Android Studio Emulator no longer uses
> this driver.
>
> Signed-off-by: Roman Kiryanov
Roman, thanks for your patch. I personally think this makes sense and
I haven't heard anybody using this driver for a while.
However, please
On Mon, 8 Feb 2021 at 13:16, Yann GAUTIER wrote:
>
> On 2/5/21 1:19 PM, Yann GAUTIER wrote:
> > On 2/5/21 10:53 AM, Ulf Hansson wrote:
> >> - trimmed cc-list
> >>
> >> On Thu, 4 Feb 2021 at 13:08, wrote:
> >>>
> >>> From: Yan
On Wed, 3 Feb 2021 at 08:23, Chanwoo Lee wrote:
>
> From: ChanWoo Lee
>
> MMC_CQE_QUEUE_FULL is not set and is only cleared.
> Therefore, define is unnecessary.
>
> Signed-off-by: ChanWoo Lee
Applied for next, thanks!
As a next step, we should probably convert the mq->cqe_busy member
into a
On Mon, 1 Feb 2021 at 06:57, Yue Hu wrote:
>
> From: Yue Hu
>
> Since mmc_send_cxd_data() does not care card if opcode is MMC_SEND_CSD.
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/core/mmc_ops.c | 6 +++---
> 1 file changed, 3 insertions(+), 3
On Thu, 4 Feb 2021 at 16:19, Emil Renner Berthing wrote:
>
> This updates callers of tasklet_init() in drivers/mmc to the new API
> in commit 12cc923f1ccc ("tasklet: Introduce new initialization API")
>
> All changes are made by coccinelle using the following semantic patch:
>
> @ match @
> type
On Thu, 4 Feb 2021 at 08:09, Xiaofei Tan wrote:
>
> It is redundant to do irqsave and irqrestore in hardIRQ context, where
> it has been in a irq-disabled context.
>
> Signed-off-by: Xiaofei Tan
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/cavium.c | 5 ++---
> 1
On Sun, 7 Feb 2021 at 14:10, Peng Fan wrote:
>
> > Subject: [PATCH V2 0/4] imx esdhc dt/driver update
>
> Gentle ping..
I was expecting a new version from you to address the comment on the
DT bindings from Rob.
Otherwise this looks good to me.
Kind regards
Uffe
>
> Thanks,
> Peng.
>
> >
> >
+ Adrian, Christoph
On Thu, 21 Jan 2021 at 09:13, Liu Xiang wrote:
>
> After commit "40d09b53bfc557af7481b9d80f060a7ac9c7d314", request is
> completed in softirq. This may cause the system to suffer bad preemptoff
> time.
> The mmc driver has its own complete workqueue, but it can not work
>
Hi Linus,
Here's a PR with a couple of MMC fixes intended for v5.11-rc7. Details about the
highlights are as usual found in the signed tag.
Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit 1048ba83fb1c00cd24172e23e8263972f6b5d9ac:
Linux 5.11-rc6 (2021-01-31
- trimmed cc-list
On Thu, 4 Feb 2021 at 13:08, wrote:
>
> From: Yann Gautier
>
> To properly manage commands awaiting R1B responses, the capability
> MMC_CAP_NEED_RSP_BUSY is enabled in mmci driver, for variants that
> manage busy detection.
> This R1B management needs both the flags
On Tue, 8 Dec 2020 at 07:19, Chris Ruehl wrote:
>
> When set mmc-hs400-1_8(2)v in dts, hs200 capabilities are not checked
> in the mmc logic. Thus cleanup and remove MMC_CAP2_HS200_1_8V_SDR /
> MMC_CAP2_HS200_1_2V_SDR from host->caps2.
I had another look at this - and I am struggling to get a
On Wed, 27 Jan 2021 at 09:42, Abaci Team wrote:
>
> Fix the following coccicheck warnings:
>
> ./drivers/base/power/domain.c:938:31-33: WARNING !A || A && B is
> equivalent to !A || B.
>
> Reported-by: Abaci Robot
> Suggested-by: Jiapeng Zhong
> Signed-off-by:
On Mon, 25 Jan 2021 at 18:40, Florian Fainelli wrote:
>
> +Nicolas,
>
> On 1/25/2021 4:50 AM, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > sdhci_pltfm_suspend() is only available when CONFIG_PM_SLEEP
> > support is built into the kernel, which caused a regression
> > in a recent bugfix:
On Mon, 25 Jan 2021 at 13:28, Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> Having both the driver and the unit test in the same module
> leads to a link failure because of the extra init/exit functions:
>
> drivers/mmc/host/sdhci-of-aspeed-test.c:98:1: error: redefinition of
> '__inittest'
On Fri, 22 Jan 2021 at 12:49, Andrew Jeffery wrote:
>
> Randy found that with the following Kconfig settings we have duplicate
> definitions (e.g. __inittest()) in sdhci-of-aspeed due to competing
> module_init()/module_exit() calls from kunit and driver the itself.
>
> ```
>
On Mon, 25 Jan 2021 at 07:47, Chanwoo Lee wrote:
>
> From: ChanWoo Lee
>
> From the 4.19 kernel, thread related code has been removed in queue.c.
> So we can exclude unnecessary header file.
>
> Signed-off-by: ChanWoo Lee
Applied for next, thanks!
Kind regards
Uffe
> ---
>
+ Adrian
On Tue, 8 Dec 2020 at 07:19, Chris Ruehl wrote:
>
> Fix the probe if hs400-1_8v / hs400-1_2v is used in the
> dts and mmc-hs400-enhanced-strobe isn't set.
> That was the first attemped, but it turns out that some
> more cleanups and simplifications can be done.
My apologies for the
On Fri, 22 Jan 2021 at 04:23, Andrew Jeffery wrote:
>
> Randy found that with the following Kconfig settings we have duplicate
> definitions (e.g. __inittest()) in sdhci-of-aspeed due to competing
> module_init()/module_exit() calls from kunit and driver the itself.
>
> ```
>
On Wed, 20 Jan 2021 at 08:39, Jiapeng Zhong
wrote:
>
> Fix the following coccicheck warnings:
>
> ./drivers/mmc/host/atmel-mci.c:2436:2-34: WARNING: Assignment
> of 0/1 to bool variable.
>
> ./drivers/mmc/host/atmel-mci.c:2425:2-20: WARNING: Assignment
> of 0/1 to bool variable.
>
> Reported-by:
Hi Linus,
Here's a PR with a couple of MMC fixes intended for v5.11-rc5. Details about the
highlights are as usual found in the signed tag.
Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit 7c53f6b671f4aba70ff15e1b05148b10d58c2837:
Linux 5.11-rc3 (2021-01-10
On Wed, 20 Jan 2021 at 15:28, Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> A few Arm platforms are getting removed in v5.12, this removes
> the corresponding mmc drivers.
>
> Link:
> https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-a...@kernel.org/T/
>
>
> Arnd Bergmann
ers/mmc/core/core.c
>
> Note:
> The host driver I use is sdhci-esdhc-imx.c
Alright, I have looped in Fabio and Haibo that knows this driver,
let's see if they can help.
>
> Thanks
> Xiaolei
Kind regards
Uffe
>
> -Original Message-
> From: Ulf Hansson
&g
On Mon, 18 Jan 2021 at 05:27, Xiaolei Wang wrote:
>
> R1J57L mmc chip hw capibility indicates that it supports trim function,
> but this function does not work properly, the SDIO bus does not respond,
> and the IO has been waiting so set quirks to skip trim
Are you sure this is an eMMC problem
On Thu, 14 Jan 2021 at 04:14, Andrew Jeffery wrote:
>
> Hello,
>
> This series implements support for the MMC core clk-phase-* devicetree
> bindings
> in the Aspeed SD/eMMC driver. The relevant register was exposed on the AST2600
> and is present for both the SD/MMC controller and the dedicated
On Tue, 19 Jan 2021 at 06:14, Yue Hu wrote:
>
> From: Yue Hu
>
> Since it's doing nothing for shutdown behavior. And the callback will
> be checked firstly in mmc_bus_shutdown().
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/core/mmc_test.c | 5
On Mon, 18 Jan 2021 at 09:45, Yue Hu wrote:
>
> From: Yue Hu
>
> The host parameter is not used in the body of mmc_sd_get_csd(),
> so let's remove it. Update related code at the same time.
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
Kind regards
Uffe
> ---
> v2: fix minor commit
+ linux-block, Jens, Christoph
On Wed, 20 Jan 2021 at 13:11, Bhaskara Budiredla wrote:
>
> This patch introduces to mmcpstore. The functioning of mmcpstore
> is similar to mtdpstore. mmcpstore works on FTL based flash devices
> whereas mtdpstore works on raw flash devices. When the system
On Wed, 20 Jan 2021 at 01:04, Jeremy Linton wrote:
>
> The RPi4 has an Arasan controller it carries over
> from the RPi3 and a newer eMMC2 controller.
> Because of a couple of quirks, it seems wiser to bind
> these controllers to the same driver that DT is using
> on this platform rather than the
On Tue, 19 Jan 2021 at 08:37, Yue Hu wrote:
>
> From: Yue Hu
>
> mmc_test_cleanup() has same body as __mmc_test_prepare() with write
> except the character to memset().
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/core/mmc_test.c | 24
On Tue, 19 Jan 2021 at 12:05, Viresh Kumar wrote:
>
> On 19-01-21, 12:02, Ulf Hansson wrote:
> > As a matter of fact this was quite recently discussed [1], which also
> > pointed out some issues when using the "required-opps" in combination,
> > but perhaps that
mented by a GENPD driver, then the performance state is passed
> > to the parent domain.
> >
> > Tested-by: Peter Geis
> > Tested-by: Nicolas Chauvet
> > Tested-by: Matt Merhar
> > [tested on NVIDIA Tegra20/30/124 SoCs]
> > Suggested-by: Ulf Hansson
> >
On Thu, 14 Jan 2021 at 16:28, Muhammad Husaini Zulkifli
wrote:
>
> Hi,
>
> This patch series adds Ultra High Speed(UHS-1) Bus Speed Mode Support for
> Keem Bay SoC SD Card.
> Summary of each patches as per below:
>
> Patch 1: Use of_device_get_match_data() helper to get the match-data.
> Patch
On Fri, 15 Jan 2021 at 10:51, Yang Li wrote:
>
> Fix the following coccicheck warning:
> ./drivers/mmc/host/omap_hsmmc.c:297:6-25: WARNING: Comparison of 0/1 to
> bool variable
>
> According to the context, vqmmc_enabled is more suitable for bool
> type.
>
> Reported-by: Abaci Robot
>
On Wed, 16 Dec 2020 at 14:17, Zheng Yongjun wrote:
>
> Replace a comma between expression statements by a semicolon.
>
> Signed-off-by: Zheng Yongjun
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/core/core.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
On Mon, 11 Jan 2021 at 09:22, Renius Chen wrote:
>
> To improve the compatibility of GL9763E with HS400 eMMC cards,
> finetune the RX delay of HS400 mode.
>
> Signed-off-by: Renius Chen
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 9 +
> 1
On Fri, 15 Jan 2021 at 03:55, Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> When imx_data->pinctrl is not a valid pointer, pinctrl_lookup_state
> will trigger kernel panic.
>
> When we boot Dual OS on Jailhouse hypervisor, we let the 1st Linux to
> configure pinmux ready for the 2nd OS, so the
On Fri, 15 Jan 2021 at 20:32, Grygorii Strashko
wrote:
>
> On TI J7200 SoC the SDHCI controller compatible defined as
> "ti,j7200-sdhci-8bit", "ti,j721e-sdhci-8bit"
> or
> "ti,j7200-sdhci-4bit", "ti,j721e-sdhci-4bit"
> which causes dtbs_check warnings:
> mmc@4f8: compatible:
On Tue, 22 Dec 2020 at 14:34, Zheng Yongjun wrote:
>
> Don't open-code roundup() kernel macro.
>
> Signed-off-by: Zheng Yongjun
> ---
> drivers/mmc/core/sdio_io.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/core/sdio_io.c b/drivers/mmc/core/sdio_io.c
>
On Mon, 18 Jan 2021 at 06:36, Rajendra Nayak wrote:
>
>
> On 1/15/2021 8:13 PM, Bjorn Andersson wrote:
> > On Thu 24 Dec 05:12 CST 2020, Roja Rani Yarubandi wrote:
> >
> >> @@ -629,6 +658,16 @@ static int __maybe_unused
> >> geni_i2c_runtime_suspend(struct device *dev)
> >> struct
On Tue, 19 Jan 2021 at 04:44, Viresh Kumar wrote:
>
> On 18-01-21, 13:46, Ulf Hansson wrote:
> > You seem to be worried about latency/overhead while doing the
> > propagation upwards in the hierarchy. That seems like a reasonable
> > concern to me, especially as the gen
On Mon, 18 Jan 2021 at 12:05, Viresh Kumar wrote:
>
> On 18-01-21, 11:59, Ulf Hansson wrote:
> > Good point! I certainly overlooked that when reviewing. We need to
> > reevaluate the new state when propagating to the parent(s).
> >
> > To me, it looks like when doing
mented by a GENPD driver, then the performance state is passed
> > to the parent domain.
> >
> > Tested-by: Peter Geis
> > Tested-by: Nicolas Chauvet
> > Tested-by: Matt Merhar
> > Suggested-by: Ulf Hansson
> > Reviewed-by: Ulf Hansson
> > Signe
ivers to handle the error code specially.
>
> Suggested-by: Ulf Hansson
> Signed-off-by: Dmitry Osipenko
Reviewed-by: Ulf Hansson
Kind regards
Uffe
> ---
> drivers/base/power/domain.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/base/power
On Fri, 15 Jan 2021 at 06:47, Renius Chen wrote:
>
> GL9763E enters ASPM L1 state after a very short idle in default,
> even during a burst of request. So the R/W performance of GL9763E
> is low with some platforms, which support ASPM mechanism, due to
> entering ASPM L1 state very frequently in
On Thu, 14 Jan 2021 at 07:25, 陳建宏 wrote:
>
> > Ulf Hansson 於 2021年1月13日 週三 下午6:53寫道：
> >
> > On Wed, 6 Jan 2021 at 10:27, Renius Chen wrote:
> > >
> > > The R/W performance of GL9763E is low with some platforms, which
> > > support ASPM mec
On Wed, 13 Jan 2021 at 12:34, Yue Hu wrote:
>
> From: Yue Hu
>
> Since they will always being in successful path to return 0 directly,
> no need to set err = 0.
>
> Signed-off-by: Yue Hu
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/core/mmc.c | 4
> 1 file changed,
On Wed, 13 Jan 2021 at 12:59, Aswath Govindraju wrote:
>
> The following series of patches,
> - Adds new compatible string for AM64 SoC
> - Adds support for AM64 SoC in sdhci_am654 driver
>
> This patch series is a combination of the patches [1] and [2].
>
> [1] -
On Wed, 13 Jan 2021 at 11:57, wrote:
>
> From: Ricky Wu
>
> Make sure voltage below 0.5V before power on
> when do power cycle
> At mmc-core recognition card phase will do
> power cycle quickly so our device need at least 100ms
> to make voltage down to below 0.5V
>
> Signed-off-by: Ricky Wu
t to make it clear, to avoid confusions.
I will not consider to pick this up, as long as the *non-panic*
read/write support is implemented through pstore specific callbacks.
Instead those requests should go through the regular block I/O path,
as like any other file system.
Kind regards
Ulf Hansson
On Wed, 13 Jan 2021 at 06:24, Samuel Holland wrote:
>
> If the device suspend process begins before the mmc host's autosuspend
> timeout, the host will continue running during system sleep. Avoid
> this by forcing runtime suspend during a global suspend transition.
>
> Signed-off-by: Samuel
On Thu, 7 Jan 2021 at 23:15, Al Cooper wrote:
>
> Commit e7b5d63a82fe ("mmc: sdhci-brcmstb: Add shutdown callback")
> that added a shutdown callback to the diver, is causing "mmc timeout"
> errors on S5 suspend. The problem was that the "remove" was queuing
> additional MMC commands after the
On Wed, 13 Jan 2021 at 12:20, Aswath Govindraju wrote:
>
> Hi Uffe,
>
> On 13/01/21 4:26 pm, Ulf Hansson wrote:
> > On Thu, 7 Jan 2021 at 06:55, Aswath Govindraju wrote:
> >>
> >> Add compatible string for AM64 SoC in device tree binding of AM654 SDHC
On Thu, 7 Jan 2021 at 15:31, Manivannan Sadhasivam
wrote:
>
> The SDHCI controller on SDX55 is based on MSM SDHCI v5 IP. Hence,
> document the compatible with "qcom,sdhci-msm-v5" as the fallback.
> While at it, let's also sort the compatibles in ascending order.
>
>
On Fri, 18 Dec 2020 at 08:16, Chaotian Jing wrote:
>
> when get request SW timeout, if CMD/DAT xfer done irq coming right now,
> then there is race between the msdc_request_timeout work and irq handler,
> and the host->cmd and host->data may set to NULL in irq handler. also,
> current flow ensure
On Sun, 27 Dec 2020 at 18:42, Wolfram Sang
wrote:
>
> Signed-off-by: Wolfram Sang
Applied for next, thanks!
Kind regards
Uffe
> ---
> Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Wed, 23 Dec 2020 at 10:05, H. Nikolaus Schaller wrote:
>
> I have not found any user for this struct component.
>
> Signed-off-by: H. Nikolaus Schaller
Applied for next, thanks!
Kind regards
Uffe
> ---
> include/linux/platform_data/mmc-omap.h | 3 +--
> 1 file changed, 1 insertion(+), 2
On Wed, 6 Jan 2021 at 09:53, Renius Chen wrote:
>
> Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of
> register 888h to decide whether to enhance random R/W performance
> of GL9763E. CQHCI support will be enabled if and only if the bit is
> set and the GLI_9763E_MB_CMQ_OFF bit
On Mon, 11 Jan 2021 at 16:51, Muhammad Husaini Zulkifli
wrote:
>
> Hi,
>
> This patch series are to fix the kernel-doc format warning when using
> kernel-doc
> script tool and to change code style of mapping the syscon field for
> readability
> and consistency.
>
> Kindly help to review this
On Wed, 30 Dec 2020 at 10:04, wrote:
>
> From: Ricky Wu
>
> Added flag MMC_CAP2_NO_SDIO to mmc->caps2
> Card Reader not support SDIO
>
> Signed-off-by: Ricky Wu
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/rtsx_pci_sdmmc.c | 3 ++-
> 1 file changed, 2 insertions(+),
On Wed, 23 Dec 2020 at 10:05, H. Nikolaus Schaller wrote:
>
> I have not found any user for this struct component.
>
> Signed-off-by: H. Nikolaus Schaller
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/jz4740_mmc.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git
On Mon, 11 Jan 2021 at 10:46, YANG LI wrote:
>
> Fix the following coccicheck warning:
> ./drivers/mmc/host/omap_hsmmc.c:297:6-25: WARNING: Comparison of 0/1 to
> bool variable
If you really want this change, I prefer if you can clean up all use
of "pbias_enabled" - and at the same time, do the
On Thu, 7 Jan 2021 at 06:55, Aswath Govindraju wrote:
>
> Add compatible string for AM64 SoC in device tree binding of AM654 SDHCI
> module as the same IP is used.
>
> Signed-off-by: Aswath Govindraju
Do you have a corresponding patch for the driver as well? I would like
to apply them together.
On Wed, 6 Jan 2021 at 10:27, Renius Chen wrote:
>
> The R/W performance of GL9763E is low with some platforms, which
> support ASPM mechanism, due to entering L1 state very frequently
> in R/W process. Enlarge its ASPM L1 entry delay to improve the
> R/W performance of GL9763E.
What do you mean
On Wed, 30 Dec 2020 at 10:04, wrote:
>
> From: Ricky Wu
>
> Make sure voltage below 0.5V before power on
> when do power cycle
>
> Signed-off-by: Ricky Wu
> ---
> drivers/mmc/host/rtsx_pci_sdmmc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c
>
- trimmed cc-list
On Thu, 17 Dec 2020 at 19:08, Dmitry Osipenko wrote:
>
> Add OPP and SoC core voltage scaling support to the display controller
> driver. This is required for enabling system-wide DVFS on pre-Tegra186
> SoCs.
>
> Tested-by: Peter Geis
> Tested-by: Nicolas Chauvet
>
-regulator voltage syncing once the state of domain is synced, at
> this point the Core voltage is allowed to go lower.
>
> Signed-off-by: Dmitry Osipenko
This looks reasonable to me, feel free to add:
Reviewed-by: Ulf Hansson
Kind regards
Uffe
> ---
> drivers/so
On Thu, 17 Dec 2020 at 19:07, Dmitry Osipenko wrote:
>
> NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
> to an external SoC power rail. Core power domain covers vast majority of
> hardware blocks within a Tegra SoC. The voltage of a power domain should
> be set to a value
- trimmed cc-list
On Thu, 17 Dec 2020 at 19:07, Dmitry Osipenko wrote:
>
> The Core domain is a parent of PMC power domains, hence PMC domains
> should be set up as a sub-domains of the parent (Core) domain if
> "power-domains" phandle presents in a device-tree node of PMC domain.
>
> This
gh the Broadcom SoCs pull requests for
> v5.12, thanks!
Apologize for the delay!
Acked-by: Ulf Hansson
Kind regards
Uffe
On Mon, 14 Dec 2020 at 19:08, Rafał Miłecki wrote:
>
> From: Rafał Miłecki
>
> Broadcom's PMB is power controller used for disabling and enabling SoC
> devices.
>
> Signed-off-by: Rafał Miłecki
Apologize for the delay!
Acked-by: Ulf Hansson
Kind regards
Uffe
> -
+ Lina
On Wed, 6 Jan 2021 at 00:05, Bjorn Andersson wrote:
>
> On Tue 05 Jan 12:10 PST 2021, Danny Lin wrote:
>
> > This commit adds support for deep idling of the entire unified DynamIQ
> > CPU cluster on sm8150. In this idle state, the LLCC (Last-Level Cache
> > Controller) is powered off and
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