Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

On 01/19/2017 06:10 AM, Stephen Boyd wrote: On 01/18, Bjorn Andersson wrote: On Tue 17 Jan 22:54 PST 2017, Vivek Gautam wrote: On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote: On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: [..] + reset-names = "phy"

Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

On 01/19/2017 06:10 AM, Stephen Boyd wrote: On 01/18, Bjorn Andersson wrote: On Tue 17 Jan 22:54 PST 2017, Vivek Gautam wrote: On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote: On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: [..] + reset-names = "phy"

Re: [PATCH v4 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Kishon, On 01/16/2017 02:15 PM, Kishon Vijay Abraham I wrote: Hi, On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam

Re: [PATCH v4 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Kishon, On 01/16/2017 02:15 PM, Kishon Vijay Abraham I wrote: Hi, On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam

Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

Hi Kishon, On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote: Hi, On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same

Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

Hi Kishon, On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote: Hi, On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote: Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same

Re: [PATCH v4 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On 01/11/2017 04:50 AM, Andy Gross wrote: On Tue, Jan 10, 2017 at 04:21:59PM +0530, Vivek Gautam wrote: Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller

Re: [PATCH v4 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On 01/11/2017 04:50 AM, Andy Gross wrote: On Tue, Jan 10, 2017 at 04:21:59PM +0530, Vivek Gautam wrote: Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller

Re: [PATCH] usb: dwc3-exynos fix unspecified suspend clk error handling

e so extra > calls are not a problem. No extra checks means less code. > > Also the current code seems to be more in line with the rest > of the kernel. What functionality is missing without the suspend clock? Would it make sense to change the info. message to include what it means. At the mo

Re: [PATCH] usb: dwc3-exynos fix unspecified suspend clk error handling

e so extra > calls are not a problem. No extra checks means less code. > > Also the current code seems to be more in line with the rest > of the kernel. What functionality is missing without the suspend clock? Would it make sense to change the info. message to include what it means. At the mom

[PATCH v4 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Tested-by: Srinivas Kandagatla <sriniva

[PATCH v4 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller. Signed-off-by: Vivek Gautam Tested-by: Srinivas Kandagatla --- Changes since v3: - Renamed 'struct

[PATCH v4 1/4] dt-bindings: phy: Add support for QUSB2 phy

Qualcomm chipsets have QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller. Adding dt binding information for the same. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Acked-by: Rob Herring <r...@kernel.org> --- Changes since v3: - Added 'Acked-

[PATCH v4 0/4] phy: USB and PCIe phy drivers for Qcom chipsets

://lkml.org/lkml/2016/11/17/21 [3] https://lkml.org/lkml/2016/12/19/18 [4] http://www.spinics.net/lists/linux-arm-msm/msg25483.html [5] https://lkml.org/lkml/2016/11/17/339 Vivek Gautam (4): dt-bindings: phy: Add support for QUSB2 phy phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips dt

[PATCH v4 1/4] dt-bindings: phy: Add support for QUSB2 phy

Qualcomm chipsets have QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller. Adding dt binding information for the same. Signed-off-by: Vivek Gautam Acked-by: Rob Herring --- Changes since v3: - Added 'Acked-by' from Rob. - Removed 'reset-names' and 'nvmem-cell

[PATCH v4 0/4] phy: USB and PCIe phy drivers for Qcom chipsets

://lkml.org/lkml/2016/11/17/21 [3] https://lkml.org/lkml/2016/12/19/18 [4] http://www.spinics.net/lists/linux-arm-msm/msg25483.html [5] https://lkml.org/lkml/2016/11/17/339 Vivek Gautam (4): dt-bindings: phy: Add support for QUSB2 phy phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips dt

[PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Acked-by: Rob Herring <r...@kernel.org> --- Changes since v3: -

[PATCH v4 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Reviewed-by: Stephen Boyd <sb...@codeaurora.org> --- Changes since v3: - Added 'Revie

[PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy

Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same. Signed-off-by: Vivek Gautam Acked-by: Rob Herring --- Changes since v3: - Added #clock-cells = <1>, indicating that phy is a

[PATCH v4 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam Reviewed-by: Stephen Boyd --- Changes since v3: - Added 'Reviewed-by' from Stephen. - Fixed debug message

[PATCH v2 2/2] nvmem: core: Allow getting nvmem cell with a NULL cell id

;sb...@codeaurora.org> Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Reviewed-by: Stephen Boyd <sb...@codeaurora.org> --- Based on torvald's master branch. This patch supersedes the earlier posted series [1] that added support to get nvmem cell by index. We don't need that patch-seri

[PATCH v2 1/2] nvmem: core: Correct a bunch of function documentations

Correct the documentation for arguments to a number of functions. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Based on torvald's master branch. Changes since v1: - Removed unnecessary whitespaces. drivers/nvmem/core.c | 30 -- 1 file chang

[PATCH v2 2/2] nvmem: core: Allow getting nvmem cell with a NULL cell id

-by: Vivek Gautam Reviewed-by: Stephen Boyd --- Based on torvald's master branch. This patch supersedes the earlier posted series [1] that added support to get nvmem cell by index. We don't need that patch-series. Changes since v1: - Fixed the typo s/acoompanying/accompanying. - Added 'Reviewed

[PATCH v2 1/2] nvmem: core: Correct a bunch of function documentations

Correct the documentation for arguments to a number of functions. Signed-off-by: Vivek Gautam --- Based on torvald's master branch. Changes since v1: - Removed unnecessary whitespaces. drivers/nvmem/core.c | 30 -- 1 file changed, 16 insertions(+), 14 deletions

Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On 01/04/2017 06:04 PM, Jaehoon Chung wrote: This patch supports to use Generic Phy framework for Exynos PCIe phy. When Exynos that supported the pcie want to use the PCIe, it needs to control the phy resgister. But it should be more complex to control in their own PCIe device

Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On 01/04/2017 06:04 PM, Jaehoon Chung wrote: This patch supports to use Generic Phy framework for Exynos PCIe phy. When Exynos that supported the pcie want to use the PCIe, it needs to control the phy resgister. But it should be more complex to control in their own PCIe device

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

On 2017-01-07 02:47, Bjorn Andersson wrote: On Fri 06 Jan 01:47 PST 2017, Vivek Gautam wrote: > > +static int qcom_qmp_phy_com_init(struct qcom_qmp_phy *qphy) > > +{ > > + const struct qmp_phy_cfg *cfg = qphy->cfg; > > + void __iomem *serdes = qphy

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

On 2017-01-07 02:47, Bjorn Andersson wrote: On Fri 06 Jan 01:47 PST 2017, Vivek Gautam wrote: > > +static int qcom_qmp_phy_com_init(struct qcom_qmp_phy *qphy) > > +{ > > + const struct qmp_phy_cfg *cfg = qphy->cfg; > > + void __iomem *serdes = qphy

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On 01/06/2017 12:48 PM, Bjorn Andersson wrote: On Tue 20 Dec 09:03 PST 2016, Vivek Gautam wrote: diff --git a/drivers/phy/phy-qcom-qmp.c b/drivers/phy/phy-qcom-qmp.c [..] +static int qcom_qmp_phy_poweron(struct phy *phy) [..] + +err3: Rather than naming your labels errX, it's

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On 01/06/2017 12:48 PM, Bjorn Andersson wrote: On Tue 20 Dec 09:03 PST 2016, Vivek Gautam wrote: diff --git a/drivers/phy/phy-qcom-qmp.c b/drivers/phy/phy-qcom-qmp.c [..] +static int qcom_qmp_phy_poweron(struct phy *phy) [..] + +err3: Rather than naming your labels errX, it's

Re: [PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

Hi, On 01/06/2017 04:09 AM, Stephen Boyd wrote: On 01/05, Vivek Gautam wrote: On 01/05/2017 07:50 PM, Andy Gross wrote: On Thu, Jan 05, 2017 at 02:25:25PM +0530, Vivek Gautam wrote: Assign num_parents as 0 while registering fixed rate clocks in _qcom_cc_register_board_clk(), to make sure

Re: [PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

Hi, On 01/06/2017 04:09 AM, Stephen Boyd wrote: On 01/05, Vivek Gautam wrote: On 01/05/2017 07:50 PM, Andy Gross wrote: On Thu, Jan 05, 2017 at 02:25:25PM +0530, Vivek Gautam wrote: Assign num_parents as 0 while registering fixed rate clocks in _qcom_cc_register_board_clk(), to make sure

Re: [PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

On 01/05/2017 07:50 PM, Andy Gross wrote: On Thu, Jan 05, 2017 at 02:25:25PM +0530, Vivek Gautam wrote: Assign num_parents as 0 while registering fixed rate clocks in _qcom_cc_register_board_clk(), to make sure the clk framework doesn't dereference parent. Fixes: ee15faffef11 ("clk:

Re: [PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

On 01/05/2017 07:50 PM, Andy Gross wrote: On Thu, Jan 05, 2017 at 02:25:25PM +0530, Vivek Gautam wrote: Assign num_parents as 0 while registering fixed rate clocks in _qcom_cc_register_board_clk(), to make sure the clk framework doesn't dereference parent. Fixes: ee15faffef11 ("clk:

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

On 01/05/2017 03:10 PM, Srinivas Kandagatla wrote: On 05/01/17 05:34, Vivek Gautam wrote: Hi Srinivas, On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd <sb...@codeaurora.org> wrote: On 12/19, Vivek Gautam wrote: nvmem_cell_read() API fills in the argument 'len' with the number of byte

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

On 01/05/2017 03:10 PM, Srinivas Kandagatla wrote: On 05/01/17 05:34, Vivek Gautam wrote: Hi Srinivas, On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd wrote: On 12/19, Vivek Gautam wrote: nvmem_cell_read() API fills in the argument 'len' with the number of bytes read from the cell. Many

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On Wed, Jan 4, 2017 at 12:54 AM, Bjorn Andersson <bjorn.anders...@linaro.org> wrote: > On Wed 28 Dec 23:39 PST 2016, Vivek Gautam wrote: > >> >> + * >> >> + */ >> >> +static int phy_pipe_clk_register(struct qcom_qmp_phy *qphy, int id)

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On Wed, Jan 4, 2017 at 12:54 AM, Bjorn Andersson wrote: > On Wed 28 Dec 23:39 PST 2016, Vivek Gautam wrote: > >> >> + * >> >> + */ >> >> +static int phy_pipe_clk_register(struct qcom_qmp_phy *qphy, int id) >> >> +{ >> &

[PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

..@linaro.org> Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Based on 'clk-next'. Build tested. drivers/clk/qcom/common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c index cfab7b400381..df004ead1bef 100644

[PATCH] clk: qcom: Fix a possible NULL pointer dereferencing

Assign num_parents as 0 while registering fixed rate clocks in _qcom_cc_register_board_clk(), to make sure the clk framework doesn't dereference parent. Fixes: ee15faffef11 ("clk: qcom: common: Add API to register board clocks backwards compatibly") Cc: Georgi Djakov Signed-off

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

Hi Srinivas, On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/19, Vivek Gautam wrote: >> nvmem_cell_read() API fills in the argument 'len' with >> the number of bytes read from the cell. Many users don't >> care about this length va

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

Hi Srinivas, On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd wrote: > On 12/19, Vivek Gautam wrote: >> nvmem_cell_read() API fills in the argument 'len' with >> the number of bytes read from the cell. Many users don't >> care about this length value. So allow users to p

Re: [PATCH v2] nvmem: qfprom: Allow single byte accesses for read/write

On Wed, Jan 4, 2017 at 7:37 PM, Srinivas Kandagatla wrote: > Thanks for the Patch, > > I will queue this up!! Thanks Srinivas. [snip] -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

Re: [PATCH v2] nvmem: qfprom: Allow single byte accesses for read/write

On Wed, Jan 4, 2017 at 7:37 PM, Srinivas Kandagatla wrote: > Thanks for the Patch, > > I will queue this up!! Thanks Srinivas. [snip] -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi Stephen, On Thu, Dec 29, 2016 at 4:46 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/20, Vivek Gautam wrote: >> Qualcomm SOCs have QMP phy controller that provides support >> to a number of controller, viz. PCIe, UFS, and USB. >> Add a new driver, bas

Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi Stephen, On Thu, Dec 29, 2016 at 4:46 AM, Stephen Boyd wrote: > On 12/20, Vivek Gautam wrote: >> Qualcomm SOCs have QMP phy controller that provides support >> to a number of controller, viz. PCIe, UFS, and USB. >> Add a new driver, based on generic phy framework, for t

Re: [PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Stephen, On Thu, Dec 29, 2016 at 12:27 PM, Vivek Gautam <vivek.gau...@codeaurora.org> wrote: > On Thu, Dec 29, 2016 at 4:31 AM, Stephen Boyd <sb...@codeaurora.org> wrote: >> On 12/20, Vivek Gautam wrote: >>> PHY transceiver driver for QUSB2 phy controll

Re: [PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Stephen, On Thu, Dec 29, 2016 at 12:27 PM, Vivek Gautam wrote: > On Thu, Dec 29, 2016 at 4:31 AM, Stephen Boyd wrote: >> On 12/20, Vivek Gautam wrote: >>> PHY transceiver driver for QUSB2 phy controller that provides >>> HighSpeed functionality for DWC3 control

Re: [PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

On Thu, Dec 29, 2016 at 4:31 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/20, Vivek Gautam wrote: >> PHY transceiver driver for QUSB2 phy controller that provides >> HighSpeed functionality for DWC3 controller present on >> Qualcomm chipsets. >> >>

Re: [PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

On Thu, Dec 29, 2016 at 4:31 AM, Stephen Boyd wrote: > On 12/20, Vivek Gautam wrote: >> PHY transceiver driver for QUSB2 phy controller that provides >> HighSpeed functionality for DWC3 controller present on >> Qualcomm chipsets. >> >> Signed-off-by: Vi

Re: [PATCH v3 3/4] dt-bindings: phy: Add support for QMP phy

On Thu, Dec 29, 2016 at 4:34 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/20, Vivek Gautam wrote: >> + >> +Example: >> + pcie_phy: phy@34000 { >> + compatible = "qcom,msm8996-qmp-pcie-phy"; >> + reg = <0x034

Re: [PATCH v3 3/4] dt-bindings: phy: Add support for QMP phy

On Thu, Dec 29, 2016 at 4:34 AM, Stephen Boyd wrote: > On 12/20, Vivek Gautam wrote: >> + >> +Example: >> + pcie_phy: phy@34000 { >> + compatible = "qcom,msm8996-qmp-pcie-phy"; >> + reg = <0x034000 0x

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

On Wed, Dec 28, 2016 at 3:05 PM, Jaehoon Chung <jh80.ch...@samsung.com> wrote: > Hi Vivek, > > On 12/28/2016 05:58 PM, Vivek Gautam wrote: >> Hi Jaehoon, >> >> On Wed, Dec 28, 2016 at 8:19 AM, Jaehoon Chung <jh80.ch...@samsung.com> >> wrote: >&g

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

On Wed, Dec 28, 2016 at 3:05 PM, Jaehoon Chung wrote: > Hi Vivek, > > On 12/28/2016 05:58 PM, Vivek Gautam wrote: >> Hi Jaehoon, >> >> On Wed, Dec 28, 2016 at 8:19 AM, Jaehoon Chung >> wrote: >>> Hi Vivek, >>> >>>

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On Wed, Dec 28, 2016 at 8:19 AM, Jaehoon Chung <jh80.ch...@samsung.com> wrote: > Hi Vivek, > > On 12/27/2016 02:53 PM, Vivek Gautam wrote: >> Hi Jaehoon, >> >> >> On Mon, Dec 26, 2016 at 10:50 AM, Jaehoon Chung <jh80.ch...@samsung.com> >

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On Wed, Dec 28, 2016 at 8:19 AM, Jaehoon Chung wrote: > Hi Vivek, > > On 12/27/2016 02:53 PM, Vivek Gautam wrote: >> Hi Jaehoon, >> >> >> On Mon, Dec 26, 2016 at 10:50 AM, Jaehoon Chung >> wrote: >>> This patch supports to use Gen

[PATCH] thermal: mtk_thermal: Staticise a number of data variables

' was not declared. Should it be static? Make these variables as static to fix these warnings. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Based on Torvald's master branch. Build tested. drivers/thermal/mtk_thermal.c | 16 1 file changed, 8 insertions(+), 8 deletions(-)

[PATCH] thermal: mtk_thermal: Staticise a number of data variables

' was not declared. Should it be static? Make these variables as static to fix these warnings. Signed-off-by: Vivek Gautam --- Based on Torvald's master branch. Build tested. drivers/thermal/mtk_thermal.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/thermal

Re: [PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

On Wed, Dec 28, 2016 at 6:43 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/22/2016 08:52 PM, Vivek Gautam wrote: >> >>>> + >>>> +Optional properties: >>>> + - nvmem-cells: a list of phandles to nvmem cells that contain fused >>>&

Re: [PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

On Wed, Dec 28, 2016 at 6:43 AM, Stephen Boyd wrote: > On 12/22/2016 08:52 PM, Vivek Gautam wrote: >> >>>> + >>>> +Optional properties: >>>> + - nvmem-cells: a list of phandles to nvmem cells that contain fused >>>> +

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On Mon, Dec 26, 2016 at 10:50 AM, Jaehoon Chung wrote: > This patch supports to use Generic Phy framework for Exynos PCIe phy. > When Exynos that supported the pcie want to use the PCIe, > it needs to control the phy resgister. > But it should be more complex

Re: [RFC PATCH 1/6] phy: exynos-pcie: Add support for Exynos PCIe phy

Hi Jaehoon, On Mon, Dec 26, 2016 at 10:50 AM, Jaehoon Chung wrote: > This patch supports to use Generic Phy framework for Exynos PCIe phy. > When Exynos that supported the pcie want to use the PCIe, > it needs to control the phy resgister. > But it should be more complex to control in their own

[PATCH RESEND 0/2] nvmem: core: Support to get nvmem cell using index

from thermal sensors. [1] 1a339a14b1f2 arm64: setup: introduce kaslr_offset() [2] https://lkml.org/lkml/2016/12/22/217 Vivek Gautam (2): nvmem: core: Allow getting cell by index in phandle nvmem: core: Add a resource managed API to get cell by index drivers/nvmem/core.c | 68

[PATCH RESEND 0/2] nvmem: core: Support to get nvmem cell using index

from thermal sensors. [1] 1a339a14b1f2 arm64: setup: introduce kaslr_offset() [2] https://lkml.org/lkml/2016/12/22/217 Vivek Gautam (2): nvmem: core: Allow getting cell by index in phandle nvmem: core: Add a resource managed API to get cell by index drivers/nvmem/core.c | 68

[PATCH 0/2] nvmem: core: Support to get nvmem cell using index

branch. - Tested with next-20161223 tag and a revert to patch [1], to fix build issue on arm64, on db410c target. Able to read temperatures from thermal sensors. Vivek Gautam (2): nvmem: core: Allow getting cell by index in phandle nvmem: core: Add a resource managed API to get cell

[PATCH 0/2] nvmem: core: Support to get nvmem cell using index

branch. - Tested with next-20161223 tag and a revert to patch [1], to fix build issue on arm64, on db410c target. Able to read temperatures from thermal sensors. Vivek Gautam (2): nvmem: core: Allow getting cell by index in phandle nvmem: core: Add a resource managed API to get cell

[PATCH 1/2] nvmem: core: Allow getting cell by index in phandle

Fork out a method to get nvmem cell using cell index in the phandle for the cell. This helps in getting the lone cell given in the phandle, without mentioning the cell name in device tree. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- drivers/nvmem/core.c

[PATCH 1/2] nvmem: core: Allow getting cell by index in phandle

Fork out a method to get nvmem cell using cell index in the phandle for the cell. This helps in getting the lone cell given in the phandle, without mentioning the cell name in device tree. Signed-off-by: Vivek Gautam --- drivers/nvmem/core.c | 35

[PATCH 2/2] nvmem: core: Add a resource managed API to get cell by index

Adding a resource managed method to obtain nvmem cell using cell index. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- drivers/nvmem/core.c | 33 + include/linux/nvmem-consumer.h | 8 2 files changed, 41 insertions(+) diff

[PATCH 2/2] nvmem: core: Add a resource managed API to get cell by index

Adding a resource managed method to obtain nvmem cell using cell index. Signed-off-by: Vivek Gautam --- drivers/nvmem/core.c | 33 + include/linux/nvmem-consumer.h | 8 2 files changed, 41 insertions(+) diff --git a/drivers/nvmem/core.c b

Re: [PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

Hi Rob, On Fri, Dec 23, 2016 at 2:46 AM, Rob Herring <r...@kernel.org> wrote: > On Tue, Dec 20, 2016 at 10:33:48PM +0530, Vivek Gautam wrote: >> Qualcomm chipsets have QUSB2 phy controller that provides >> HighSpeed functionality for DWC3 controller. >> Adding dt bindi

Re: [PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

Hi Rob, On Fri, Dec 23, 2016 at 2:46 AM, Rob Herring wrote: > On Tue, Dec 20, 2016 at 10:33:48PM +0530, Vivek Gautam wrote: >> Qualcomm chipsets have QUSB2 phy controller that provides >> HighSpeed functionality for DWC3 controller. >> Adding dt binding information for t

Re: [PATCH v5 0/6] inherit dma configuration from parent dev

ration > usb: ehci: fsl: use bus->sysdev for DMA configuration > usb: xhci: use bus->sysdev for DMA configuration > usb: dwc3: use bus->sysdev for DMA configuration > usb: dwc3: Do not set dma coherent mask Tested patches 1, 4 & 5 on db820c platform with requi

Re: [PATCH v5 0/6] inherit dma configuration from parent dev

usb: ehci: fsl: use bus->sysdev for DMA configuration > usb: xhci: use bus->sysdev for DMA configuration > usb: dwc3: use bus->sysdev for DMA configuration > usb: dwc3: Do not set dma coherent mask Tested patches 1, 4 & 5 on db820c platform with required set of patches [1] for phy.

[PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

Qualcomm chipsets have QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller. Adding dt binding information for the same. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Changes since v2: - Removed binding for "ref_clk_src" since

[PATCH v3 1/4] dt-bindings: phy: Add support for QUSB2 phy

Qualcomm chipsets have QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller. Adding dt binding information for the same. Signed-off-by: Vivek Gautam --- Changes since v2: - Removed binding for "ref_clk_src" since we don't request this clock in

[PATCH v3 0/4] phy: USB and PCIe phy drivers for Qcom chipsets

-qcomlt [2] https://lkml.org/lkml/2016/11/17/21 [3] https://lkml.org/lkml/2016/12/19/18 Vivek Gautam (4): dt-bindings: phy: Add support for QUSB2 phy phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips dt-bindings: phy: Add support for QMP phy phy: qcom-qmp: new qmp phy driver for qcom

[PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Changes since v2: - Removed selecting 'RESET_CONTROLLER' config. - Added error ha

[PATCH v3 0/4] phy: USB and PCIe phy drivers for Qcom chipsets

-qcomlt [2] https://lkml.org/lkml/2016/11/17/21 [3] https://lkml.org/lkml/2016/12/19/18 Vivek Gautam (4): dt-bindings: phy: Add support for QUSB2 phy phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips dt-bindings: phy: Add support for QMP phy phy: qcom-qmp: new qmp phy driver for qcom

[PATCH v3 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

PHY transceiver driver for QUSB2 phy controller that provides HighSpeed functionality for DWC3 controller present on Qualcomm chipsets. Signed-off-by: Vivek Gautam --- Changes since v2: - Removed selecting 'RESET_CONTROLLER' config. - Added error handling for clk_prepare_enable paths

[PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Tested-by: Srinivas Kandagatla <sriniva

[PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Qualcomm SOCs have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Add a new driver, based on generic phy framework, for this phy controller. Signed-off-by: Vivek Gautam Tested-by: Srinivas Kandagatla --- Changes since v2: - Removed selecting

[PATCH v3 3/4] dt-bindings: phy: Add support for QMP phy

Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> Acked-by: Rob Herring <r...@kernel.org> --- Changes since v2

[PATCH v3 3/4] dt-bindings: phy: Add support for QMP phy

Qualcomm chipsets have QMP phy controller that provides support to a number of controller, viz. PCIe, UFS, and USB. Adding dt binding information for the same. Signed-off-by: Vivek Gautam Acked-by: Rob Herring --- Changes since v2: - Removed binding for "ref_clk_src" since we don

Re: [PATCH -next] phy: rockchip-typec: fix non static symbol warnings

On Wed, Sep 21, 2016 at 8:35 PM, Wei Yongjun wrote: > From: Wei Yongjun > > Fixes the following sparse warnings: > > drivers/phy/phy-rockchip-typec.c:295:16: warning: > symbol 'usb3_pll_cfg' was not declared. Should it be static? >

Re: [PATCH -next] phy: rockchip-typec: fix non static symbol warnings

On Wed, Sep 21, 2016 at 8:35 PM, Wei Yongjun wrote: > From: Wei Yongjun > > Fixes the following sparse warnings: > > drivers/phy/phy-rockchip-typec.c:295:16: warning: > symbol 'usb3_pll_cfg' was not declared. Should it be static? > drivers/phy/phy-rockchip-typec.c:312:16: warning: > symbol

Re: [PATCH v2 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On Tue, Nov 29, 2016 at 6:05 AM, Stephen Boyd <sb...@codeaurora.org> wrote: Thanks for a thorough review. Please find my comments inline. > On 11/22, Vivek Gautam wrote: >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig >> index f1dcec1..8970d9e 100644 >>

Re: [PATCH v2 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi, On Tue, Nov 29, 2016 at 6:05 AM, Stephen Boyd wrote: Thanks for a thorough review. Please find my comments inline. > On 11/22, Vivek Gautam wrote: >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig >> index f1dcec1..8970d9e 100644 >> --- a/drivers/phy/Kconfig

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/19, Vivek Gautam wrote: >> nvmem_cell_read() API fills in the argument 'len' with >> the number of bytes read from the cell. Many users don't >> care about this length value. So al

Re: [PATCH] nvmem: core: Allow ignoring length when reading a cell

On Tue, Dec 20, 2016 at 3:17 AM, Stephen Boyd wrote: > On 12/19, Vivek Gautam wrote: >> nvmem_cell_read() API fills in the argument 'len' with >> the number of bytes read from the cell. Many users don't >> care about this length value. So allow users to pass a >> NUL

[PATCH] nvmem: core: Allow ignoring length when reading a cell

nvmem_cell_read() API fills in the argument 'len' with the number of bytes read from the cell. Many users don't care about this length value. So allow users to pass a NULL pointer to this len field. Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org> --- Based on torvalds's master

[PATCH] nvmem: core: Allow ignoring length when reading a cell

nvmem_cell_read() API fills in the argument 'len' with the number of bytes read from the cell. Many users don't care about this length value. So allow users to pass a NULL pointer to this len field. Signed-off-by: Vivek Gautam --- Based on torvalds's master branch. - Tested against 'next

Re: [PATCH v2 3/4] dt-bindings: phy: Add support for QMP phy

Hi Stephen, On Tue, Nov 29, 2016 at 4:49 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 11/22, Vivek Gautam wrote: >> Qualcomm chipsets have QMP phy controller that provides >> support to a number of controller, viz. PCIe, UFS, and USB. >> Adding dt bindi

Re: [PATCH v2 3/4] dt-bindings: phy: Add support for QMP phy

Hi Stephen, On Tue, Nov 29, 2016 at 4:49 AM, Stephen Boyd wrote: > On 11/22, Vivek Gautam wrote: >> Qualcomm chipsets have QMP phy controller that provides >> support to a number of controller, viz. PCIe, UFS, and USB. >> Adding dt binding information for the same. >&

Re: [PATCH v2 3/4] dt-bindings: phy: Add support for QMP phy

Hi Stephen, On Tue, Nov 29, 2016 at 4:25 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 11/22, Vivek Gautam wrote: >> diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt >> b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt >> new file m

Re: [PATCH v2 3/4] dt-bindings: phy: Add support for QMP phy

Hi Stephen, On Tue, Nov 29, 2016 at 4:25 AM, Stephen Boyd wrote: > On 11/22, Vivek Gautam wrote: >> diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt >> b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt >> new file mode 100644 >> index 00

Re: [PATCH v2 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

On Sat, Dec 3, 2016 at 12:17 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 12/01/2016 12:42 AM, Vivek Gautam wrote: >> On Tue, Nov 29, 2016 at 4:44 AM, Stephen Boyd <sb...@codeaurora.org> wrote: >>> On 11/22, Vivek Gautam wrote: >>>> + } >>

Re: [PATCH v2 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

On Sat, Dec 3, 2016 at 12:17 AM, Stephen Boyd wrote: > On 12/01/2016 12:42 AM, Vivek Gautam wrote: >> On Tue, Nov 29, 2016 at 4:44 AM, Stephen Boyd wrote: >>> On 11/22, Vivek Gautam wrote: >>>> + } >>>> + >>>> + /* >>>&g

Re: [PATCH v2 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Stephen, On Tue, Nov 29, 2016 at 4:44 AM, Stephen Boyd <sb...@codeaurora.org> wrote: > On 11/22, Vivek Gautam wrote: >> >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig >> index e8eb7f2..f1dcec1 100644 >> --- a/drivers/phy/Kconfig >> +++ b/d

Re: [PATCH v2 2/4] phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips

Hi Stephen, On Tue, Nov 29, 2016 at 4:44 AM, Stephen Boyd wrote: > On 11/22, Vivek Gautam wrote: >> >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig >> index e8eb7f2..f1dcec1 100644 >> --- a/drivers/phy/Kconfig >> +++ b/drivers/phy/Kconfig >> @@ -

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