iers.txt' as it doesn't
make any sense now that the dependency barriers have been removed.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
.../RCU/Design/Requirements/Requirements.rst | 2 +-
Documentation/memory-barriers.txt | 156 +-
2 fi
In preparation for patching the internals of READ_ONCE() itself, replace
its usage on the alternatives patching patch with a volatile variable
instead.
Signed-off-by: Will Deacon
---
arch/arm64/kernel/alternative.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch
compiler is capable of breaking the dependencies.
Since LDAPR is not available on all CPUs, add a cpufeature to detect it at
runtime and allow the instruction to be used with alternative code
patching.
Signed-off-by: Will Deacon
---
arch/arm64/Kconfig | 3 +++
arch/arm64/include/asm
-off-by: Will Deacon
---
arch/arm64/include/asm/alternative-macros.h | 276
arch/arm64/include/asm/alternative.h| 267 +--
arch/arm64/include/asm/insn.h | 3 +-
3 files changed, 279 insertions(+), 267 deletions(-)
create mode 100644 arch
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian
Blue, drop the inclusion of in 'asm-generic/rwonce.h'.
This requires fixups to some architecture vdso headers which were
previously relying on 'asm/barrier.h' coming in via 'linux/compi
required.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/asm-generic/rwonce.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/asm-generic/rwonce.h b/include/asm-generic/rwonce.h
index 92cc2f223cb3..f9dfa88fc04d 100644
--- a/include/asm-generic/rwonce.h
+++ b/include
There are no remaining users of [smp_]read_barrier_depends(), so
remove it from the generic implementation of 'barrier.h'.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/asm-generic/barrier.h | 17 -
1 file changed, 17 deletions(-)
diff --git a/i
mentation/barriers/kokr: Remove references to
[smp_]read_barrier_depends()
Will Deacon (18):
tools: bpf: Use local copy of headers including uapi/linux/filter.h
compiler.h: Split {READ,WRITE}_ONCE definitions out into rwonce.h
asm/rwonce: Allow __READ_ONCE to be overridden by the architect
from the generic implementation.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
arch/alpha/include/asm/barrier.h | 59 +++-
arch/alpha/include/asm/rwonce.h | 35 +++
2 files changed, 40 insertions(+), 54 deletions(-)
create mode 100644 arch
In preparation for allowing architectures to define their own
implementation of the READ_ONCE() macro, move the generic
{READ,WRITE}_ONCE() definitions out of the unwieldy 'linux/compiler.h'
file and into a new 'rwonce.h' header under 'asm-generic'.
Acked-by: Paul E.
those in the main source tree.
Cc: Masahiro Yamada
Acked-by: Alexei Starovoitov
Suggested-by: Daniel Borkmann
Reported-by: Xiao Yang
Signed-off-by: Will Deacon
---
tools/bpf/Makefile| 3 +-
tools/include/uapi/linux/filter.h | 90 +++
2 file
RATUM_1414080 handling
Suzuki K Poulose (1):
arm64: Documentation: Fix broken table in generated HTML
Wei Li (1):
arm64: kgdb: Fix single-step exception handling oops
Will Deacon (2):
KVM: arm64: Fix definition of PAGE_HYP_DEVICE
arm64: entry: Tidy up block comments and
On Fri, Jul 10, 2020 at 04:15:32PM +0200, Joerg Roedel wrote:
> On Fri, Jul 10, 2020 at 02:05:27PM +0100, Will Deacon wrote:
> > Ah, I'd already got this queued for 5.9:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu
Hi Joerg,
On Fri, Jul 10, 2020 at 02:58:32PM +0200, Joerg Roedel wrote:
> On Fri, Jul 03, 2020 at 05:25:48PM +0100, Will Deacon wrote:
> > The IOMMU_SYS_CACHE_ONLY flag was never exposed via the DMA API and
> > has no in-tree users. Remove it.
> >
> > Cc: Rob
On Sat, Jul 04, 2020 at 09:56:50PM -0700, Kees Cook wrote:
> On Sat, Jul 04, 2020 at 01:33:56PM +0100, Will Deacon wrote:
> > On Fri, Jul 03, 2020 at 08:52:05AM -0700, Kees Cook wrote:
> > > On Fri, Jul 03, 2020 at 04:44:27PM +0100, Will Deacon wrote:
> > > > On F
patches I was writing.
Tested-by: Will Deacon
Will
On Thu, Jul 09, 2020 at 08:28:45PM -0700, John Stultz wrote:
> On Thu, Jul 2, 2020 at 7:18 AM Will Deacon wrote:
> > On Thu, Jun 25, 2020 at 12:10:39AM +, John Stultz wrote:
> > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > > index b510f6
patch submission <../process/submitting-patches>`
> +(even if you don't have a patch yet): describe the problem and impact, list
> +reproduction steps, and follow it with a proposed fix, all in plain text.
> +
Acked-by: Will Deacon
Hopefully "plain text" implies unencrypted as much as it does "not html".
Will
On Wed, 8 Jul 2020 22:13:40 -0700, Florian Fainelli wrote:
> When the erratum_1463225 array was introduced a sentinel at the end was
> missing thus causing a KASAN: global-out-of-bounds in
> is_affected_midr_range_list on arm64 error.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: Add mi
On Tue, 9 Jun 2020 15:40:18 -0400, Jonathan Marek wrote:
> Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
>
> Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
> few changes. Notably, the HDK865 dts has regulator config changed a bit based
> on downstream
On Thu, Jul 09, 2020 at 05:23:45PM +0900, sanggil2@samsung.com wrote:
> From: Sanggil Kim
>
> We have a solution to protect kernel code section(autually from _text to
> _etext) by not MMU. In order to do this, we have to know the addresses
> of _text and _etext at runtime.
Interesting! Can y
On Thu, Jul 09, 2020 at 07:18:01AM +, 彭浩(Richard) wrote:
> On Thu, 9 Jul 2020 at 09:50, 彭浩(Richard) wrote:
> >> >Apparently, you are hitting a R_AARCH64_JUMP26 or R_AARCH64_CALL26
> >> >relocation that operates on a b or bl instruction that is more than
> >> >128 megabytes away from its target
Doug,
On Mon, Jul 06, 2020 at 02:37:05PM -0700, Doug Anderson wrote:
> On Tue, Jun 30, 2020 at 12:22 AM Will Deacon wrote:
> > On Mon, Jun 29, 2020 at 02:20:11PM -0700, Doug Anderson wrote:
> > > On Sat, May 16, 2020 at 1:20 AM liwei (GF) wrote:
> > > > On 2020/
On Sun, 10 May 2020 05:41:55 +0800, Wei Li wrote:
> This patch set is to fix several issues of single-step debugging
> in kgdb/kdb on arm64.
>
> It seems that these issues have been shelved a very long time,
> but i still hope to solve them, as the single-step debugging
> is an useful feature.
>
On Mon, 6 Jul 2020 17:37:58 +0100, Marc Zyngier wrote:
> The relatively recent introduction of the compat vdso on arm64 has
> overlooked its interactions with some of the interesting errata
> workarounds, such as ARM64_ERRATUM_1418040 (and its older 1188873
> incarnation).
>
> This erratum require
[+Ard]
On Tue, Jul 07, 2020 at 07:46:08AM -0400, Peng Hao wrote:
> If plt_max_entries is 0, a warning is triggered.
> WARNING: CPU: 200 PID: 3000 at arch/arm64/kernel/module-plts.c:97
> module_emit_plt_entry+0xa4/0x150
Which kernel are you seeing this with? There is a PLT-related change in
for-n
On Wed, Jul 08, 2020 at 02:54:32AM +0800, Yang Shi wrote:
> Recently we found regression when running will_it_scale/page_fault3 test
> on ARM64. Over 70% down for the multi processes cases and over 20% down
> for the multi threads cases. It turns out the regression is caused by commit
> 89b15332a
On Mon, Jul 06, 2020 at 05:00:23PM +0100, Dave Martin wrote:
> On Thu, Jul 02, 2020 at 08:23:02AM +0100, Will Deacon wrote:
> > On Wed, Jul 01, 2020 at 06:07:25PM +0100, Dave P Martin wrote:
> > > Also, can you illustrate code that can only be unsafe with Clang LTO?
>
On Mon, Jul 06, 2020 at 05:08:20PM +0100, Dave Martin wrote:
> On Tue, Jun 30, 2020 at 06:37:34PM +0100, Will Deacon wrote:
> > diff --git a/arch/arm64/include/asm/rwonce.h
> > b/arch/arm64/include/asm/rwonce.h
> > new file mode 100644
> > index ..515
On Sat, Jul 04, 2020 at 09:56:50PM -0700, Kees Cook wrote:
> On Sat, Jul 04, 2020 at 01:33:56PM +0100, Will Deacon wrote:
> > On Fri, Jul 03, 2020 at 08:52:05AM -0700, Kees Cook wrote:
> > > On Fri, Jul 03, 2020 at 04:44:27PM +0100, Will Deacon wrote:
> > > > On F
[Adding Bjorn, Jordan and John because I really don't want a bunch of
different ways to tell the driver that the firmware is screwing things up]
On Sat, Jul 04, 2020 at 02:28:09PM +0200, Konrad Dybcio wrote:
> This adds the downstream property required to support
> SMMUs on SDM630 and other platfo
Hi Linus,
Please pull these arm64 fixes for -rc4. Nothing Earth-shattering, really;
some CPU errata workarounds (one day they'll get it right, ha!) and a
fix for a boot failure with very large kernel images where the alternative
patching gets confused when patching relative branches using veneers.
On Fri, Jul 03, 2020 at 04:27:37PM -0400, Keno Fischer wrote:
> > > Now, if we have a seccomp filter that simply does
> > > SECCOMP_RET_TRACE, and a ptracer that simply
> > > does PTRACE_CONT
> >
> > Ok, so this means that we're _skipping_ the system call, right?
>
> If the system call were positi
On Fri, Jul 03, 2020 at 08:52:05AM -0700, Kees Cook wrote:
> On Fri, Jul 03, 2020 at 04:44:27PM +0100, Will Deacon wrote:
> > On Fri, Jul 03, 2020 at 08:17:19AM -0700, Kees Cook wrote:
> > > On Fri, Jul 03, 2020 at 09:39:14AM +0100, Will Deacon wrote:
> > > >
On Fri, Jul 03, 2020 at 05:47:24PM -0700, Saravana Kannan wrote:
> On Thu, Jul 2, 2020 at 8:30 AM Ard Biesheuvel wrote:
> > On Tue, 23 Jun 2020 at 03:27, Saravana Kannan wrote:
> > > diff --git a/arch/arm64/kernel/module-plts.c
> > > b/arch/arm64/kernel/module-plts.c
> > > index 65b08a74aec6..0c
On Tue, 30 Jun 2020 23:30:52 +0530, Sai Prakash Ranjan wrote:
> This series adds the Kryo4xx gold/big and silver/LITTLE CPU cores to
> the errata list which are applicable to them based on the revisions
> of the Cortex CPU cores on which they are based on.
>
> Patch 1 adds the MIDR value for Kryo4
The IOMMU_SYS_CACHE_ONLY flag was never exposed via the DMA API and
has no in-tree users. Remove it.
Cc: Robin Murphy
Cc: "Isaac J. Manjarres"
Cc: Joerg Roedel
Cc: Christoph Hellwig
Cc: Sai Prakash Ranjan
Cc: Rob Clark
Signed-off-by: Will Deacon
---
As discussed in [1], sounds
On Fri, Jul 03, 2020 at 08:17:19AM -0700, Kees Cook wrote:
> On Fri, Jul 03, 2020 at 09:39:14AM +0100, Will Deacon wrote:
> > diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c
> > index 5f5b868292f5..a13661f44818 100644
> > --- a/arch/arm64/kernel/sys
On Fri, Jul 03, 2020 at 08:23:07PM +0530, Sai Prakash Ranjan wrote:
> On 2020-07-03 19:07, Will Deacon wrote:
> > On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote:
> > > diff --git a/drivers/gpu/drm/msm/msm_iommu.c
> > > b/drivers/gpu/drm/msm/msm_iommu
On Fri, Jul 03, 2020 at 08:04:04PM +0530, Sai Prakash Ranjan wrote:
> On 2020-07-03 19:25, Will Deacon wrote:
> > On Tue, Jun 30, 2020 at 11:30:55PM +0530, Sai Prakash Ranjan wrote:
> > > KRYO4XX silver/LITTLE CPU cores with revision r1p0 are affected by
> > > erratum
On Tue, Jun 30, 2020 at 11:30:55PM +0530, Sai Prakash Ranjan wrote:
> KRYO4XX silver/LITTLE CPU cores with revision r1p0 are affected by
> erratum 1530923 and 1024718, so add them to the respective list.
> The variant and revision bits are implementation defined and are
> different from the their C
On Fri, Jun 19, 2020 at 01:29:59AM -0700, Stephen Boyd wrote:
> Quoting Alexandru Elisei (2020-06-18 03:51:31)
> > The armv8pmu_{start,stop}() functions are called from the irq handler, so
> > we're
> > safe from preemption in this case. They are also called via
> > pmu->pmu_{enable,disable} callb
On Wed, Jun 24, 2020 at 02:08:30PM +0100, Robin Murphy wrote:
> On 2020-06-24 13:50, Will Deacon wrote:
> > On Wed, Jun 24, 2020 at 12:48:14PM +0100, Robin Murphy wrote:
> > > On 2020-04-08 17:49, Robin Murphy wrote:
> > > > IRQF_SHARED is dangerous, since it allow
On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote:
> diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> index f455c597f76d..bd1d58229cc2 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
> @@ -218,6 +218,9 @@ static
On Fri, Jun 19, 2020 at 06:44:37PM +0800, Jisheng Zhang wrote:
> The Cortex-A55/A75/A76 use some implementation defined perf events.
> Add the support.
>
> Jisheng Zhang (3):
> arm64: perf: add support for Cortex-A55
> arm64: perf: add support for Cortex-A75
> arm64: perf: add support for Co
On Tue, Jun 09, 2020 at 03:40:18PM -0400, Jonathan Marek wrote:
> Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
>
> Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
> few changes. Notably, the HDK865 dts has regulator config changed a bit based
> on down
On Tue, Jun 16, 2020 at 01:52:32PM -0700, John Stultz wrote:
> On Tue, Jun 16, 2020 at 12:55 AM Marc Zyngier wrote:
> > On 2020-06-16 07:13, John Stultz wrote:
> > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > > index b510f67dfa49..714893535dd2 100644
> > > --- a/drivers/iommu/K
Hi Keno,
On Fri, May 22, 2020 at 09:01:01PM -0400, Keno Fischer wrote:
> I'm seeing the following while porting a ptracer from
> x86_64 to arm64 (cc'ing arm64 folks, but in this case
> x86_64 is the odd one out, I think other archs would
> be consistent with arm64).
>
> Consider userspace code li
Hi Joel,
On Thu, Jul 02, 2020 at 10:43:55AM -0400, Joel Fernandes wrote:
> On Tue, Jun 30, 2020 at 1:38 PM Will Deacon wrote:
> > diff --git a/arch/alpha/include/asm/barrier.h
> > b/arch/alpha/include/asm/barrier.h
> > index 92ec486a4f9e..2ecd068d91d1 100644
> > -
On Thu, Jun 25, 2020 at 12:10:39AM +, John Stultz wrote:
> diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> index b510f67dfa49..714893535dd2 100644
> --- a/drivers/iommu/Kconfig
> +++ b/drivers/iommu/Kconfig
> @@ -381,6 +381,7 @@ config SPAPR_TCE_IOMMU
> config ARM_SMMU
> tri
On Thu, Jul 02, 2020 at 12:08:41PM +0200, Arnd Bergmann wrote:
> On Thu, Jul 2, 2020 at 11:48 AM Will Deacon wrote:
> > On Thu, Jul 02, 2020 at 10:32:39AM +0100, Mark Rutland wrote:
> > > On Tue, Jun 30, 2020 at 06:37:20PM +0100, Will Deacon wrote:
> > > > -#define
On Thu, Jul 02, 2020 at 08:47:05PM +1000, Nicholas Piggin wrote:
> Excerpts from Will Deacon's message of July 2, 2020 8:35 pm:
> > On Thu, Jul 02, 2020 at 08:25:43PM +1000, Nicholas Piggin wrote:
> >> Excerpts from Will Deacon's message of July 2, 2020 6:02 pm:
> >> > On Thu, Jul 02, 2020 at 05:48
On Thu, Jul 02, 2020 at 08:25:43PM +1000, Nicholas Piggin wrote:
> Excerpts from Will Deacon's message of July 2, 2020 6:02 pm:
> > On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote:
> >> diff --git a/arch/powerpc/include/asm/qspinlock.h
> >> b/arch/powerpc/include/asm/qspinlock.h
>
On Thu, Jul 02, 2020 at 10:32:39AM +0100, Mark Rutland wrote:
> On Tue, Jun 30, 2020 at 06:37:20PM +0100, Will Deacon wrote:
> > -#define read_barrier_depends() __asm__ __volatile__("mb": : :"memory")
>
On Thu, Jul 02, 2020 at 05:48:36PM +1000, Nicholas Piggin wrote:
> diff --git a/arch/powerpc/include/asm/qspinlock.h
> b/arch/powerpc/include/asm/qspinlock.h
> new file mode 100644
> index ..f84da77b6bb7
> --- /dev/null
> +++ b/arch/powerpc/include/asm/qspinlock.h
> @@ -0,0 +1,20 @@
>
ture of memory chunks
> belonging to both ZONE_DMA and ZONE_DMA32.
How does this interact with this ongoing series:
https://lore.kernel.org/r/20200628083458.40066-1-chenzho...@huawei.com
(patch 4, in particular)
> Fixes: bff3b04460a8 ("arm64: mm: reserve CMA and crashkernel in ZON
On Wed, Jul 01, 2020 at 06:07:25PM +0100, Dave P Martin wrote:
> On Tue, Jun 30, 2020 at 06:37:34PM +0100, Will Deacon wrote:
> > When building with LTO, there is an increased risk of the compiler
> > converting an address dependency headed by a READ_ONCE() invocation
> > into
On Tue, Jun 30, 2020 at 03:57:54PM -0700, Sami Tolvanen wrote:
> On Tue, Jun 30, 2020 at 12:47 PM Marco Elver wrote:
> >
> > On Tue, 30 Jun 2020 at 19:39, Will Deacon wrote:
> > >
> > > When building with LTO, there is an increased risk of the compiler
>
On Tue, Jun 30, 2020 at 09:47:30PM +0200, Marco Elver wrote:
> On Tue, 30 Jun 2020 at 19:39, Will Deacon wrote:
> >
> > When building with LTO, there is an increased risk of the compiler
> > converting an address dependency headed by a READ_ONCE() invocation
> > in
On Tue, Jun 30, 2020 at 09:25:03PM +0200, Arnd Bergmann wrote:
> On Tue, Jun 30, 2020 at 7:39 PM Will Deacon wrote:
> > +#define __READ_ONCE(x) \
> > +({ \
> &g
Hi Arnd,
On Tue, Jun 30, 2020 at 09:11:32PM +0200, Arnd Bergmann wrote:
> On Tue, Jun 30, 2020 at 7:37 PM Will Deacon wrote:
> >
> > In preparation for allowing architectures to define their own
> > implementation of the READ_ONCE() macro, move the generic
> > {READ,WR
On Wed, Jul 01, 2020 at 11:41:17AM +0200, Marco Elver wrote:
> On Tue, 30 Jun 2020 at 22:30, Paul E. McKenney wrote:
> > On Tue, Jun 30, 2020 at 10:12:43PM +0200, Peter Zijlstra wrote:
> > > On Tue, Jun 30, 2020 at 09:19:31PM +0200, Marco Elver wrote:
> > > > So, we are probably better off untangl
age_fault().
>
> CC: Catalin Marinas
> CC: Will Deacon
> CC: linux-arm-ker...@lists.infradead.org
> Signed-off-by: Peter Xu
> ---
> arch/arm64/mm/fault.c | 29 ++---
> 1 file changed, 6 insertions(+), 23 deletions(-)
>
> diff --git a/arch/a
compiler is capable of breaking the dependencies.
Since LDAPR is not available on all CPUs, add a cpufeature to detect it at
runtime and allow the instruction to be used with alternative code
patching.
Signed-off-by: Will Deacon
---
arch/arm64/Kconfig | 3 +++
arch/arm64/include/asm
READ_ONCE() definition with one that provides acquire semantics when
building with LTO.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/rwonce.h | 63 +++
arch/arm64/kernel/vdso/Makefile | 2 +-
arch/arm64/kernel/vdso32/Makefile | 2 +-
3 files changed, 65
-off-by: Will Deacon
---
arch/arm64/include/asm/alternative-macros.h | 276
arch/arm64/include/asm/alternative.h| 267 +--
arch/arm64/include/asm/insn.h | 3 +-
3 files changed, 279 insertions(+), 267 deletions(-)
create mode 100644 arch
In preparation for patching the internals of READ_ONCE() itself, replace
its usage on the alternatives patching patch with a volatile variable
instead.
Signed-off-by: Will Deacon
---
arch/arm64/kernel/alternative.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch
There are no remaining users of [smp_]read_barrier_depends(), so
remove it from the generic implementation of 'barrier.h'.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/asm-generic/barrier.h | 17 -
1 file changed, 17 deletions(-)
diff --git a/i
x-gnu-ld:./arch/arm64/kernel/vmlinux.lds:1: syntax error
In preparation for an arm64-private asm/rwonce.h implementation, which
will end up pulling assembly macros into linux/compiler.h, reduce the
number of headers we include directly and transitively in vmlinux.lds.S
Signed-off-by: Will D
ed to do any writing to
| indirect->addr after avail idx is increased
Remove the redundant barrier invocation.
Suggested-by: Jason Wang
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
drivers/vhost/vhost.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/vhost/vhost
smp_read_barrier_depends() doesn't exist any more, so reword the two
comments that mention it to refer to "dependency ordering" instead.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/linux/percpu-refcount.h | 2 +-
include/linux/ptr_ring.h| 2 +-
2 f
iers.txt' as it doesn't
make any sense now that the dependency barriers have been removed.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
.../RCU/Design/Requirements/Requirements.rst | 2 +-
Documentation/memory-barriers.txt | 156 +-
2 fi
In preparation for removing smp_read_barrier_depends() altogether,
move the Alpha code over to using smp_rmb() and smp_mb() directly.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
arch/alpha/include/asm/atomic.h | 16
arch/alpha/include/asm/pgtable.h | 10
those in the main source tree.
Cc: Alexei Starovoitov
Cc: Masahiro Yamada
Suggested-by: Daniel Borkmann
Reported-by: Xiao Yang
Signed-off-by: Will Deacon
---
tools/bpf/Makefile| 3 +-
tools/include/uapi/linux/filter.h | 90 +++
2 files changed
From: SeongJae Park
This commit translates commit ("Documentation/barriers: Remove references to
[smp_]read_barrier_depends()") into Korean.
Signed-off-by: SeongJae Park
Reviewed-by: Yunjae Lee
Signed-off-by: Will Deacon
---
.../translations/ko_KR/memory-barriers.tx
The [smp_]read_barrier_depends() macros no longer exist, so we don't
need to deal with them in the checkpatch script.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
scripts/checkpatch.pl | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/sc
c: linux-al...@vger.kernel.org
Cc: virtualizat...@lists.linux-foundation.org
Cc: kernel-t...@android.com
--->8
SeongJae Park (1):
Documentation/barriers/kokr: Remove references to
[smp_]read_barrier_depends()
Will Deacon (17):
tools: bpf: Use local copy of headers including uapi/linux/filt
smp_read_barrier_depends() has gone the way of mmiowb() and so many
esoteric memory barriers before it. Drop the two mentions of this
deceased barrier from the LKMM informal explanation document.
Acked-by: Alan Stern
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
.../Documentation
Rather then relying on the core code to use smp_read_barrier_depends()
as part of the READ_ONCE() definition, instead override __READ_ONCE()
in the Alpha code so that it is treated the same way as
smp_load_acquire().
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
arch/alpha/include
Alpha overrides __READ_ONCE() directly, so there's no need to use
smp_read_barrier_depends() in the core code. This also means that
__READ_ONCE() can be relied upon to provide dependency ordering.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/asm-generic/rwonce.h
required.
Acked-by: Paul E. McKenney
Signed-off-by: Will Deacon
---
include/asm-generic/rwonce.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/asm-generic/rwonce.h b/include/asm-generic/rwonce.h
index 92cc2f223cb3..f9dfa88fc04d 100644
--- a/include/asm-generic/rwonce.h
+++ b/include
In preparation for allowing architectures to define their own
implementation of the READ_ONCE() macro, move the generic
{READ,WRITE}_ONCE() definitions out of the unwieldy 'linux/compiler.h'
file and into a new 'rwonce.h' header under 'asm-generic'.
Acked-by: Paul E.
On Mon, Jun 29, 2020 at 02:20:11PM -0700, Doug Anderson wrote:
> On Sat, May 16, 2020 at 1:20 AM liwei (GF) wrote:
> > On 2020/5/14 8:34, Doug Anderson wrote:
> > > On Sat, May 9, 2020 at 6:49 AM Wei Li wrote:
> > >>
> > >> This patch set is to fix several issues of single-step debugging
> > >> i
{3, 4}XX silver CPU cores to kpti safelist
arm64: Add KRYO{3,4}XX silver CPU cores to SSB safelist
Will Deacon (5):
arm64: vdso: Disable dwarf unwinding through the sigreturn trampoline
arm64: compat: Allow 32-bit vdso and sigpage to co-exist
arm64: compat: Always use
On Thu, 25 Jun 2020 16:01:23 +0530, Sai Prakash Ranjan wrote:
> QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on
> Cortex-A55 and are SSB safe, hence add them to SSB
> safelist -> arm64_ssb_cpus[].
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: Add KRYO{3,4}XX silver CPU cores to SS
,6 @@
> #define __ASM_DEVICE_H
>
> struct dev_archdata {
> -#ifdef CONFIG_IOMMU_API
> - void *iommu; /* private IOMMU data */
> -#endif
> };
Acked-by: Will Deacon
Thanks, Joerg.
Will
On Thu, Jun 25, 2020 at 09:16:03AM +0100, Marc Zyngier wrote:
> On 2020-06-25 06:03, kernel test robot wrote:
> > Hi David,
> >
> > Thank you for the patch! Perhaps something to improve:
> >
> > [auto build test WARNING on linus/master]
> > [also build test WARNING on v5.8-rc2 next-20200624]
> >
On Wed, Jun 24, 2020 at 02:30:14PM -0700, Sami Tolvanen wrote:
> On Wed, Jun 24, 2020 at 11:15:40PM +0200, Peter Zijlstra wrote:
> > On Wed, Jun 24, 2020 at 01:31:38PM -0700, Sami Tolvanen wrote:
> > > This patch series adds support for building x86_64 and arm64 kernels
> > > with Clang's Link Time
On Wed, Jun 24, 2020 at 07:53:20PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 23, 2020 at 10:02:57AM +0100, Will Deacon wrote:
> > On Tue, Jun 23, 2020 at 10:36:51AM +0200, Peter Zijlstra wrote:
> > > In order to use in irqflags.h, we need to make sure
> > > asm/percpu.
On Wed, Jun 24, 2020 at 02:48:55PM +0100, Dave Martin wrote:
> On Wed, Jun 24, 2020 at 12:26:47PM +0100, Will Deacon wrote:
> > On Wed, Jun 24, 2020 at 12:46:32PM +0200, Ard Biesheuvel wrote:
> > > On Wed, 24 Jun 2020 at 12:44, Will Deacon wrote:
> > > > For the
On Wed, 24 Jun 2020 18:04:06 +0530, Sai Prakash Ranjan wrote:
> QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55
> and are meltdown safe, hence add them to kpti_safe_list[].
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: kpti: Add KRYO{3, 4}XX silver CPU cores to kpti saf
On Wed, 24 Jun 2020 15:33:25 +0300, Alexander Popov wrote:
> This is the v2 of the patch series with various improvements of the
> stackleak gcc plugin.
>
> The first three patches disable unneeded gcc plugin instrumentation for
> some files.
>
> The fourth patch is the main improvement. It elimi
On Tue, Jun 23, 2020 at 11:46:37AM -0700, Florian Fainelli wrote:
> On 6/11/20 9:42 PM, Florian Fainelli wrote:
> > From: Will Deacon
> >
> > commit 679db70801da9fda91d26caf13bf5b5ccc74e8e8 upstream
> >
> > Some CPUs can speculate past an ERET instruction and po
On Wed, Jun 24, 2020 at 12:48:14PM +0100, Robin Murphy wrote:
> On 2020-04-08 17:49, Robin Murphy wrote:
> > IRQF_SHARED is dangerous, since it allows other agents to retarget the
> > IRQ's affinity without migrating PMU contexts to match, breaking the way
> > in which perf manages mutual exclusion
On Wed, Jun 24, 2020 at 03:33:28PM +0300, Alexander Popov wrote:
> Don't use gcc plugins for building arch/arm64/kernel/vdso/vgettimeofday.c
> to avoid unneeded instrumentation.
>
> Signed-off-by: Alexander Popov
> ---
> arch/arm64/kernel/vdso/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1
On Wed, Jun 24, 2020 at 12:57:23PM +0100, Jon Hunter wrote:
> On 24/06/2020 11:55, Will Deacon wrote:
> > diff --git a/arch/arm64/kernel/vdso/Makefile
> > b/arch/arm64/kernel/vdso/Makefile
> > index 1e5a940532da..97d3d3632093 100644
> > --- a/arch/arm64/kernel/vdso/Ma
On Wed, Jun 24, 2020 at 12:46:32PM +0200, Ard Biesheuvel wrote:
> On Wed, 24 Jun 2020 at 12:44, Will Deacon wrote:
> > On Tue, Jun 23, 2020 at 09:44:11PM -0700, Kees Cook wrote:
> > > On Tue, Jun 23, 2020 at 08:31:42PM -0700, 'Fangrui Song' via Clang Built
> >
On Wed, Jun 24, 2020 at 05:08:56PM +0800, Shaokun Zhang wrote:
> +Will Deacon,
>
> Hi Will,
>
> There's a build failure on arm64:
>
> CALLscripts/atomic/check-atomics.sh
> CALLscripts/checksyscalls.sh
> LD arch/arm64/kernel/vdso/vdso.so.dbg
&g
On Tue, Jun 23, 2020 at 09:44:11PM -0700, Kees Cook wrote:
> On Tue, Jun 23, 2020 at 08:31:42PM -0700, 'Fangrui Song' via Clang Built
> Linux wrote:
> > On 2020-06-23, Kees Cook wrote:
> > > In preparation for adding --orphan-handling=warn to more architectures,
> > > make sure unwanted sections d
section name for clang
- Avoid generating .eh_frame
- Ensure all sections are accounted for in linker script and warn on orphans
That way it's a bit easier to manage, we can revert/backport bits later if
necessary and you get more patches in the kernel ;)
You can also add my Ack on all the patches:
Acked-by: Will Deacon
Will
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