Re: [PATCH 1/1] MIPS: Ensure ELF appended dtb is relocated

Hi Paul, On Fri, 2019-03-08 at 19:02 +, Paul Burton wrote: > Hi Yasha, > > On Fri, Mar 08, 2019 at 02:58:51PM +0200, Yasha Cherikovsky wrote: > > This fixes booting with the combination of CONFIG_RELOCATABLE=y > > and CONFIG_MIPS_ELF_APPENDED_DTB=y. > > > &g

[PATCH 0/1] Fix the combination of CONFIG_RELOCATABLE=y and CONFIG_MIPS_ELF_APPENDED_DTB=y

Hi, I sent this patch almost 5 months ago but received no response [1]. I'm sending it again now, on top of v5.0. Full details are in the commit message. Please review. Thanks, Yasha [1] https://lkml.org/lkml/2018/10/20/175 Cc: linux-kernel@vger.kernel.org Yasha Cherikovsky (1):

[PATCH 1/1] MIPS: Ensure ELF appended dtb is relocated

, so it must be relocated together with everything else. Fixes: 069fd766271d ("MIPS: Reserve space for relocation table") Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/m

[PATCH] MIPS: Ensure ELF appended dtb is relocated

, so it must be relocated together with everything else. Fixes: 069fd766271d ("MIPS: Reserve space for relocation table") Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/m

Re: [RFC v2 2/7] dt-binding: interrupt-controller: Document RTL8186 SoC DT bindings

On Fri, 2018-10-12 at 15:13 -0500, Rob Herring wrote: > On Mon, Oct 01, 2018 at 01:29:47PM +0300, Yasha Cherikovsky wrote: > > This patch adds device tree binding doc for the > > Realtek RTL8186 SoC interrupt controller. > > > > Signed-off-by: Yasha Cherikovsky > &

[RFC v2 3/7] irqchip/rtl8186: Add RTL8186 interrupt controller driver

The Realtek RTL8186 SoC is a MIPS based SoC used in some home routers [1][2]. This adds a driver to handle the interrupt controller on this SoC. [1] https://www.linux-mips.org/wiki/Realtek_SOC#Realtek_RTL8186 [2] https://wikidevi.com/wiki/Realtek_RTL8186 Signed-off-by: Yasha Cherikovsky Cc

[RFC v2 2/7] dt-binding: interrupt-controller: Document RTL8186 SoC DT bindings

This patch adds device tree binding doc for the Realtek RTL8186 SoC interrupt controller. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet

[RFC v2 6/7] dt-binding: mips: Document Realtek SoC DT bindings

This patch adds device tree binding doc for Realtek MIPS SoCs. It includes a compatible string for the Realtek RTL8186 SoC. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet...@vger.kernel.org Cc: linux-m...@linux

[RFC v2 1/7] MIPS: Add support for the Lexra LX5280 CPU

handler (more details in a code comment) [1] https://www.linux-mips.org/wiki/Lexra [2] https://wikidevi.com/wiki/Lexra_LX5280 Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/mips/Kconfig

[RFC v2 0/7] MIPS: Lexra LX5280 CPU + Realtek RTL8186 SoC support

/commits/lx5280-porting-master [3] https://github.com/yashac3/buildroot/commits/lx5280_master [4] https://www.linux-mips.org/archives/linux-mips/2018-09/msg00769.html [5] https://www.linux-mips.org/archives/linux-mips/2018-09/msg00775.html Cc: linux-kernel@vger.kernel.org Yasha Cherikovsky (7

[RFC v2 7/7] MIPS: Add Realtek RTL8186 SoC support

[2] https://wikidevi.com/wiki/Realtek_RTL8186 Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: Rob Herring Cc: Mark Rutland Cc: linux-m...@linux-mips.org Cc: devicet...@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- arch/mips/Kbuild.platforms

[RFC v2 4/7] dt-binding: timer: Document RTL8186 SoC DT bindings

This patch adds device tree binding doc for the Realtek RTL8186 SoC timer controller. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet...@vger.kernel.org Cc: linux-m

[RFC v2 5/7] clocksource/drivers/rtl8186: Add RTL8186 timer driver

. [1] https://www.linux-mips.org/wiki/Realtek_SOC#Realtek_RTL8186 [2] https://wikidevi.com/wiki/Realtek_RTL8186 Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Rob Herring Cc: Mark Rutland Cc: linux-m...@linux

Re: [RFC 5/5] MIPS: Add Realtek RTL8186 SoC support

On Mon, 2018-10-01 at 10:15 +0100, Marc Zyngier wrote: > On 01/10/18 09:48, Yasha Cherikovsky wrote: > > Hi Marc, > > > > On Mon, 2018-10-01 at 09:19 +0100, Marc Zyngier wrote: > > > Hi Yasha, > > > > > > On 30/09/18 15:15, Yasha Cherikovsky wrote:

Re: [RFC 5/5] MIPS: Add Realtek RTL8186 SoC support

Hi Marc, On Mon, 2018-10-01 at 09:19 +0100, Marc Zyngier wrote: > Hi Yasha, > > On 30/09/18 15:15, Yasha Cherikovsky wrote: > > The Realtek RTL8186 SoC is a MIPS based SoC > > used in some home routers [1][2]. > > > > The hardware includes Lexra LX5280

[RFC 1/5] MIPS: Add support for the Lexra LX5280 CPU

handler (more details in a code comment) [1] https://www.linux-mips.org/wiki/Lexra [2] https://wikidevi.com/wiki/Lexra_LX5280 Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/mips/Kconfig

[RFC 5/5] MIPS: Add Realtek RTL8186 SoC support

tree files for the RTL8186 SoC and Edimax BR-6204Wg router [1] https://www.linux-mips.org/wiki/Realtek_SOC#Realtek_RTL8186 [2] https://wikidevi.com/wiki/Realtek_RTL8186 Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: Thomas Gleixner Cc: Jason Cooper Cc

[RFC 0/5] MIPS: Lexra LX5280 CPU + Realtek RTL8186 SoC support

ano Cc: Rob Herring Cc: Mark Rutland Cc: linux-m...@linux-mips.org Cc: devicet...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Yasha Cherikovsky (5): MIPS: Add support for the Lexra LX5280 CPU dt-binding: timer: Document RTL8186 SoC DT bindings dt-binding: interrupt-controller: Documen

[RFC 2/5] dt-binding: timer: Document RTL8186 SoC DT bindings

This patch adds device tree binding doc for the Realtek RTL8186 SoC timer controller. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet...@vger.kernel.org Cc: linux-m

[RFC 3/5] dt-binding: interrupt-controller: Document RTL8186 SoC DT bindings

This patch adds device tree binding doc for the Realtek RTL8186 SoC interrupt controller. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet

[RFC 4/5] dt-binding: mips: Document Realtek SoC DT bindings

This patch adds device tree binding doc for Realtek MIPS SoCs. It includes a compatible string for the Realtek RTL8186 SoC. Signed-off-by: Yasha Cherikovsky Cc: Rob Herring Cc: Mark Rutland Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: devicet...@vger.kernel.org Cc: linux-m...@linux

Re: [PATCH v2 1/1] MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions

Hi Paul, On Wed, 2018-09-26 at 22:18 +, Paul Burton wrote: > Hi Yasha, > > On Wed, Sep 26, 2018 at 02:16:15PM +0300, Yasha Cherikovsky wrote: > > MIPSR6 CPUs do not support unaligned load/store instructions > > (LWL, LWR, SWL, SWR and LDL, LDR, SDL, SDR for 64bit). &

Re: [PATCH 0/4] MIPS: Simplify ELF appended dtb handling

Hi Paul, On Wed, 2018-09-26 at 20:36 +, Paul Burton wrote: > Hi Yasha, > > On Tue, Sep 25, 2018 at 09:08:21PM +0300, Yasha Cherikovsky wrote: > > Hi, > > > > This patch series simplifies and cleans up the handling of > > CONFIG_MIPS_ELF_APPENDED_DTB in the

[PATCH v2 1/1] MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions

ructions). This commit should not affect any existing CPU, and is required for future Lexra CPU support, that misses these instructions too. Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arc

[PATCH v2 0/1] MIPS: Lexra CPU support, prerequisite patch

_RTL8186 [2] https://www.linux-mips.org/wiki/Lexra [3] https://github.com/yashac3/linux-rtl8186/commits/rtl8186-porting-for-upstream-4.18 Cc: linux-kernel@vger.kernel.org Yasha Cherikovsky (1): MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions arch/mips/Kconf

Re: [PATCH 1/1] MIPS: Add new Kconfig variable to avoid unaligned access instructions

On Tue, 2018-09-25 at 19:57 +, Paul Burton wrote: > Hi Yasha, > > On Tue, Sep 25, 2018 at 10:30:52PM +0300, Yasha Cherikovsky wrote: > > On Tue, 2018-09-25 at 17:45 +, Paul Burton wrote: > > > How about we: > > > > > > - Add a Kconfig opt

Re: [PATCH 1/1] MIPS: Add new Kconfig variable to avoid unaligned access instructions

Hi Paul, On Tue, 2018-09-25 at 17:45 +, Paul Burton wrote: > Hi Yasha, > > On Thu, Sep 20, 2018 at 08:03:06PM +0300, Yasha Cherikovsky wrote: > > MIPSR6 doesn't support unaligned access instructions (lwl, lwr, > > swl, swr). > > The MIPS tree has s

[PATCH 4/4] MIPS: Octeon: Remove special handling of CONFIG_MIPS_ELF_APPENDED_DTB=y

The ELF appended dtb can be accessed now via 'fw_passed_dtb'. Since raw appended dtb is accessed via that variable too, this now effectively allows to boot with CONFIG_MIPS_RAW_APPENDED_DTB=y on Octeon. Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James

[PATCH 1/4] MIPS/head: Add comments after #endif and #else

It makes the code more readable, especially in the nested ifdefs. Signed-off-by: Yasha Cherikovsky Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/mips/kernel/head.S | 14 +++--- 1 file changed, 7 insertions

[PATCH 3/4] MIPS: BMIPS: Remove special handling of CONFIG_MIPS_ELF_APPENDED_DTB=y

The ELF appended dtb can be accessed now via 'fw_passed_dtb'. Signed-off-by: Yasha Cherikovsky Cc: Kevin Cernekee Cc: Florian Fainelli Cc: Ralf Baechle Cc: Paul Burton Cc: James Hogan Cc: linux-m...@linux-mips.org Cc: linux-kernel@vger.kernel.org --- arch/mips/bmips/s

[PATCH 2/4] MIPS/head: Store ELF appended dtb in a global variable too

s with MIPS_ELF_APPENDED_DTB=y. Under MIPS_ELF_APPENDED_DTB=y, the dtb is also located in the __appended_dtb section, so we just need to update the #ifdef. This will allow to access the dtb in a more uniform way. Fixes: 15f37e158892 ("MIPS: store the appended dtb address in a variable&quo

[PATCH 0/4] MIPS: Simplify ELF appended dtb handling

hes 3 and 4 depend on patch 2. The patches are on top of v4.18. The patches are also available at: https://github.com/yashac3/linux-rtl8186/commits/elf_appended_dtb_changes_on_4_18 Please review. Thanks, Yasha Cc: linux-kernel@vger.kernel.org Yasha Cherikovsky (4): MIPS/head: Add comments

[PATCH 1/1] MIPS: Add new Kconfig variable to avoid unaligned access instructions

d for future Lexra CPU support, that misses these instructions too. Signed-off-by: Yasha Cherikovsky --- arch/mips/Kconfig| 7 +-- arch/mips/kernel/unaligned.c | 24 arch/mips/lib/memcpy.S | 10 +- arch/mips/lib/memset.S | 12 ++

[PATCH 0/1] MIPS: Lexra CPU support, prerequisite patch

ux-rtl8186/commits/rtl8186-porting-for-upstream-4.18 Yasha Cherikovsky (1): MIPS: Add new Kconfig variable to avoid unaligned access instructions arch/mips/Kconfig| 7 +-- arch/mips/kernel/unaligned.c | 24 arch/mips/lib/memcpy.S | 10 +-