RE: [PATCH] drm/amdgpu/virt: don't dereference undefined 'module' struct

2017-11-03 Thread Yu, Xiangliang
Reviewed-By: Xiangliang Yu <xiangliang...@amd.com> Thanks! > -Original Message- > From: Arnd Bergmann [mailto:a...@arndb.de] > Sent: Thursday, November 02, 2017 7:26 PM > To: Deucher, Alexander <alexander.deuc...@amd.com>; Koenig, Christian > <christ

RE: [PATCH] drm/amdgpu/virt: don't dereference undefined 'module' struct

2017-11-03 Thread Yu, Xiangliang
Reviewed-By: Xiangliang Yu Thanks! > -Original Message- > From: Arnd Bergmann [mailto:a...@arndb.de] > Sent: Thursday, November 02, 2017 7:26 PM > To: Deucher, Alexander ; Koenig, Christian > > Cc: Arnd Bergmann ; David Airlie ; Liu, > Monk ; Yu, Xiangliang ;

RE: [PATCH] drm/amdgpu/virt: fix spelling mistake: "hypervior" -> "hypervisor"

2017-03-30 Thread Yu, Xiangliang
@@ static void xgpu_vi_mailbox_flr_work(struct > work_struct *work) > > r = xgpu_vi_poll_msg(adev, IDH_FLR_NOTIFICATION_CMPL); > if (r) > - DRM_ERROR("failed to get flr cmpl msg from hypervior.\n"); > + DRM_ERROR("failed to get flr cmpl msg from hypervisor.\n"); > Reviewed-by: Xiangliang Yu <xiangliang...@amd.com>

RE: [PATCH] drm/amdgpu/virt: fix spelling mistake: "hypervior" -> "hypervisor"

2017-03-30 Thread Yu, Xiangliang
> > From: Colin Ian King > > trivial fix to spelling mistake in DRM_ERROR error message > > Signed-off-by: Colin Ian King > --- > drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c >

RE: [Resend PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Xiangliang Yu > > > Signed-off-by: Xiangliang Yu > > Yes. > > > Reviewed-by: Jon Mason > > Maybe, but that's for Jon to decide. If he accepts it, he will add > signed-off-by, > but again, that's for Jon to decide. Jon also spend a lot of time to review the code, I think should

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Yu, Xiangliang [mailto:xiangliang...@amd.com] > > > > Signed-off-by: Jon Mason > > > > Signed-off-by: Allen Hubbe > > > > > > NO. > > > > Ok, I'll change it if you doesn't want to change it. > > Nah, just remember it

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Xiangliang Yu > > This adds support for AMD's PCI-Express Non-Transparent Bridge > > (NTB) device on the Zeppelin platform. The driver connnects to the > > standard NTB sub-system interface, with modification to add hooks for > > power management in a separate patch. The AMD NTB device

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> -Original Message- > From: Hubbe, Allen [mailto:allen.hu...@emc.com] > Sent: Thursday, January 21, 2016 11:54 AM > To: Yu, Xiangliang; jdma...@kudzu.us; dave.ji...@intel.com; linux- > ker...@vger.kernel.org; linux-...@googlegroups.com > Cc: SPG_Linux_Kernel > Subje

RE: [PATCH V4 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> > > There is some concept of "split bar" in this function, and I want to > > be sure to > > > understand it correctly. > > > > > > BAR0 - configuration? > > > BAR1 - 32bit memory window? i.e. "split" bar? > > > BAR2+3 - 64bit memory window? > > > BAR4+5 - 64bit memory window? > > > > Yes > >

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> -Original Message- > From: Hubbe, Allen [mailto:allen.hu...@emc.com] > Sent: Thursday, January 21, 2016 11:54 AM > To: Yu, Xiangliang; jdma...@kudzu.us; dave.ji...@intel.com; linux- > ker...@vger.kernel.org; linux-...@googlegroups.com > Cc: SPG_Linux_Kernel > Subje

RE: [PATCH V4 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> > > There is some concept of "split bar" in this function, and I want to > > be sure to > > > understand it correctly. > > > > > > BAR0 - configuration? > > > BAR1 - 32bit memory window? i.e. "split" bar? > > > BAR2+3 - 64bit memory window? > > > BAR4+5 - 64bit memory window? > > > > Yes > >

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Xiangliang Yu <xiangliang...@amd.com> > > This adds support for AMD's PCI-Express Non-Transparent Bridge > > (NTB) device on the Zeppelin platform. The driver connnects to the > > standard NTB sub-system interface, with modification to add hooks for > &g

RE: [PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Yu, Xiangliang [mailto:xiangliang...@amd.com] > > > > Signed-off-by: Jon Mason <jdma...@kudzu.us> > > > > Signed-off-by: Allen Hubbe <allen.hu...@emc.com> > > > > > > NO. > > > > Ok, I'll change it if you doesn't wa

RE: [Resend PATCH V5 1/1] NTB: Add support for AMD PCI-Express Non-Transparent Bridge

2016-01-20 Thread Yu, Xiangliang
> From: Xiangliang Yu <xiangliang...@amd.com> > > > Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> > > Yes. > > > Reviewed-by: Jon Mason <jdma...@kudzu.us> > > Maybe, but that's for Jon to decide. If he accepts it, he will add >

RE: [PATCH V2 0/3] Change notes of V2

2016-01-06 Thread Yu, Xiangliang
> From: Xiangliang Yu : > > Main changes in V2: > > 1. Fixed compiler warning; > > 2. Add marcro argument of ndev in NTB_READ_REG/NTB_WRITE_REG; 3. > Add > > notes for flush and wakeup interfaces; > > > > Xiangliang Yu (3): > > NTB: Add AMD PCI-Express NTB driver > > NTB: Add AMD NTB support

RE: [PATCH V2 1/3] NTB: Add AMD PCI-Express NTB driver

2016-01-06 Thread Yu, Xiangliang
> > > >> > +#define ndev_pdev(ndev) ((ndev)->ntb.pdev) #define > ndev_name(ndev) > >> > +pci_name(ndev_pdev(ndev)) #define ndev_dev(ndev) > >> > +(_pdev(ndev)->dev) #define ntb_ndev(ntb) container_of(ntb, > >> > +struct amd_ntb_dev, ntb) #define hb_ndev(work) container_of(work, > >> > +struct

RE: [PATCH V2 1/3] NTB: Add AMD PCI-Express NTB driver

2016-01-06 Thread Yu, Xiangliang
> > + > > +#definePCI_DEVICE_ID_AMD_NTB 0x145B > > This looks like a tab and not a space I'll update it. > > > +#define AMD_LINK_HB_TIMEOUTmsecs_to_jiffies(1000) > > +#define AMD_LINK_STATUS_OFFSET 0x68 > > +#define NTB_LIN_STA_ACTIVE_BIT 0x0002 > > +#define

RE: [PATCH V2 2/3] NTB: Add AMD NTB support in Kconfig and Makefile

2016-01-06 Thread Yu, Xiangliang
> > drivers/ntb/hw/Kconfig | 1 + > > drivers/ntb/hw/Makefile | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/drivers/ntb/hw/Kconfig b/drivers/ntb/hw/Kconfig index > > 4d5535c..0c5c2a6 100644 > > --- a/drivers/ntb/hw/Kconfig > > +++ b/drivers/ntb/hw/Kconfig > > @@ -1 +1,2 @@ > >

RE: [PATCH V2 2/3] NTB: Add AMD NTB support in Kconfig and Makefile

2016-01-06 Thread Yu, Xiangliang
> > drivers/ntb/hw/Kconfig | 1 + > > drivers/ntb/hw/Makefile | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/drivers/ntb/hw/Kconfig b/drivers/ntb/hw/Kconfig index > > 4d5535c..0c5c2a6 100644 > > --- a/drivers/ntb/hw/Kconfig > > +++ b/drivers/ntb/hw/Kconfig > > @@ -1 +1,2 @@ > >

RE: [PATCH V2 1/3] NTB: Add AMD PCI-Express NTB driver

2016-01-06 Thread Yu, Xiangliang
> > + > > +#definePCI_DEVICE_ID_AMD_NTB 0x145B > > This looks like a tab and not a space I'll update it. > > > +#define AMD_LINK_HB_TIMEOUTmsecs_to_jiffies(1000) > > +#define AMD_LINK_STATUS_OFFSET 0x68 > > +#define NTB_LIN_STA_ACTIVE_BIT 0x0002 > > +#define

RE: [PATCH V2 1/3] NTB: Add AMD PCI-Express NTB driver

2016-01-06 Thread Yu, Xiangliang
> > > >> > +#define ndev_pdev(ndev) ((ndev)->ntb.pdev) #define > ndev_name(ndev) > >> > +pci_name(ndev_pdev(ndev)) #define ndev_dev(ndev) > >> > +(_pdev(ndev)->dev) #define ntb_ndev(ntb) container_of(ntb, > >> > +struct amd_ntb_dev, ntb) #define hb_ndev(work) container_of(work, > >> > +struct

RE: [PATCH V2 0/3] Change notes of V2

2016-01-06 Thread Yu, Xiangliang
> From: Xiangliang Yu <xiangliang...@amd.com>: > > Main changes in V2: > > 1. Fixed compiler warning; > > 2. Add marcro argument of ndev in NTB_READ_REG/NTB_WRITE_REG; 3. > Add > > notes for flush and wakeup interfaces; > > > > Xiangliang Yu (3): >

RE: [PATCH 1/3] NTB: Add AMD PCI-Express NTB driver

2015-12-17 Thread Yu, Xiangliang
> From: Allen Hubbe [mailto:alle...@gmail.com] > Sent: Friday, December 18, 2015 12:46 AM > To: Yu, Xiangliang > Cc: jdma...@kudzu.us; dave.ji...@intel.com; linux-...@googlegroups.com; > linux-kernel@vger.kernel.org; SPG_Linux_Kernel > Subject: Re: [PATCH 1/3] NTB: Add AMD PCI-

RE: [PATCH 1/3] NTB: Add AMD PCI-Express NTB driver

2015-12-17 Thread Yu, Xiangliang
> From: Allen Hubbe [mailto:alle...@gmail.com] > Sent: Friday, December 18, 2015 12:46 AM > To: Yu, Xiangliang > Cc: jdma...@kudzu.us; dave.ji...@intel.com; linux-...@googlegroups.com; > linux-kernel@vger.kernel.org; SPG_Linux_Kernel > Subject: Re: [PATCH 1/3] NTB: Add AMD PCI-

RE: [PATCH v2] I2C: designware: fix IO timeout issue for AMD controller

2015-12-13 Thread Yu, Xiangliang
> -Original Message- > From: Wolfram Sang [mailto:w...@the-dreams.de] > Sent: Sunday, December 13, 2015 1:03 AM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > mika.westerb...@linux.intel.com; linux-...@vger.kernel

RE: [PATCH v2] I2C: designware: fix IO timeout issue for AMD controller

2015-12-13 Thread Yu, Xiangliang
> -Original Message- > From: Wolfram Sang [mailto:w...@the-dreams.de] > Sent: Sunday, December 13, 2015 1:03 AM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > mika.westerb...@linux.intel.com; linux-...@vger.kernel

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-06 Thread Yu, Xiangliang
> -Original Message- > From: Jarkko Nikula [mailto:jarkko.nik...@linux.intel.com] > Sent: Friday, November 06, 2015 5:00 PM > To: Yu, Xiangliang; Mika Westerberg > Cc: andriy.shevche...@linux.intel.com; w...@the-dreams.de; linux- > i...@vger.kernel.org; linux-kernel@vg

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-06 Thread Yu, Xiangliang
> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Friday, November 06, 2015 3:46 PM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > w...@the-dreams.de; linux-...@vger.kernel

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-06 Thread Yu, Xiangliang
> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Friday, November 06, 2015 3:46 PM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > w...@the-dreams.de; linux-...@vger.kernel

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-06 Thread Yu, Xiangliang
> -Original Message- > From: Jarkko Nikula [mailto:jarkko.nik...@linux.intel.com] > Sent: Friday, November 06, 2015 5:00 PM > To: Yu, Xiangliang; Mika Westerberg > Cc: andriy.shevche...@linux.intel.com; w...@the-dreams.de; linux- > i...@vger.kernel.org; linux-kernel@vg

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-05 Thread Yu, Xiangliang
> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Thursday, November 05, 2015 9:52 PM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > w...@the-dreams.de; linux-...@vger.kernel

RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller

2015-11-05 Thread Yu, Xiangliang
> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Thursday, November 05, 2015 9:52 PM > To: Yu, Xiangliang > Cc: andriy.shevche...@linux.intel.com; jarkko.nik...@linux.intel.com; > w...@the-dreams.de; linux-...@vger.kernel