From: Gabriel Fernandez
This patch-set enables the reset of STM32MP1.
It uses the reset simple driver by introducing the clear register offset
parameter.
STM32MP1 reset IP has a register to assert by writing '1' and another
register to de-assert by writing '1'.
The
From: Gabriel Fernandez
This patch-set enables the reset of STM32MP1.
It uses the reset simple driver by introducing the clear register offset
parameter.
STM32MP1 reset IP has a register to assert by writing '1' and another
register to de-assert by writing '1'.
The offset between this two
From: Gabriel Fernandez
This patch adds the reset binding entry for STM32MP1
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/reset/stm32mp1-resets.h | 108
1 file changed, 108 insertions(+)
create mode
From: Gabriel Fernandez
This patch adds the reset binding entry for STM32MP1
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/reset/stm32mp1-resets.h | 108
1 file changed, 108 insertions(+)
create mode 100644 include/dt-bindings/reset/stm32mp1-resets.h
From: Gabriel Fernandez
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK
hsi and sysclk are overwritten by gpioa and gpiob.
Signed-off-by: Gabriel Fernandez
Tested-by: Philippe Cornu
Reviewed-by: Rob
From: Gabriel Fernandez
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK
hsi and sysclk are overwritten by gpioa and gpiob.
Signed-off-by: Gabriel Fernandez
Tested-by: Philippe Cornu
Reviewed-by: Rob Herring
---
include/dt-bindings/clock/stm32fx-clock.h | 6 +++---
1 file
From: Gabriel Fernandez
This patch adds DSI clock for STM32F469 board
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32f4.c | 11 ++-
include/dt-bindings/clock/stm32fx-clock.h | 3 ++-
2 files changed, 12
From: Gabriel Fernandez
This patch adds DSI clock for STM32F469 board
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32f4.c | 11 ++-
include/dt-bindings/clock/stm32fx-clock.h | 3 ++-
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git
From: Gabriel Fernandez
This patch-set adds the dsi clock for stm32f469 board.
Gabriel Fernandez (2):
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
clk: stm32: Add DSI clock for STM32F469 Board
drivers/clk/clk-stm32f4.c | 11
From: Gabriel Fernandez
This patch-set adds the dsi clock for stm32f469 board.
Gabriel Fernandez (2):
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
clk: stm32: Add DSI clock for STM32F469 Board
drivers/clk/clk-stm32f4.c | 11 ++-
From: Gabriel Fernandez
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.
Signed-off-by: Gabriel Fernandez
---
From: Gabriel Fernandez
Two micro-controller clock output (MCO) pins are available:
MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable
prescaler.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
Two micro-controller clock output (MCO) pins are available:
MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable
prescaler.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 20
From: Gabriel Fernandez
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 60 ++
1 file changed, 60
From: Gabriel Fernandez
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 60 ++
1 file changed, 60 insertions(+)
diff --git
From: Gabriel Fernandez
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 209
From: Gabriel Fernandez
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 209 +
1 file changed, 209 insertions(+)
diff --git
From: Gabriel Fernandez
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate, divider and fixed factor).
All clocks will be defined in one
From: Gabriel Fernandez
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate, divider and fixed factor).
All clocks will be defined in one table.
Signed-off-by:
From: Gabriel Fernandez
v2:
- Don't use MFD, use existing binding of STM32 RCC.
- Rework Peripheral and Kernel clocks
- cosmetic changes
This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7.
The driver patch is split in several patches (by
From: Gabriel Fernandez
v2:
- Don't use MFD, use existing binding of STM32 RCC.
- Rework Peripheral and Kernel clocks
- cosmetic changes
This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7.
The driver patch is split in several patches (by kind of clock) to
From: Gabriel Fernandez
MP1 Gate is a gate with a set and a clear register.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 143 +
1 file changed, 143 insertions(+)
diff --git
From: Gabriel Fernandez
MP1 Gate is a gate with a set and a clear register.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 143 +
1 file changed, 143 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
Each peripheral requires a bus interface clock.
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel
From: Gabriel Fernandez
Each peripheral requires a bus interface clock.
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.
For each IP,
From: Gabriel Fernandez
RCC manages clock for debug and trace.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
RCC manages clock for debug and trace.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index b3a6ec4..f1d5967 100644
---
From: Gabriel Fernandez
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss
and ck_mcuss.
This patch adds also some MUX system and several prescalers.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 85
From: Gabriel Fernandez
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss
and ck_mcuss.
This patch adds also some MUX system and several prescalers.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 85 ++
1 file changed,
From: Gabriel Fernandez
Each PLL has 3 outputs with post-dividers.
pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected
pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR
pll3_p is dedicated for mcu
pll3_q
From: Gabriel Fernandez
Each PLL has 3 outputs with post-dividers.
pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected
pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR
pll3_p is dedicated for mcu
pll3_q is for Peripheral Kernel
From: Gabriel Fernandez
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/clock/st,stm32mp1-rcc.txt | 60
From: Gabriel Fernandez
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/clock/st,stm32mp1-rcc.txt | 60 ++
1 file changed, 60 insertions(+)
create mode
From: Gabriel Fernandez
This patch adds the RTC clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
This patch adds the RTC clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index b5379a2..51e3e76 100644
---
From: Gabriel Fernandez
MP1 Gate is a gate with a set and a clear register.
This patch also introduces divider and fixed factor clocks.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 186
From: Gabriel Fernandez
MP1 Gate is a gate with a set and a clear register.
This patch also introduces divider and fixed factor clocks.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 186 +
1 file changed, 186 insertions(+)
diff
From: Gabriel Fernandez
This patch adds the clock binding entry for STM32MP1
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/clock/stm32mp1-clks.h | 248 ++
1 file changed, 248 insertions(+)
create mode
From: Gabriel Fernandez
This patch adds the clock binding entry for STM32MP1
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/clock/stm32mp1-clks.h | 248 ++
1 file changed, 248 insertions(+)
create mode 100644 include/dt-bindings/clock/stm32mp1-clks.h
From: Gabriel Fernandez
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 209
From: Gabriel Fernandez
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 209 +
1 file changed, 209 insertions(+)
diff --git
From: Gabriel Fernandez
This patch adds the RTC clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
This patch adds the RTC clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 5a1142c..1cb06b0 100644
---
From: Gabriel Fernandez
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers and clocks source definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate).
All clocks will be defined in one
From: Gabriel Fernandez
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers and clocks source definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate).
All clocks will be defined in one table.
Signed-off-by: Gabriel
From: Gabriel Fernandez
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 48 ++
1 file changed, 48
From: Gabriel Fernandez
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/mfd/st,stm32-rcc.txt | 85
From: Gabriel Fernandez
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 48 ++
1 file changed, 48 insertions(+)
diff --git
From: Gabriel Fernandez
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/mfd/st,stm32-rcc.txt | 85 ++
1 file changed, 85 insertions(+)
create mode
From: Gabriel Fernandez
Each PLL has 3 outputs with post-dividers.
pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected
pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR
pll3_p is dedicated for mcu
pll3_q
From: Gabriel Fernandez
Each PLL has 3 outputs with post-dividers.
pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected
pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR
pll3_p is dedicated for mcu
pll3_q is for Peripheral Kernel
From: Gabriel Fernandez
Each peripheral requires a bus interface clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 114 +
1 file changed, 114 insertions(+)
diff --git
From: Gabriel Fernandez
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss and ck_mcuss.
This patch adds also some MUX system and several prescalers.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 61
From: Gabriel Fernandez
Each peripheral requires a bus interface clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 114 +
1 file changed, 114 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss and ck_mcuss.
This patch adds also some MUX system and several prescalers.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 61 ++
1 file changed,
From: Gabriel Fernandez
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7.
The driver patch is splitted in several patches (by kind of clock) to facilitate
code reviewing.
Gabriel Fernandez (14):
dt-bindings: Document STM32MP1 Reset Clock
From: Gabriel Fernandez
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c |
From: Gabriel Fernandez
This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7.
The driver patch is splitted in several patches (by kind of clock) to facilitate
code reviewing.
Gabriel Fernandez (14):
dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings
From: Gabriel Fernandez
Two micro-controller clock output (MCO) pins are available: MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable prescaler.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
Two micro-controller clock output (MCO) pins are available: MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable prescaler.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 23
From: Gabriel Fernandez
RCC manages clock for debug and trace.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c
From: Gabriel Fernandez
RCC manages clock for debug and trace.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 0402a0e..eafc95a 100644
---
From: Gabriel Fernandez
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.
Signed-off-by: Gabriel Fernandez
---
From: Gabriel Fernandez
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK
hsi and sysclk are overwritten by gpioa and gpiob.
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/clock/stm32fx-clock.h | 6 +++---
1 file
From: Gabriel Fernandez
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK
hsi and sysclk are overwritten by gpioa and gpiob.
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/clock/stm32fx-clock.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Gabriel Fernandez
This patch adds DSI clock for STM32F469 board
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32f4.c | 11 ++-
include/dt-bindings/clock/stm32fx-clock.h | 3 ++-
2 files changed, 12
From: Gabriel Fernandez
This patch adds DSI clock for STM32F469 board
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32f4.c | 11 ++-
include/dt-bindings/clock/stm32fx-clock.h | 3 ++-
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git
From: Gabriel Fernandez
This patch-set adds the dsi clock for stm32f469 board.
Gabriel Fernandez (2):
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
clk: stm32: Add DSI clock for STM32F469 Board
drivers/clk/clk-stm32f4.c | 11
From: Gabriel Fernandez
This patch-set adds the dsi clock for stm32f469 board.
Gabriel Fernandez (2):
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
clk: stm32: Add DSI clock for STM32F469 Board
drivers/clk/clk-stm32f4.c | 11 ++-
From: Gabriel Fernandez
fix test of composite clock config (bad copy / past)
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
drivers/clk/clk-stm32h7.c | 4 ++--
1 file changed, 2
From: Gabriel Fernandez
fix test of composite clock config (bad copy / past)
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
drivers/clk/clk-stm32h7.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Gabriel Fernandez
fix test of composite clock config (bad copy / past)
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
drivers/clk/clk-stm32h7.c | 4 ++--
1 file changed, 2
From: Gabriel Fernandez
The clock-cell size is 1 on stm32h7 plaform.
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt | 2 +-
1
From: Gabriel Fernandez
fix test of composite clock config (bad copy / past)
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
drivers/clk/clk-stm32h7.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Gabriel Fernandez
The clock-cell size is 1 on stm32h7 plaform.
Signed-off-by: Gabriel Fernandez
Fixes: 3e4d618b0722 ("clk: stm32h7: Add stm32h743 clock driver")
---
Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Gabriel Fernandez
v8:
- Documentation remarks from Valdimir:
- rename 'rcc' node name into 'reset-clock-controller'
- delete source paths into the device tree bindings documentation
- other cosmetic changes
v7:
- Documentation: put
From: Gabriel Fernandez
v8:
- Documentation remarks from Valdimir:
- rename 'rcc' node name into 'reset-clock-controller'
- delete source paths into the device tree bindings documentation
- other cosmetic changes
v7:
- Documentation: put 'st,syscfg' phandle in
From: Gabriel Fernandez
This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.
Signed-off-by: Gabriel Fernandez
Suggested-by: Stephen Boyd
---
From: Gabriel Fernandez
This patch enables clocks for STM32H743 boards.
Signed-off-by: Gabriel Fernandez
for MFD changes:
Acked-by: Lee Jones
for DT-Bindings
Acked-by: Rob Herring
---
From: Gabriel Fernandez
This patch enables clocks for STM32H743 boards.
Signed-off-by: Gabriel Fernandez
for MFD changes:
Acked-by: Lee Jones
for DT-Bindings
Acked-by: Rob Herring
---
.../devicetree/bindings/clock/st,stm32h7-rcc.txt | 71 +
drivers/clk/Makefile
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
lpc32xx_clk_gate_disable(),
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
lpc32xx_clk_gate_disable(),
From: Gabriel Fernandez
This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.
Signed-off-by: Gabriel Fernandez
Suggested-by: Stephen Boyd
---
From: Gabriel Fernandez
This patch enables clocks for STM32H743 boards.
Signed-off-by: Gabriel Fernandez
for MFD changes:
Acked-by: Lee Jones
for DT-Bindings
Acked-by: Rob Herring
---
From: Gabriel Fernandez
This patch enables clocks for STM32H743 boards.
Signed-off-by: Gabriel Fernandez
for MFD changes:
Acked-by: Lee Jones
for DT-Bindings
Acked-by: Rob Herring
---
.../devicetree/bindings/clock/st,stm32h7-rcc.txt | 71 +
drivers/clk/Makefile
From: Gabriel Fernandez
v8:
- Documentation remarks from Valdimir:
- rename 'rcc' node name into 'reset-clock-controller'
- delete source paths into the device tree bindings documentation
- other cosmetic changes
v7:
- Documentation: put
From: Gabriel Fernandez
v8:
- Documentation remarks from Valdimir:
- rename 'rcc' node name into 'reset-clock-controller'
- delete source paths into the device tree bindings documentation
- other cosmetic changes
v7:
- Documentation: put 'st,syscfg' phandle in
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
From: Gabriel Fernandez
We need to export clk_gate_is_enabled() from clk framework, then
to avoid compilation issue we have to rename clk_gate_is_enabled()
in NXP LPC32xx clock driver.
We changed all gate op with 'lpc32xx_' prefix:
lpc32xx_clk_gate_enable(),
lpc32xx_clk_gate_disable(),
From: Gabriel Fernandez
v6:
- rename clk_gate_is_enabled() in nxp lpc32xx driver.
- add EXPORT_SYMBOL_GPL(clk_gate_is_enabled)
v5:
- return bool instead int for enable_power_domain_write_protection()
- add comment to explain use of CLK_OF_DECLARE_DRIVER()
-
From: Gabriel Fernandez
v6:
- rename clk_gate_is_enabled() in nxp lpc32xx driver.
- add EXPORT_SYMBOL_GPL(clk_gate_is_enabled)
v5:
- return bool instead int for enable_power_domain_write_protection()
- add comment to explain use of CLK_OF_DECLARE_DRIVER()
- add comment to explain why
From: Gabriel Fernandez
This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.
Signed-off-by: Gabriel Fernandez
From: Gabriel Fernandez
This patch enables clocks for STM32H743 boards.
Signed-off-by: Gabriel Fernandez
for MFD changes:
Acked-by: Lee Jones
for DT-Bindings
Acked-by: Rob Herring
---
101 - 200 of 454 matches
Mail list logo