;
+ ecc_size1 = BCH_ECC_SIZE1;
break;
case OMAP_ECC_BCH8_CODE_HW:
bch_type = 1;
Thanks for the clean-up ..
Reviewed-by: Pekon Gupta
with regards, pekon
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;
+ ecc_size0 = BCH_ECC_SIZE0;
+ ecc_size1 = BCH_ECC_SIZE1;
break;
case OMAP_ECC_BCH8_CODE_HW:
bch_type = 1;
Thanks for the clean-up ..
Reviewed-by: Pekon Gupta pe...@pek-sem.com
with regards, pekon
Powered
On Tuesday 19 August 2014 07:42 AM, Brian Norris wrote:
On Wed, Aug 06, 2014 at 02:32:18AM +0530, pe...@pek-sem.com wrote:
On Tuesday 05 August 2014 07:53 PM, Lee Jones wrote:
On Thu, 03 Jul 2014, Gupta, Pekon wrote:
+ /* Load last page of block */
+ offs = (loff_t)block <<
On Tuesday 19 August 2014 07:42 AM, Brian Norris wrote:
On Wed, Aug 06, 2014 at 02:32:18AM +0530, pe...@pek-sem.com wrote:
On Tuesday 05 August 2014 07:53 PM, Lee Jones wrote:
On Thu, 03 Jul 2014, Gupta, Pekon wrote:
+ /* Load last page of block */
+ offs = (loff_t)block chip
Hello Lee,
On Wednesday 13 August 2014 02:41 PM, Lee Jones wrote:
Hi Brian, Pekon,
I believe all of your queries have either been answered or addressed
and I am hoping this will be the last submission. :)
/me crosses fingers!
Kind regards,
Lee
Lee Jones (8):
ARM: multi-v7: Enable ST BCH
Hello Lee,
On Wednesday 13 August 2014 02:41 PM, Lee Jones wrote:
Hi Brian, Pekon,
I believe all of your queries have either been answered or addressed
and I am hoping this will be the last submission. :)
/me crosses fingers!
Kind regards,
Lee
Lee Jones (8):
ARM: multi-v7: Enable ST BCH
Hello,
On Tuesday 05 August 2014 07:53 PM, Lee Jones wrote:
On Thu, 03 Jul 2014, Gupta, Pekon wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
[...]
+static void bch_wait_seq(struct nandi_controller *nandi
are the ecc-layout of the NAND page, because
as per [1] you should not be able to Boot from NAND then.
IIRC..
- ECC layout of HAM1_SW has ECC bytes towards end of OOB-section.
- ECC layout of HAM1_HW has ECC bytes towards staring of OOB section.
with regards, pekon
[1] http://www.ti.com/product/omap3530
of the NAND page, because
as per [1] you should not be able to Boot from NAND then.
IIRC..
- ECC layout of HAM1_SW has ECC bytes towards end of OOB-section.
- ECC layout of HAM1_HW has ECC bytes towards staring of OOB section.
with regards, pekon
[1] http://www.ti.com/product/omap3530
http
Hello,
On Tuesday 05 August 2014 07:53 PM, Lee Jones wrote:
On Thu, 03 Jul 2014, Gupta, Pekon wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Wed, May 28, 2014 at 10:20:05AM +0100, Lee Jones wrote:
[...]
+static void bch_wait_seq(struct nandi_controller *nandi
ctions entirely.
>
>I presume you have some out-of-tree driver that uses these functions,
>then?
>
Please don't drop nand_{unlock, lock} interfaces at-least for sometime.
I remember there were some users trying to use these for secure
applications. But due to lack of proper userland utili
some users trying to use these for secure
applications. But due to lack of proper userland utility support they
probably dropped the idea.
Good to have this added as part of mtd-utils package, and then let it live
for some more time.
with regards, Pekon
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ain.I test and it works Ok.It can be accepted now?
>
>Yes. Pushed to l2-mtd.git.
>
This works well with Spansion NOR device (S29GL512S10) present on
J6-EVM, using http://patchwork.ozlabs.org/patch/372866/.
Though it's already accepted in l2-mtd.git, but just for record.
Tested-by: Pek
. Pushed to l2-mtd.git.
This works well with Spansion NOR device (S29GL512S10) present on
J6-EVM, using http://patchwork.ozlabs.org/patch/372866/.
Though it's already accepted in l2-mtd.git, but just for record.
Tested-by: Pekon Gupta pe...@ti.com
with regards, pekon
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>From: Quadros, Roger
>>On 07/11/2014 10:43 AM, Gupta, Pekon wrote:
>>> From: Quadros, Roger
[...]
>>> @@ -1176,6 +1172,7 @@ static int __maybe_unused
>>> omap_calculate_ecc_bch(struct mtd_info
>*mtd,
>>> {
>>> struct omap_
>From: Quadros, Roger
>>On 07/11/2014 10:27 AM, Gupta, Pekon wrote:
>>> From: Tony Lindgren [mailto:t...@atomide.com]
>>>> * Roger Quadros [140709 05:39]:
>>>> Hi,
>>>>
>>>> The following hardware modules/registers are meant fo
bch_val[3] >> 8) & 0xFF);
>+ ecc_code[13] = ((bch_val[3] >> 0) & 0xFF);
>+
>+ ecc_code[14] = ((bch_val[2] >> 24) & 0xFF);
>+ ecc_code[15] = ((bch_val[2] >> 16) & 0xFF);
>+
some wrapper functions to match
the MTD interface arguments.
with regards, pekon
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Please read the FAQ at http://www.tux.org/lkml/
y (or something like this).
Therefore you have custom implementation of
chip->ecc.read_page = omap_read_page_bch()
Also if you change the configurations here, it will break the compatibility
with
u-boot, so images flashed via u-boot will stop to boot in kernel and
vice-versa.
I suggest, p
but you should also take in int 'ecc-scheme'.
Actually you can just move omap_calculate_ecc_bch(...) out of NAND
driver into GPMC driver and rename it, because support of ECC
scheme is property of hardware controller not NAND driver.
What ecc-schemes GPMC controller supports should be inside GPMC dri
?
Same way just think of moving chip-ecc.hwctl() callbacks implementations
out of NAND driver into GPMC driver. Then you would _not_ need to
export any GPMC registers into NAND driver.
with regards, pekon
These seem fine to me. At least I don't have any better ideas to
expose these GPMC registers
scenario so please test
all ecc-schemes before doing anything, otherwise you will end-up in
a bad loop of breaking and fixing NAND driver :-).
with regards, pekon
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More
interface arguments.
with regards, pekon
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Please read the FAQ at http://www.tux.org/lkml/
:
return -EINVAL;
--
1.8.3.2
Again same feedback.
You won't need all these changes, if you move this function
completely into GPMC driver, leaving only the wrapper here
which make the GPMC function compatible to chip-ecc.calculate.
with regards, pekon
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From: Quadros, Roger
On 07/11/2014 10:27 AM, Gupta, Pekon wrote:
From: Tony Lindgren [mailto:t...@atomide.com]
* Roger Quadros rog...@ti.com [140709 05:39]:
Hi,
The following hardware modules/registers are meant for NAND controller
driver
usage:
- NAND I/O control (NAND address, data
From: Quadros, Roger
On 07/11/2014 10:43 AM, Gupta, Pekon wrote:
From: Quadros, Roger
[...]
@@ -1176,6 +1172,7 @@ static int __maybe_unused
omap_calculate_ecc_bch(struct mtd_info
*mtd,
{
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info
the pattern should be something
>like:
>
>"ARM: OMAP2+: GPMC should only probe enabled devices"
>
>Other than this, the patch looks correct.
>
Yes, plz keep patch title consistent as in other gpmc.c patches.
And thanks for this fix.
Tested-by: Pekon Gupta
with regards, p
Other than this, the patch looks correct.
Yes, plz keep patch title consistent as in other gpmc.c patches.
And thanks for this fix.
Tested-by: Pekon Gupta pe...@ti.com
with regards, pekon
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NAND signal timings
from datasheet and then convert it into controller understandable DT
(2) ONFI parameter page on NAND has these timings specified
on-die itself, and these timings are characterized for best performance
so NAND driver should re-configure these timings after probe.
Refer below mail fr
/2014-April/053488.html
Considering all these details, please re-review the changes you plan
for GPMC driver.
with regards, pekon
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bitflips_threshold == 0
means ECC correction is not implemented.
@@drivers/mtd/mtdcore.c: mtd_read()
return ret_code >= mtd->bitflip_threshold ? -EUCLEAN : 0;
>+ bool flashss;
I could not find the use of this member I current series.
In your earlier version of patch this was used for DT binding "st,nand-flashss"
Am I missing something ?
with regards, pekon
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Please read the FAQ at http://www.tux.org/lkml/
er timing registers are
>configured
>+according to one of the following methods, in order of precedence:
>+
>+ 1. Configuration based on "st,nand_timing_spec" if supplied.
>+
Not sure if this mode is really required, as almost all devices are ONFI
compliant.
Plea
are ONFI
compliant.
Please check with 'Rob Herring robherri...@gmail.com'
+ 2. Configuration based on ONFI timing mode, as advertised by the
+ device during ONFI-probing (ONFI-compliant NAND only).
+
+ 3. Use reset/safe timing values
+
with regards, pekon
something ?
with regards, pekon
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neither a hardware parameter, nor it’s a static constant.
>
>Ah, I see. I will fixup, thanks for the explanation.
>
Please wait, I'll review your [v2] series also, then you can further
send all fixes together. I'm bit caught in other commitments for 3.16,
so hopefully I'll be able to review your patches by next week.
with regards, pekon
.
Please wait, I'll review your [v2] series also, then you can further
send all fixes together. I'm bit caught in other commitments for 3.16,
so hopefully I'll be able to review your patches by next week.
with regards, pekon
y NAND_NO_SUBPAGE_WRITE should _not_ be set,
because it breaks compatibility with older UBIFS images.
http://lists.infradead.org/pipermail/linux-mtd/2014-April/053262.html
Also below is the appropriate fix without breaking backward compatibility.
http://lists.infradead.org/pipermail/
,
because it breaks compatibility with older UBIFS images.
http://lists.infradead.org/pipermail/linux-mtd/2014-April/053262.html
Also below is the appropriate fix without breaking backward compatibility.
http://lists.infradead.org/pipermail/linux-mtd/2014-May/053745.html
with regards, pekon
non-DT (platform file based), then I think
It's good point to move to unified generic partition format which others
are following, as you make your driver DT compliant, and in mainline.
I understand you primary objective would be to get ST driver work
out of mainline asap, but if you upstream too many custom stuff you
are only adding maintenance burden for your code. This is where
most of my comments originate.
However, I leave it to Brian to decide, if he is okay with these.
with regards, pekon
primary objective would be to get ST driver work
out of mainline asap, but if you upstream too many custom stuff you
are only adding maintenance burden for your code. This is where
most of my comments originate.
However, I leave it to Brian to decide, if he is okay with these.
with regards, pekon
>From: Lee Jones [mailto:lee.jo...@linaro.org]
>>On Wed, 26 Mar 2014, Gupta, Pekon wrote:
[...]
>> >+ /* Reset and disable boot-mode controller */
>> >+ writel(BOOT_CFG_RESET, nandi->base + NANDBCH_BOOTBANK_CFG);
>> >+ udelay(1);
>> >+ write
From: Lee Jones [mailto:lee.jo...@linaro.org]
On Wed, 26 Mar 2014, Gupta, Pekon wrote:
[...]
+ /* Reset and disable boot-mode controller */
+ writel(BOOT_CFG_RESET, nandi-base + NANDBCH_BOOTBANK_CFG);
+ udelay(1);
+ writel(0x, nandi-base + NANDBCH_BOOTBANK_CFG);
Why using
rning
>> "‘erased_sector_bitflips’ defined but not used [-Wunused-function]" when
>> compiling without CONFIG_MTD_NAND_OMAP_BCH. Move function
>> erased_sector_bitflips() into the same ifdef section as the only caller.
>>
>> Signed-off-by: Christian Engelmayer
&
but not used [-Wunused-function] when
compiling without CONFIG_MTD_NAND_OMAP_BCH. Move function
erased_sector_bitflips() into the same ifdef section as the only caller.
Signed-off-by: Christian Engelmayer cenge...@gmx.at
Reviewed-by: Jingoo Han jg1@samsung.com
Thanks for the patch..
Acked-by: Pekon
ndi->page_buf;
>+ nandi->cached_page = -1;
>+ } else {
>+ p = buf;
>+ }
>+
>+ if (nandi->cached_page == page_num)
>+ nandi->cached_page = -1;
>+
>+ r
NDBCH_CONTROLLER_CFG);
>+
>+ /* Set EMI Bank */
>+ writel(0x1 << emi_bank, nandi->base + NANDBCH_FLEX_MUXCTRL);
>+
>+ /* Reset ECC stats */
>+ writel(0x7f0, nandi->base + NANDBCH_CONTROLLER_CFG);
>+ udelay(1);
>+
"0x7f0" ?? please u
;+ ret = check_erased_page(buf, page_size,
>+ nandi->sectors_per_page);
This is also not correct. Here 'max_zeros' should be ecc.strength
>+ if (ret >= 0)
>+ dev_dbg(nandi->dev,
>+
+
>+ sprintf(name, "bank%d", bank_nr);
>+ banknp = of_get_child_by_name(banksnp, name);
>+ if (banknp)
>+ return NULL;
>+
>+ partsnp = of_get_child_by_name(banknp, "partitions");
>+ of_node_put(banknp);
>+
Sorry, I'm bit confused h
_disable_unprepare(nandi->emi_clk);
>+ if (nandi->bch_clk)
>+ clk_disable_unprepare(nandi->bch_clk);
>+}
>+
same, please move this to
[RFC 11/47] mtd: nand: stm_nand_bch: add Power Management
Also as Ezequiel suggested.
You can trim down the number of p
}
>+ if (status & NAND_INT_RBN) {
>+ /* Hamming */
>+ writel(NAND_INT_CLR_RBN, nandi->base + NANDHAM_INT_CLR);
>+ complete(>rbn_completed);
-- same for this --
return IRQ_HANDLED; /* HAM ECC IRQ handled successfully */
>+ }
>
, pekon
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);
+}
+
same, please move this to
[RFC 11/47] mtd: nand: stm_nand_bch: add Power Management
Also as Ezequiel suggested.
You can trim down the number of patches by submitting only the main portion
of driver first. PM other features can be added as separate patch-set.
with regards, pekon
. This should already taken care in default parser
drivers/mtd/ofpart.c : parse_ofpart_partitions()
And all you need to pass is 'of_node' of bank (device).
Is my understanding correct ?
+ return partsnp;
+}
+EXPORT_SYMBOL(stm_of_get_partitions_node);
+
with regards, pekon
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,
+ %s: erased page detected: \n
+downgrading uncorrectable ECC error.\n,
+ __func__);
+ } else {
+ ret = (int)ecc_err;
+ }
+
+ return ret;
+}
+
with regards, pekon
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);
+
+ /* Reset ECC stats */
+ writel(0x7f0, nandi-base + NANDBCH_CONTROLLER_CFG);
+ udelay(1);
+
0x7f0 ?? please use Macro instead.
with regards, pekon
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More
+= page_size;
+ len -= page_size;
+
+ if (retlen)
+ *retlen += page_size;
+ }
+
+ return 0;
+}
+
/*
* Hamming-FLEX operations
*/
--
1.8.3.2
with regards, pekon
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available in public domain somewhere ?
with regards, pekon
he best thing to do in this instance? Should I just
>send it to the list as an RFC and be done with it?
>
with regards, pekon
N�r��yb�X��ǧv�^�){.n�+{zX����ܨ}���Ơz�:+v���zZ+��+zf���h���~i���z� �w���?�&�)ߢf��^jǫy�m��@A�a���
0��h���i
and be done with it?
with regards, pekon
N�r��yb�X��ǧv�^�){.n�+{zX����ܨ}���Ơz�j:+v���zZ+��+zf���h���~i���z� �w���?��)ߢf��^jǫy�m��@A�a���
0��h���i
?
with regards, pekon
k;
>+ case NAND_ECC_SOFT_BCH:
>+ ecc->bytes = ((ecc->strength * fls(8 * ecc->size)) + 7) / 8;
>+ break;
>+ default:
>+ ret = -EINVAL;
>+ goto err;
>+ }
>+
>+ ecc->mode = mode;
>+ re
/gmane.linux.ports.arm.omap/108083
(you can skip initial discussion about OMAP3, and jump to Thomas Petazzoni | 2
Dec 17:19 2013)
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instead. It's the way a hardware controller is designed.
Request you to please consider Ack from MTD Maintainers 'at-least' for
generic NAND DT bindings. There is already a discussion going in
a separate thread for which there are still no replies [1].
[1] http://lists.infradead.org/pipermail/lin
iners 'at-least' for
generic NAND DT bindings. There is already a discussion going in
a separate thread for which is still not awaiting replies [1].
[1] http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html
with regards, pekon
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a separate thread for which is still not awaiting replies [1].
[1] http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html
with regards, pekon
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. There is already a discussion going in
a separate thread for which there are still no replies [1].
[1] http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html
with regards, pekon
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Hi Shawn,
>From: Shawn Guo [mailto:shawn@linaro.org]
>>On Tue, Dec 17, 2013 at 05:00:53AM +, Gupta, Pekon wrote:
>> >From: Huang Shijie [mailto:b32...@freescale.com]
>>> >On Tue, Dec 17, 2013 at 04:08:33AM +, Gupta, Pekon wrote:
[...]
>> >>
Hi Shawn,
From: Shawn Guo [mailto:shawn@linaro.org]
On Tue, Dec 17, 2013 at 05:00:53AM +, Gupta, Pekon wrote:
From: Huang Shijie [mailto:b32...@freescale.com]
On Tue, Dec 17, 2013 at 04:08:33AM +, Gupta, Pekon wrote:
[...]
As much base code is copied from m25p90.c,
Do you mind
r
> paths, or is it returning 0? Of course the answer is the former, but
> it's possible to misread it.) If it helps, I can try to tweak the
> wording a bit when applying this patch.
>
> Pekon, can I get an Acked-by?
>
Yes sure .. Sorry I was away from both mailbox and bo
is the former, but
it's possible to misread it.) If it helps, I can try to tweak the
wording a bit when applying this patch.
Pekon, can I get an Acked-by?
Yes sure .. Sorry I was away from both mailbox and boards.
Acked-by: Pekon Gupta pe...@ti.com
And thanks much Wei Yongjun for fixing
Hi Mark,
>
> Pekon, could you please re-send this version of the patches?
>
As already there are feedbacks on the patches, so re-sending the
Patch series might clutter someone else's mailbox.
Will it be possible for you to fetch the patches from MTD archives?
else I would send you th
e NAND driver code.
with regards, pekon
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.
with regards, pekon
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Hi Mark,
Pekon, could you please re-send this version of the patches?
As already there are feedbacks on the patches, so re-sending the
Patch series might clutter someone else's mailbox.
Will it be possible for you to fetch the patches from MTD archives?
else I would send you the patches
Hi Brian,
>
> Hi Pekon,
>
> On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
> > + akpm
> >
> > On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
[snip]
> > >
> > > Dear Olof and other DT Maintainers,
> > >
Hi Brian,
Hi Pekon,
On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
+ akpm
On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
[snip]
Dear Olof and other DT Maintainers,
This patch series has missed multiple merge windows, and
much of the other
erted. I have already re-sent a updated version of this series
with fixes & copying devicetree-discuss.
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047530.html
with regards, pekon
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version of this series
with fixes copying devicetree-discuss.
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047530.html
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>
> On Mon, Jul 1, 2013 at 10:44 PM, Gupta, Pekon wrote:
> >>
> >> Hi all,
> >>
> >> Today's linux-next merge of the arm-soc tree got a conflict in
> >> Documentation/devicetree/bindings/mtd/gpmc-nand.txt between
> commits
> >> 6
On Mon, Jul 1, 2013 at 10:44 PM, Gupta, Pekon pe...@ti.com wrote:
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
Documentation/devicetree/bindings/mtd/gpmc-nand.txt between
commits
6c88058ef927 (ARM: OMAP2+: cleaned-up DT support of various ECC
schemes
shouldn't find such issues, as code is more stable now.
Thanks for help.
with regards, pekon
> diff --cc Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> index b3f23df,df338cb..000
> --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> +++ b/Documentation/devicetree/bindi
...@canb.auug.org.au
Yes following merge is correct. Apologies, as there were multiple OMAP2 NAND
and GPMC updates and clean-up going into different trees, so these conflict
came. Going forward you shouldn't find such issues, as code is more stable now.
Thanks for help.
with regards, pekon
diff --cc
; +compatible = "ti,am3359-adc";
> +};
> +
> +};
> +
> + elm: elm@4808 {
> + compatible = "ti,am3352-elm";
> + reg = <0x4808 0x2000>
;
+ interrupts = 4;
+ ti,hwmods = elm;
+ status = disabled;
+ };
+
[Pekon]: Thanks.. Yes this is ok based on commit 15e8246bd61b (ARM: dts:
AM33XX: Add ELM node)
gpmc: gpmc@5000 {
compatible = ti,am3352-gpmc
g91165.html
>
> [PATCH v4,1/3] http://www.spinics.net/lists/linux-omap/msg91166.html
>
> [PATCH v4,2/3] (please skip this one)
> instead pick http://www.spinics.net/lists/linux-omap/msg91161.html
>
> [PATCH v4,3/3] (typo)
http://www.spinics.net/lists/linux-
.spinics.net/lists/linux-omap/msg91166.html
[PATCH v4,2/3] (please skip this one)
instead pick http://www.spinics.net/lists/linux-omap/msg91161.html
[PATCH v4,3/3] http://www.spinics.net/lists/linux-omap/msg91167.html
Thanks..
with regards, pekon
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s> this.
> Lars> Correct the properties in the dts to provide the right values for the
> Lars> gpmc driver.
>
> Lars> Signed-off-by: Lars Poeschel
>
> Acked-by: Peter Korsgaard
>
Acked-by: Pekon Gupta
My another patch [V3, 2/3] on same can be d
to provide the right values for the
Lars gpmc driver.
Lars Signed-off-by: Lars Poeschel poesc...@lemonage.de
Acked-by: Peter Korsgaard jac...@sunsite.dk
Acked-by: Pekon Gupta pe...@ti.com
My another patch [V3, 2/3] on same can be dropped, in lieu of this one..
http://www.spinics.net/lists
/linux-omap/msg91166.html
[PATCH v4,2/3] (please skip this one)
instead pick http://www.spinics.net/lists/linux-omap/msg91161.html
[PATCH v4,3/3] http://www.spinics.net/lists/linux-omap/msg91167.html
Thanks..
with regards, pekon
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To unsubscribe from this list: send the line unsubscribe linux
/lists/linux-omap/msg91166.html
[PATCH v4,2/3] (please skip this one)
instead pick http://www.spinics.net/lists/linux-omap/msg91161.html
[PATCH v4,3/3] (typo)
http://www.spinics.net/lists/linux-omap/msg91164.html
Thanks..
with regards, pekon
en already fixed in v3 of this patch set.
> If all fine, then please pull this for next merge..
>
> http://lists.infradead.org/pipermail/linux-mtd/2013-May/046712.html
>
> http://lists.infradead.org/pipermail/linux-mtd/2013-May/046814.html
>
> http://lists.infradead.org/
://lists.infradead.org/pipermail/linux-mtd/2013-May/046814.html
http://lists.infradead.org/pipermail/linux-mtd/2013-May/046710.html
with regards, pekon
Request you to please accept | provide feedbacks on this patch series.
These are waiting acceptance since Jan-2013, and are necessary for
DT based
radead.org/pipermail/linux-mtd/2013-May/046712.html
http://lists.infradead.org/pipermail/linux-mtd/2013-May/046814.html (already
pulled)
http://lists.infradead.org/pipermail/linux-mtd/2013-May/046710.html
with regards, pekon
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(already
pulled)
http://lists.infradead.org/pipermail/linux-mtd/2013-May/046710.html
with regards, pekon
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From: Philip Avinash
NAND flash connected in am335x-evm on GPMC controller. This patch adds
device tree node in am3355-evm with GPMC contoller timing for NAND flash
interface, NAND partition table, ECC scheme, elm handle id.
Signed-off-by: Philip Avinash
Signed-off-by: Gupta, Pekon
From: avinash philip
NAND flash connected in am335x-evm on GPMC controller. This patch adds
device tree node in am3355-evm with GPMC contoller timing for NAND flash
interface, NAND partition table, ECC scheme, elm handle id.
Signed-off-by: Philip Avinash
Signed-off-by: Gupta, Pekon
---
arch
sted this patch with Micron MT29F64G08CBABAWP.
>
> Signed-off-by: Huang Shijie
Acked-by: Pekon Gupta
Thanks..
with regards, pekon
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_section{} for extended sections,
> [4] and adds onfi_ext_param_page{} for the Extended Parameter
> Page.
>
> Signed-off-by: Huang Shijie
Acked-by: Pekon Gupta
Thanks..
with regards, pekon
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t
> 于 2013年05月02日 13:42, Gupta, Pekon 写道:
> >>>> -*busw = 0;
> >>>> -if (le16_to_cpu(p->features)& 1)
> >>>> -*busw = NAND_BUSWIDTH_16;
> >>>> +
于 2013年05月02日 13:42, Gupta, Pekon 写道:
-*busw = 0;
-if (le16_to_cpu(p-features) 1)
-*busw = NAND_BUSWIDTH_16;
+
+*busw = (onfi_feature(chip) ONFI_FEATURE_16_BIT_BUS) ?
+NAND_BUSWIDTH_16 : 0;
Is this really needed
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