qup_i2c_set_read_mode_v2(qup, msg->len);
> + qup_i2c_issue_xfer_v2(qup, msg);
> + ret = qup_i2c_wait_for_complete(qup, msg);
> + if (ret)
> + goto err;
Is the issue_xfer_v2 needed inside this here ?
> + qup_i2c_set_blk_data(qup, msg);
> + }
> } while (qup->blk.pos < qup->blk.count);
Regards,
Sricharan
st struct of_device_id qup_i2c_dt_match[] = { };
> MODULE_DEVICE_TABLE(of, qup_i2c_dt_match);
>
> +#if IS_ENABLED(CONFIG_ACPI)
> +static const struct acpi_device_id qup_i2c_acpi_match[] = {
> + { "QCOM8010"},
> + { },
> +};
> +MODULE_DEVICE_TABLE(acpi, qup_i2c_acpi_ids); #endif
> +
> static struct platform_driver qup_i2c_driver = {
> .probe = qup_i2c_probe,
> .remove = qup_i2c_remove,
> @@ -1646,6 +1674,7 @@ static struct platform_driver qup_i2c_driver = {
> .name = "i2c_qup",
> .pm = &qup_i2c_qup_pm_ops,
> .of_match_table = qup_i2c_dt_match,
> + .acpi_match_table = ACPI_PTR(qup_i2c_acpi_match),
> },
> };
>
Reviewed-by: sricha...@codeaurora.org
Regards,
Sricharan
unnessecary 'timeouts' which happens
> > > when waiting for events that would never happen when there is
> > > already an error condition on the bus.
> > >
> > > Signed-off-by: Sricharan R
> > > Reviewed-by: Andy Gross
> >
> > Please
cription describes what you do. But not why it is the correct
solution
> to the OOPS. The OOPS neither describes it. Please add some more
> explanation.
>
Ok,will describe it more. The reason it oops is sg_set_bug expects that
the
buf parameter passed in should be a from the lowmem and a valid
pageframe.
This is not true for pages from dma_alloc_coherent which can be carveouts,
hence
the check fails. Allocating buffers using kzalloc fixes the issue.
Regards,
Sricharan
Hi,
> > One for fixing the bug with CONFIG_DEBUG_SG enabled and another to
> > suspend the transfer for all errors instead of just for nack.
>
> You haven't stated what was changed in V2.
ah, sorry, will resend..
Regards,
Sricharan
Hi,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Abhishek Sahu
> Sent: Wednesday, May 11, 2016 11:04 PM
> To: Sricharan
> Cc: arch...@codeaurora.org; w...@the-dreams.de; linux-arm-
> m...@
qup_i2c_set_blk_data(qup, msg);
>
> + blocks = qup->blk.count;
> + rem = msg->len - (blocks - 1) * limit;
> +
Same if we had blocks = (msg->len + limit - 1) / limit instead of the
above ?
Otherwise,
Reviewed-by: sricha...@codeaurora.org
Regards,
Sricharan
if (qup_err || bus_err) {
> writel(QUP_RESET_STATE, qup->base + QUP_STATE);
> goto done;
> }
In qup_i2c_xfer and qup_i2c_xfer_v2 state is set to RESET at the end,
when
there is no error. So would it be fine if we do it there
unconditionally ?
Regards,
Sricharan
p->pos = 0;
> + qup_i2c_set_read_mode_v2(qup, msg->len);
> + qup_i2c_issue_xfer_v2(qup, msg);
> + ret = qup_i2c_wait_for_complete(qup, msg);
> + if (ret)
> + goto err;
> + qup_i2c_set_blk_data(qup, msg);
> + }
> } while (qup->blk.pos < qup->blk.count);
When v2 mode is not supported this should return an error,
in qup_i2c_xfer for msg->flags & I2C_M_RECV_LEN
Regards,
Sricharan
rlcpy(qup->adap.name, "QUP I2C adapter", sizeof(qup-
> >adap.name));
>
> @@ -1639,6 +1662,13 @@ static const struct of_device_id
> qup_i2c_dt_match[] = { }; MODULE_DEVICE_TABLE(of, qup_i2c_dt_match);
>
> +#if IS_ENABLED(CONFIG_ACPI)
> +static const struct acpi_device_id qup_i2c_acpi_match[] = {
> + { "QCOM8010"},
> + { },
> +};
> +MODULE_DEVICE_TABLE(acpi, qup_i2c_acpi_ids); #endif
> static struct platform_driver qup_i2c_driver = {
> .probe = qup_i2c_probe,
> .remove = qup_i2c_remove,
> @@ -1646,6 +1676,7 @@ static struct platform_driver qup_i2c_driver = {
> .name = "i2c_qup",
> .pm = &qup_i2c_qup_pm_ops,
> .of_match_table = qup_i2c_dt_match,
> + .acpi_match_table = ACPI_PTR(qup_i2c_acpi_match),
Should this also be in #if IS_ENABLED(CONFIG_ACPI) check ?
Regards,
Sricharan
Hi,
> This patch converts the Qualcomm SCM driver to use the streaming DMA
> APIs for communication buffers.
>
> Signed-off-by: Andy Gross
> ---
Reviewed-by: sricha...@codeaurora.org
Regards,
Sricharan
> drivers/firmware/q
: c000
x1 : 0003 x0 :
Process swapper/0 (pid: 1, stack limit = 0xffc036870020)
Stack: (0xffc0368735c0 to 0xffc036874000)
Change allocation of sg buffers from dma_coherent memory to kzalloc
to fix the issue.
Signed-off-by: Sricharan R
One for fixing the bug with CONFIG_DEBUG_SG enabled and another
to suspend the transfer for all errors instead of just for nack.
Sricharan R (2):
drivers: i2c: qup: Fix broken dma when CONFIG_DEBUG_SG is enabled.
drivers: i2c: qup: Fix error handling
drivers/i2c/busses/i2c-qup.c | 87
that would never happen when there
is already an error condition on the bus.
Signed-off-by: Sricharan R
Reviewed-by: Andy Gross
---
drivers/i2c/busses/i2c-qup.c | 42 +-
1 file changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/i2c/busses/i
Hi Andy,
> -Original Message-
> From: Andy Gross [mailto:andy.gr...@linaro.org]
> Sent: Thursday, May 05, 2016 10:52 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; arch...@codeaurora.org; linux-arm-
> m...@vger.kernel.org; ntel...@codeaurora.org; ga...@codea
One for fixing the bug with CONFIG_DEBUG_SG enabled and another
to suspend the transfer for all errors instead of just for nack.
Sricharan R (2):
drivers: i2c: qup: Fix broken dma when CONFIG_DEBUG_SG is enabled.
drivers: i2c: qup: Fix error handling
drivers/i2c/busses/i2c-qup.c | 87
that would never happen when there
is already an error condition on the bus.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 34 +-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-q
: 0003 x0 :
Process swapper/0 (pid: 1, stack limit = 0xffc036870020)
Stack: (0xffc0368735c0 to 0xffc036874000)
Change allocation of sg buffers from dma_coherent memory to kzalloc
to fix the issue.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c
> On Fri, Mar 25, 2016 at 04:17:30PM -0700, Bjorn Andersson wrote:
> > On Tue, Jan 19, 2016 at 2:02 AM, Sricharan R
> wrote:
> > > Signed-off-by: Sricharan R
> > > Reviewed-by: Andy Gross
>
>
>
> > > +
Hi wolfram,
> On Mon, Feb 22, 2016 at 05:38:15PM +0530, Sricharan R wrote:
> > QUP cores can be attached to a BAM module, which acts as a dma engine
> > for the QUP core. When DMA with BAM is enabled, the BAM consumer
> pipe
> > transmitted data is written to the output F
hen
should be put in to 'RUN' state separately.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 46 +---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index
ously ..
Regards,
Sricharan
Hi Wolfram,
> -Original Message-
> From: Sricharan [mailto:sricha...@codeaurora.org]
> Sent: Saturday, February 13, 2016 12:29 PM
> To: 'Wolfram Sang'
> Cc: 'devicet...@vger.kernel.org'; 'linux-arm-...@vger.kernel.org';
> 'agr...@co
transfer more than
256 bytes, without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
Reviewed-by: Andy Gross
Tested-by: Archit Taneja
Tested-by: Telkar Nagender
---
Fixed Sparse/Static warnings.
drivers/i2c/busses/i2c-q
Hi,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Anup Patel
> Sent: Monday, February 08, 2016 10:48 AM
> To: Catalin Marinas; Joerg Roedel; Will Deacon; Robin Murphy; Sricharan R;
> Linux IOMMU; Lin
Hi,
> On Wed, Feb 10, 2016 at 10:36:22AM -0600, Michael Welling wrote:
> > On Wed, Feb 10, 2016 at 08:39:04PM +0530, Sricharan wrote:
> > > > Hi Sricharan,
> > > >
> > > > Are you looking at pca9685_pwm_probe in drivers/pwm/pwm-
> pca9685.c
>
Hi Wolfram,
> -Original Message-
> From: Wolfram Sang [mailto:w...@the-dreams.de]
> Sent: Saturday, February 13, 2016 12:08 AM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
> agr...@codeaurora.org; linux-kernel@vger.kern
pca@40 {
> >> compatible = "nxp,pca9685-pwm";
> >> #pwm-cells = <2>;
> >> reg = <0x40>;
> >> };
> >>
>
Hi,
> -Original Message-
> From: linux-arm-msm-ow...@vger.kernel.org [mailto:linux-arm-msm-
> ow...@vger.kernel.org] On Behalf Of Michael Welling
> Sent: Tuesday, February 09, 2016 12:47 AM
> To: Sricharan
> Cc: 'Wolfram Sang'; 'Daniel Baluta'
Stadler; Linux Kernel Mailing List;
linux-...@vger.kernel.org;
> Lucas De Marchi; Andy Gross; Pramod Gurav; Bjorn Andersson; Guenter
> Roeck; eib...@gdsys.de; Sricharan R; linux-arm-...@vger.kernel.org
> Subject: Re: [PATCH v4] iio: adc: Add TI ADS1015 ADC driver support
>
> On M
Hi Wolfram,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Wolfram Sang
> Sent: Friday, February 05, 2016 1:39 AM
> To: Sricharan
> Cc: devicet...@vger.kernel.org; arch...@codeaurora.o
Hi Wolfram,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Wolfram Sang
> Sent: Sunday, January 24, 2016 5:03 PM
> To: Sricharan
> Cc: devicet...@vger.kernel.org; arch...@codeaurora.org; linux-arm-
>
Hi Wolfram,
> -Original Message-
> From: Wolfram Sang [mailto:w...@the-dreams.de]
> Sent: Sunday, January 24, 2016 4:59 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
> agr...@codeaurora.org; linux-kernel@vger.kern
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 415 ---
1 file ch
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 753bdfd..7786408 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
transfer more than 256 bytes, without a
'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 447 ++-
1 file changed, 439 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in other places as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 67
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 7786408..bd1be53 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
This patch adds the support in non-dma mode.
Signed-off-by: S
t to coalesce each i2c_msg in i2c_msgs for fifo and
block mode in Patch 2. Also addressed further code comments.
http://comments.gmane.org/gmane.linux.drivers.i2c/22497
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Sricharan R (6):
i2c: qup: Change qup_wa
Hi Ivan,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Ivan T. Ivanov
> Sent: Monday, July 20, 2015 8:17 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
>
Hi Ivan,
> -Original Message-
> From: Ivan T. Ivanov [mailto:iiva...@mm-sol.com]
> Sent: Monday, July 20, 2015 4:53 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
> ga...@codeaurora.org; linux-kernel@vger.kernel.org; linux-
>
Hi Ivan,
> -Original Message-
> From: Ivan T. Ivanov [mailto:iiva...@mm-sol.com]
> Sent: Monday, July 20, 2015 3:14 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
> ga...@codeaurora.org; linux-kernel@vger.kernel.org; linux-
>
Hi Ivan,
Thnaks for all the reviews.
> -Original Message-
> From: linux-arm-msm-ow...@vger.kernel.org [mailto:linux-arm-msm-
> ow...@vger.kernel.org] On Behalf Of Ivan T. Ivanov
> Sent: Monday, July 20, 2015 1:55 PM
> To: Sricharan R
> Cc: devicet...@vger.ker
-out allocations to go through.
Signed-off-by: Sricharan R
---
drivers/base/dma-coherent.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c
index 55b8398..72bdc6f 100644
--- a/drivers/base/dma-coherent.c
+++ b/drivers
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 330 ++-
1 file ch
transfer more than 256 bytes, without a
'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 431 +--
1 file changed, 415 insertions(+), 16 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index f138202..17dcda3 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
This patch adds the support in non-dma mode.
Signed-off-by: S
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 67
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 37b47b5..f138202 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
The qup_i2c_write/read_one functions can be split to have
the common initialization code and function to loop around
the data bytes separately. This way the initialization code
can be reused while adding v2 tags functionality.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 147
de in Patch 2. Also addressed further code comments.
http://comments.gmane.org/gmane.linux.drivers.i2c/22497
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Sricharan R (7):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
qup: i2c: factor ou
Hi,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Baptiste Reynal
> Sent: Tuesday, June 23, 2015 5:43 PM
> To: Sricharan R
> Cc: linux-arm-...@vger.kernel.org; Linux IOMMU; Will Deacon; open list;
&g
Patch 'fix ARM_SMMU_FEAT_TRANS_OPS condition' changed the check
for ARM_SMMU_FEAT_TRANS_OPS to be based on presence of stage1 check,
but used (id & ID0_ATOSNS) instead of !(id & ID0_ATOSNS).
Fix it here.
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 2 +-
1 file ch
Hi Ivan,
On 04/16/2015 02:06 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 20:14 +0530, Sricharan R wrote:
+#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31)
Could you explain what is this for?
This is a new feature in the V2 version of the controller,
to
Hi Ivan,
Sorry resending again, because wrapping seemed to be
somehow wrong in my previous response.
On 04/15/2015 02:19 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 12:09 +0530, Sricharan R wrote:
+/* frequency definitions for high speed and max speed */
+#define
Hi Ivan,
On 04/15/2015 02:19 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 12:09 +0530, Sricharan R wrote:
+/* frequency definitions for high speed and max speed */
+#define I2C_QUP_CLK_FAST_FREQ 100
This is fast mode, if I am not mistaken.
ya, up to 1MHZ
Hi Ivan,
On 04/14/2015 08:46 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Sat, 2015-04-11 at 12:39 +0530, Sricharan R wrote:
From: Andy Gross
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write
Hi,
On 04/12/2015 03:42 AM, Sergei Shtylyov wrote:
Hello.
On 04/11/2015 10:09 AM, Sricharan R wrote:
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 200 +
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
[V3] Addressed comments from Andy Gross
to use macros for qup_i2c_wait_ready function.
drivers/i2c/busses/i2c-qup.c | 415 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
[V3] Addressed comments from Andy Gross
to coalesce each i2c_msg i
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2c26151..d741856 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..2c26151 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
agon board eeprom client on i2c bus1
[V3] Added support to coalesce each i2c_msg in i2c_msgs for fifo and
block mode in Patch 2. Also addressed further code comments.
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Andy Gross (1):
i2c: qup: Add V2 tags support
Sric
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
[v3] Addressed comments from Andy Gross
Hi Andy,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Andy Gross
> Sent: Tuesday, April 07, 2015 10:37 AM
> To: Sricharan R
> Cc: srich...@qti.qualcomm.com; devicet...@vger.kernel.org; linux-arm-
>
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 199 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
[v2] Addressed comments from Ivan T. Ivanov
drivers/i2c/busses/i2c-q
Signed-off-by: Sricharan R
---
[v2] Used macros for interrupts property.
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2d11641..c2e8711 100644
Signed-off-by: Sricharan R
---
[v2] Changed dma channel names as per comments.
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index c2e8711..5cb0772 100644
--- a/arch/arm/boot
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 30
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
[v2] Addressed comments from Ivan T. Ivanov
drivers/i2c/busses/i2c-qup.c | 371 ++-
1 file changed, 366 insertions(+), 5 deletion
agon board eeprom client on i2c bus1
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross
[v1] Initial Version
Andy Gross (1):
i2c: qup: Add V2 tags support
Sricharan R (5):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
i2c: qup: Add bam dma capabilities
i2c: qup
Hi Ivan,
On 03/26/2015 01:01 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Thu, 2015-03-26 at 11:14 +0530, Sricharan R wrote:
+ if (msg->flags & I2C_M_RD)
+ qup->rx_tag_len = (qup->blocks << 1);
here again.
hmm, why not shift ?
Because it makes
Hi Ivan,
On 03/25/2015 06:40 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
#define QUP_I2C_MASTER_GEN 0x408
+#define QUP_I2C_MASTER_CONFIG 0x408
Unused.
Ok, will remove it
#define QUP_READ_LIMIT 256
+#define
Hi Ivan,
On 03/25/2015 05:54 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
From: Andy Gross
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write
/* configure client interfaces */
> + writel(ADM_CI_RANGE_START(0x40) | ADM_CI_RANGE_END(0xb0) |
> + ADM_CI_BURST_8_WORDS, adev->regs +
> ADM_CI_CONF(0));
> + writel(ADM_CI_RANGE_START(0x2a) | ADM_CI_RANGE_END(0x2c) |
> + ADM_CI_BURST_8_WORDS, adev->r
Hi,
> On 03/13/2015 07:49 PM, Sricharan R wrote:
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm/boot/dts/qcom-msm8974.dtsi | 10 ++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
>> b/arch/ar
Hi,
> On Fri, Mar 13, 2015 at 11:19:52PM +0530, Sricharan R wrote:
>> Signed-off-by: Sricharan R
>> ---
>
> Reviewed-by: Andy Gross
>
>> arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm/b
ret = 4;
>> > + break;
>> > + case 256:
>> > + ret = 5;
>> > + break;
>> ffs(burst>>4) ?
>
> that should work nicely. thanks.
>
Will not work for 192, 256 ?
Regards,
Sricharan
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Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..3f648ae 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 365 ++-
1 file changed, 359 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 30
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 3f648ae..1ec7ec5 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 192 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 342
agon board eeprom client
on i2c bus1
Andy Gross (1):
i2c: qup: Add V2 tags support
Sricharan R (5):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
i2c: qup: Add bam dma capabilities
i2c: qup: Transfer every i2c_msg in i2c_msgs without stop
dts: msm8974: Add blsp2_ba
it's immutable unless you tell me I applied something
>> incorrectly. Once it goes into irqchip/core, it's immutable no matter
>> what you say. ;-)
>
> Thanks, looks good to me. Sricharan and Nishant, can you please
> check that we can now apply the related .dts changes
Hi Tony,
On Thursday 26 June 2014 01:14 PM, Tony Lindgren wrote:
> * Sricharan R [140626 00:29]:
>> From: R Sricharan
>>
>> There is a IRQ crossbar device in the soc, which
>> maps the irq requests from the peripherals to the
>> mpu interrupt controller's
From: R Sricharan
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
Signed-off-by: Sricha
From: R Sricharan
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller
property and ti,irqs-safe-map property to
crossbar dt node.
[V4] Introduced macros MAX_SOURCES and DIRECT_IRQ
R Sricharan (2):
arm: dts: dra7: add routable-irqs property for gic node
arm: dts: dra7: add crossbar device binding
arch/arm/boot/dts/dra7.dts
From: Nishanth Menon
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh
-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers
quirky hardware with direct hardwiring
of GIC
Sricharan R (2):
irqchip: crossbar: Set cb pointer to null in case of error
irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
.../devicetree/bindings/arm/omap/crossbar.txt | 36 +
drivers/irqchip
From: Nishanth Menon
crossbar_of_init always returns -ENOMEM in case of errors.
There can be other causes of failure like invalid data from
DT. So return a appropriate error value for that case.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers
From: Nishanth Menon
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers
, GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4
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