Linus Torvalds wrote:
In particular, I don't see why you didn't just put this in the generic
calibrate_delay() routine. You seem to have basically duplicated it, and
added the "guess from an external timer" code - and I don't see what's
non-generic about that, except for some trivial "what's
Venkatesh Pallipadi wrote:
(0) Estimate a value for loops_per_jiffy
(1) While (loops_per_jiffy estimate is accurate enough)
(2) wait for jiffy transition (jiffy1)
(3) Note down current tsc (tsc1)
(4) loop until tsc becomes tsc1 + loops_per_jiffy
(5) check whether jiffy changed since jiffy1
On Fri, 28 Jan 2005, Venkatesh Pallipadi wrote:
>
> Current tsc based delay_calibration can result in significant errors in
> loops_per_jiffy count when the platform events like SMIs (System
> Management Interrupts that are non-maskable) are present. This could
> lead to potential kernel
>-Original Message-
>From: Andi Kleen [mailto:[EMAIL PROTECTED]
>Sent: Friday, January 28, 2005 10:24 PM
>To: Pallipadi, Venkatesh
>Cc: Seth, Rohit; Mallick, Asit K;
>linux-kernel@vger.kernel.org; [EMAIL PROTECTED]
>Subject: Re: [Discuss][i386] Platform SMIs and
>-Original Message-
>From: Andrew Morton [mailto:[EMAIL PROTECTED]
>Subject: Re: [Discuss][i386] Platform SMIs and their
>interferance with tsc based delay calibration
>
>
>Please don't send emails which contain 500-column lines?
Sorry. Something got messed up
-Original Message-
From: Andrew Morton [mailto:[EMAIL PROTECTED]
Subject: Re: [Discuss][i386] Platform SMIs and their
interferance with tsc based delay calibration
Please don't send emails which contain 500-column lines?
Sorry. Something got messed up during cut and paste onto my
-Original Message-
From: Andi Kleen [mailto:[EMAIL PROTECTED]
Sent: Friday, January 28, 2005 10:24 PM
To: Pallipadi, Venkatesh
Cc: Seth, Rohit; Mallick, Asit K;
linux-kernel@vger.kernel.org; [EMAIL PROTECTED]
Subject: Re: [Discuss][i386] Platform SMIs and their
interferance with tsc
On Fri, 28 Jan 2005, Venkatesh Pallipadi wrote:
Current tsc based delay_calibration can result in significant errors in
loops_per_jiffy count when the platform events like SMIs (System
Management Interrupts that are non-maskable) are present. This could
lead to potential kernel panic().
Venkatesh Pallipadi <[EMAIL PROTECTED]> writes:
> +
> + /*
> + * If the upper limit and lower limit of the tsc_rate is more than
> + * 12.5% apart.
> + */
> + if (pre_start == 0 || pre_end == 0 ||
> + (tsc_rate_max - tsc_rate_min) > (tsc_rate_max >> 3)) {
> +
Please don't send emails which contain 500-column lines?
Venkatesh Pallipadi <[EMAIL PROTECTED]> wrote:
>
> Current tsc based delay_calibration can result in significant errors in
> loops_per_jiffy count when the platform events like SMIs (System Management
> Interrupts that are non-maskable)
Issue:
Current tsc based delay_calibration can result in significant errors in
loops_per_jiffy count when the platform events like SMIs (System Management
Interrupts that are non-maskable) are present. This could lead to potential
kernel panic(). This issue is becoming more visible with 2.6
Issue:
Current tsc based delay_calibration can result in significant errors in
loops_per_jiffy count when the platform events like SMIs (System Management
Interrupts that are non-maskable) are present. This could lead to potential
kernel panic(). This issue is becoming more visible with 2.6
Please don't send emails which contain 500-column lines?
Venkatesh Pallipadi [EMAIL PROTECTED] wrote:
Current tsc based delay_calibration can result in significant errors in
loops_per_jiffy count when the platform events like SMIs (System Management
Interrupts that are non-maskable) are
Venkatesh Pallipadi [EMAIL PROTECTED] writes:
+
+ /*
+ * If the upper limit and lower limit of the tsc_rate is more than
+ * 12.5% apart.
+ */
+ if (pre_start == 0 || pre_end == 0 ||
+ (tsc_rate_max - tsc_rate_min) (tsc_rate_max 3)) {
+
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