Hi Greg,
On 05/04/2018 11:15 PM, Greg KH wrote:
On Tue, May 01, 2018 at 11:26:04AM +0100, Suzuki K Poulose wrote:
commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
...
Note: The upstream commit is on top of a reworked capability
infrastructure for arm64 heterogeneous systems,
Hi Greg,
On 05/04/2018 11:15 PM, Greg KH wrote:
On Tue, May 01, 2018 at 11:26:04AM +0100, Suzuki K Poulose wrote:
commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
...
Note: The upstream commit is on top of a reworked capability
infrastructure for arm64 heterogeneous systems,
On Tue, May 01, 2018 at 11:26:04AM +0100, Suzuki K Poulose wrote:
> commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
>
> Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
> from an erratum 1024718, which causes incorrect updates when DBM/AP
> bits in a page table entry is
On Tue, May 01, 2018 at 11:26:04AM +0100, Suzuki K Poulose wrote:
> commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
>
> Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
> from an erratum 1024718, which causes incorrect updates when DBM/AP
> bits in a page table entry is
commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
from an erratum 1024718, which causes incorrect updates when DBM/AP
bits in a page table entry is modified without a break-before-make
sequence. The work around is to
commit ece1397cbc89c51914fae1aec729539cfd8bd62b upstream
Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
from an erratum 1024718, which causes incorrect updates when DBM/AP
bits in a page table entry is modified without a break-before-make
sequence. The work around is to
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