On 05/20/2013 07:39 PM, Jongsung Kim wrote:
> Jongsung Kim :
>> Stephen Warren :
All r1p5 have 32-byte FIFO depth and it's not configurable. From the
PL011
TRM:
r1p4-r1p5 Contains the following differences in functionality:
* The receive and transmit FIF
Jongsung Kim :
> Stephen Warren :
>>> All r1p5 have 32-byte FIFO depth and it's not configurable. From the
>>> PL011
>>> TRM:
>>>
>>> r1p4-r1p5 Contains the following differences in functionality:
>>> * The receive and transmit FIFOs are increased to a depth of
32.
>>>
Stephen Warren :
>> All r1p5 have 32-byte FIFO depth and it's not configurable. From the
PL011
>> TRM:
>>
>> r1p4-r1p5Contains the following differences in functionality:
>> * The receive and transmit FIFOs are increased to a depth of
32.
>> * The Revision field in t
On Tue, May 14, 2013 at 10:59:58PM -0600, Stephen Warren wrote:
> Well, that certainly isn't true in practice. I think we should revert
> this commit until we can determine what the problem is.
>
> I validated that the periphid register in HW contains the r1p5 revision
> (3), and the pcellid regis
On 05/14/2013 07:00 PM, Jongsung Kim wrote:
> Stephen Warren :
>> Looking at BCM2835-ARM-Peripherals.pdf (i.e. the public documentation for
>> the BCM2835 chip), I see:
>>
>> =
>> The UART provides:
>> * Separate 16x8 transmit and 16x12 receive FIFO memory.
>> ...
>> For the in-depth UART over
Stephen Warren :
> Looking at BCM2835-ARM-Peripherals.pdf (i.e. the public documentation for
> the BCM2835 chip), I see:
>
> =
> The UART provides:
> * Separate 16x8 transmit and 16x12 receive FIFO memory.
> ...
> For the in-depth UART overview, please, refer to the ARM PrimeCell UART
> (PL011
On Tue, May 14, 2013 at 03:03:14PM -0600, Stephen Warren wrote:
> On 05/14/2013 01:15 AM, Jongsung Kim wrote:
> > Stephen Warren :
> >> For reference, the AMBA periphid of the UART device there is 0x00341011.
> >> The nibble "3" is the revision being tested in:
> >
> > The UART device has periphi
On 05/14/2013 01:15 AM, Jongsung Kim wrote:
> Stephen Warren :
>> For reference, the AMBA periphid of the UART device there is 0x00341011.
>> The nibble "3" is the revision being tested in:
>
> The UART device has periphid 0x00341011, and is compatible with the
> original PL011 prior to r1p5. Not
Stephen Warren :
> For reference, the AMBA periphid of the UART device there is 0x00341011.
> The nibble "3" is the revision being tested in:
The UART device has periphid 0x00341011, and is compatible with the
original PL011 prior to r1p5. Not with r1p5. It could be a possible
way to specify the
On 04/12/2013 03:18 AM, Jongsung Kim wrote:
> The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs, while all
> earlier ones have 16-byte FIFOs. This patch suggests a way to set the
> FIFO-size correctly & flexibly by using a
> function(vendor_data::get_fifosize) rather than using the
>
On Mon, Apr 22, 2013 at 11:24:18AM +0900, Jongsung Kim wrote:
> Thank you for your comments, Russell. I'll happily apply your recommendation
> just after it come up to the merge window. Or, do you want me to send it by
> now?
Sorry, don't understand what you're asking, could you rephrase please?
-
PM
To: Jongsung Kim
Cc: gre...@linuxfoundation.org; jsl...@suse.cz; linux-ser...@vger.kernel.org;
linux-kernel@vger.kernel.org
Subject: Re: [RESEND][PATCH] ARM: PL011: add support for extended FIFO-size of
PL011-r1p5
On Mon, Apr 15, 2013 at 02:45:25PM +0900, Jongsung Kim wrote:
> The latest r1p5-revisio
On Sat, Apr 20, 2013 at 03:31:39PM +0200, Linus Walleij wrote:
> static struct amba_id pl011_ids[] = {
> {
> .id = 0x00341011,
> .mask = 0x00ff,
> .data = &vendor_arm_deepfifo,
> },
> (...)
> };
>
> As you can see in amba_
On Mon, Apr 15, 2013 at 7:45 AM, Jongsung Kim wrote:
At the risk to re-stating what Russell has already said...
> +
> + unsigned int (*get_fifosize)(unsigned int periphid);
> };
>
> +static unsigned int get_fifosize_arm(unsigned int periphid)
> +{
> + unsigned int rev = (periphid >>
On Mon, Apr 15, 2013 at 02:45:25PM +0900, Jongsung Kim wrote:
> The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs,
> while all earlier ones have 16-byte FIFOs. This patch suggests
> a way to set the FIFO-size correctly & flexibly by using a member
> function named get_fifosize, rathe
On Fri, Apr 12, 2013 at 06:18:47PM +0900, Jongsung Kim wrote:
> +static unsigned int get_fifosize_arm(unsigned int periphid)
> +{
> + unsigned int rev = (periphid >> 20) & 0xf;
> + return rev < 3 ? 16 : 32;
Don't we have a macro to get the revision given the amba device?
amba_rev().
--
To
The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs,
while all earlier ones have 16-byte FIFOs. This patch suggests
a way to set the FIFO-size correctly & flexibly by using a member
function named get_fifosize, rather than using the fifosize member
variable. The function takes the UART
The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs, while all
earlier ones have 16-byte FIFOs. This patch suggests a way to set the
FIFO-size correctly & flexibly by using a
function(vendor_data::get_fifosize) rather than using the
vendor_data::fifosize variable. The function takes th
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