Re: [PATCH] clk: imx8mq: Correct the pcie1 sels

2021-03-30 Thread Stephen Boyd
Quoting Richard Zhu (2021-03-15 01:17:48) > - The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock. > Change the sys2_pll_500m to sys2_pll_50m. > - Correct one mis-spell of the imx8mq_pcie1_ctrl_sels definition, from > "sys2_pll_250m" to "sys2_pll_333m". > > Signed-off-by: Richard Zh

Re: [PATCH] clk: imx8mq: Correct the pcie1 sels

2021-03-30 Thread Abel Vesa
On 21-03-15 16:17:48, Richard Zhu wrote: > - The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock. > Change the sys2_pll_500m to sys2_pll_50m. > - Correct one mis-spell of the imx8mq_pcie1_ctrl_sels definition, from > "sys2_pll_250m" to "sys2_pll_333m". > > Signed-off-by: Richard Zhu

[PATCH] clk: imx8mq: Correct the pcie1 sels

2021-03-15 Thread Richard Zhu
- The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock. Change the sys2_pll_500m to sys2_pll_50m. - Correct one mis-spell of the imx8mq_pcie1_ctrl_sels definition, from "sys2_pll_250m" to "sys2_pll_333m". Signed-off-by: Richard Zhu --- drivers/clk/imx/clk-imx8mq.c | 4 ++-- 1 file

[PATCH] clk: imx8mq: Correct the pcie1 sels

2021-03-15 Thread Richard Zhu
- The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock, Change the sys2_pll_500m to sys2_pll_50m. - Correct one mis-spell of the imx8mq_pcie1_ctrl_sels definition, from "sys2_pll_250m" to "sys2_pll_333m". Signed-off-by: Richard Zhu --- drivers/clk/imx/clk-imx8mq.c | 4 ++-- 1 file