On Fri, Apr 21, 2017 at 07:38:48PM -0700, Stephen Boyd wrote:
> On 04/20, Peter De Schrijver wrote:
> > PLL SS was only controlled when setting the PLL rate, not when the PLL
> > itself is enabled or disabled. This means that if the PLL rate was set
> > before the PLL is enabled, SS will not be ena
On 04/20, Peter De Schrijver wrote:
> PLL SS was only controlled when setting the PLL rate, not when the PLL
> itself is enabled or disabled. This means that if the PLL rate was set
> before the PLL is enabled, SS will not be enabled, even when configured.
>
> Signed-off-by: Peter De Schrijver
F
PLL SS was only controlled when setting the PLL rate, not when the PLL
itself is enabled or disabled. This means that if the PLL rate was set
before the PLL is enabled, SS will not be enabled, even when configured.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-pll.c | 44 ++
PLL SS was only controlled when setting the PLL rate, not when the PLL
itself is enabled or disabled. This means that if the PLL rate was set
before the PLL is enabled, SS will not be enabled, even when configured.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-pll.c | 44 ++
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