[PATCH] clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2

From: Vince Hsu Tegra114 has a HW bug where the PLLD/PLLD2 lock bit cannot be asserted while turning on the Display power domain and before the clamp to this domain has been removed. This issue causes a timeout and aborts the power up sequence, even though the PLLD/PLLD2 has already locked. To

[PATCH] clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2

From: Vince Hsu vin...@nvidia.com Tegra114 has a HW bug where the PLLD/PLLD2 lock bit cannot be asserted while turning on the Display power domain and before the clamp to this domain has been removed. This issue causes a timeout and aborts the power up sequence, even though the PLLD/PLLD2 has