Re: [PATCH] counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register

2021-03-06 Thread Jonathan Cameron
On Thu, 4 Mar 2021 08:42:03 +0900 William Breathitt Gray wrote: > On Wed, Mar 03, 2021 at 06:49:49PM +0100, Fabrice Gasnier wrote: > > Ceiling value may be miss-aligned with what's actually configured into the > > ARR register. This is seen after probe as currently the ARR value is zero, > > wher

Re: [PATCH] counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register

2021-03-03 Thread William Breathitt Gray
On Wed, Mar 03, 2021 at 06:49:49PM +0100, Fabrice Gasnier wrote: > Ceiling value may be miss-aligned with what's actually configured into the > ARR register. This is seen after probe as currently the ARR value is zero, > whereas ceiling value is set to the maximum. So: > - reading ceiling reports z

[PATCH] counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register

2021-03-03 Thread Fabrice Gasnier
Ceiling value may be miss-aligned with what's actually configured into the ARR register. This is seen after probe as currently the ARR value is zero, whereas ceiling value is set to the maximum. So: - reading ceiling reports zero - in case the counter gets enabled without any prior configuration,