On Sun, Sep 06, 2020 at 06:18:07AM +, Dingtianhong wrote:
[...]
> > On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
> >> The hisilicon ascend soc's gpio is based on the synopsys DW gpio,
> >> and expand the register to support for INTCOMB_MASK, the new
> >> register is used to
On Thu, Aug 27, 2020 at 10:20 AM Andy Shevchenko
wrote:
>
> On Tue, Aug 25, 2020 at 12:58 PM Serge Semin wrote:
> > On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
>
> > BTW Linus, could you take a look at my series? Andy and Rob have finished
> > reviewing
> > it almost a month
On Thu, Aug 27, 2020 at 10:20 AM Andy Shevchenko
wrote:
> On Tue, Aug 25, 2020 at 12:58 PM Serge Semin wrote:
> > On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
>
> > BTW Linus, could you take a look at my series? Andy and Rob have finished
> > reviewing
> > it almost a month
On Tue, Aug 25, 2020 at 12:58 PM Serge Semin wrote:
> On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
> BTW Linus, could you take a look at my series? Andy and Rob have finished
> reviewing
> it almost a month ago.
I was wondering the same, but in normal cases (not closer to the
Hello Ding,
Thanks for the patch. My comments are below.
On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
> The hisilicon ascend soc's gpio is based on the synopsys DW gpio,
> and expand the register to support for INTCOMB_MASK, the new
> register is used to enable/disable the
The hisilicon ascend soc's gpio is based on the synopsys DW gpio,
and expand the register to support for INTCOMB_MASK, the new
register is used to enable/disable the interrupt combine features.
Both support for ACPI and Device Tree.
Signed-off-by: Ding Tianhong
---
drivers/gpio/gpio-dwapb.c |
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