On Mon, Sep 22, 2014 at 02:03:51PM +0100, Russell King - ARM Linux wrote:
> On Mon, Sep 22, 2014 at 11:59:39AM +0200, Wolfram Sang wrote:
> > IRQ_NONE is "this interrupt wasn't by me" so for shared IRQs, the next
> > handler can check.
>
> Err, no it isn't. IRQ_NONE has no such effect. All
On Sat, Sep 20, 2014 at 02:12:43PM +0200, Wolfram Sang wrote:
> Hi,
>
> thanks for the submission.
>
> On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
> > Add I2C bus driver for the controller found in the LSI Axxia family SoCs.
> > The
> > driver implements 10-bit addressing and
On Mon, Sep 22, 2014 at 11:59:39AM +0200, Wolfram Sang wrote:
> IRQ_NONE is "this interrupt wasn't by me" so for shared IRQs, the next
> handler can check.
Err, no it isn't. IRQ_NONE has no such effect. All handlers on a
shared interrupt are always run irrespective of the return value from
any
On Mon, Sep 22, 2014 at 1:04 PM, Wolfram Sang wrote:
>
>> >> >> + if (msg->len == 0 || msg->len > 255)
>> >> >> + return -EINVAL;
>> >> >
>> >> > Ouch, really? Maybe we should warn the user here.
>> >>
>> >> Yeah, the transfer length register limits the length to 255. I'll add
>>
> >> >> + if (msg->len == 0 || msg->len > 255)
> >> >> + return -EINVAL;
> >> >
> >> > Ouch, really? Maybe we should warn the user here.
> >>
> >> Yeah, the transfer length register limits the length to 255. I'll add
> >> a warning here.
> >
> > Please also add this information to
On Mon, Sep 22, 2014 at 11:59 AM, Wolfram Sang wrote:
>> >> +static int
>> >> +axxia_i2c_xfer_msg(struct axxia_i2c_dev *idev, struct i2c_msg *msg)
>> >> +{
>> >> + u32 int_mask = MST_STATUS_ERR | MST_STATUS_SNS;
>> >> + u32 rx_xfer, tx_xfer;
>> >> + u32 addr_1, addr_2;
>> >> + int
On Mon, Sep 22, 2014 at 11:59 AM, Wolfram Sang wrote:
>
>> >> + if (idev->msg_xfrd == 0 && i2c_m_recv_len(msg)) {
>> >> + /*
>> >> + * Check length byte for SMBus block read
>> >> + */
>> >> + if (c <=
> >> + if (idev->msg_xfrd == 0 && i2c_m_recv_len(msg)) {
> >> + /*
> >> + * Check length byte for SMBus block read
> >> + */
> >> + if (c <= 0) {
> >> + idev->msg_err =
On Sat, Sep 20, 2014 at 2:12 PM, Wolfram Sang wrote:
> Hi,
>
> thanks for the submission.
Sure. Thanks for the comments. I'll update the patch and submit a v2.
>
> On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
>> Add I2C bus driver for the controller found in the LSI Axxia family
On Sat, Sep 20, 2014 at 2:12 PM, Wolfram Sang w...@the-dreams.de wrote:
Hi,
thanks for the submission.
Sure. Thanks for the comments. I'll update the patch and submit a v2.
On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
Add I2C bus driver for the controller found in the LSI
+ if (idev-msg_xfrd == 0 i2c_m_recv_len(msg)) {
+ /*
+ * Check length byte for SMBus block read
+ */
+ if (c = 0) {
+ idev-msg_err = -EPROTO;
+
On Mon, Sep 22, 2014 at 11:59 AM, Wolfram Sang w...@the-dreams.de wrote:
+ if (idev-msg_xfrd == 0 i2c_m_recv_len(msg)) {
+ /*
+ * Check length byte for SMBus block read
+ */
+ if (c = 0) {
+
On Mon, Sep 22, 2014 at 11:59 AM, Wolfram Sang w...@the-dreams.de wrote:
+static int
+axxia_i2c_xfer_msg(struct axxia_i2c_dev *idev, struct i2c_msg *msg)
+{
+ u32 int_mask = MST_STATUS_ERR | MST_STATUS_SNS;
+ u32 rx_xfer, tx_xfer;
+ u32 addr_1, addr_2;
+ int ret;
+
+ if (msg-len == 0 || msg-len 255)
+ return -EINVAL;
Ouch, really? Maybe we should warn the user here.
Yeah, the transfer length register limits the length to 255. I'll add
a warning here.
Please also add this information to the Kconfig description and
On Mon, Sep 22, 2014 at 1:04 PM, Wolfram Sang w...@the-dreams.de wrote:
+ if (msg-len == 0 || msg-len 255)
+ return -EINVAL;
Ouch, really? Maybe we should warn the user here.
Yeah, the transfer length register limits the length to 255. I'll add
a warning here.
On Mon, Sep 22, 2014 at 11:59:39AM +0200, Wolfram Sang wrote:
IRQ_NONE is this interrupt wasn't by me so for shared IRQs, the next
handler can check.
Err, no it isn't. IRQ_NONE has no such effect. All handlers on a
shared interrupt are always run irrespective of the return value from
any
On Sat, Sep 20, 2014 at 02:12:43PM +0200, Wolfram Sang wrote:
Hi,
thanks for the submission.
On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
Add I2C bus driver for the controller found in the LSI Axxia family SoCs.
The
driver implements 10-bit addressing and SMBus
On Mon, Sep 22, 2014 at 02:03:51PM +0100, Russell King - ARM Linux wrote:
On Mon, Sep 22, 2014 at 11:59:39AM +0200, Wolfram Sang wrote:
IRQ_NONE is this interrupt wasn't by me so for shared IRQs, the next
handler can check.
Err, no it isn't. IRQ_NONE has no such effect. All handlers on a
Hi,
thanks for the submission.
On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
> Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The
> driver implements 10-bit addressing and SMBus transfer modes via emulation
> (including SMBus block data read).
>
>
Hi,
thanks for the submission.
On Mon, Aug 25, 2014 at 01:51:22PM +0200, Anders Berg wrote:
Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The
driver implements 10-bit addressing and SMBus transfer modes via emulation
(including SMBus block data read).
Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The
driver implements 10-bit addressing and SMBus transfer modes via emulation
(including SMBus block data read).
Signed-off-by: Anders Berg
---
.../devicetree/bindings/i2c/i2c-axxia.txt | 30 ++
Add I2C bus driver for the controller found in the LSI Axxia family SoCs. The
driver implements 10-bit addressing and SMBus transfer modes via emulation
(including SMBus block data read).
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
.../devicetree/bindings/i2c/i2c-axxia.txt
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