Hi Jason,
On 07/18/2014 04:50 PM, Santosh Shilimkar wrote:
> On Friday 18 July 2014 08:59 AM, Jason Cooper wrote:
>> Grygorii,
>>
>> On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
>>> On Keystone SOCs, DSP cores can send interrupts to ARM
>>> host using the IRQ controller IP.
Hi Jason,
On 07/18/2014 04:50 PM, Santosh Shilimkar wrote:
On Friday 18 July 2014 08:59 AM, Jason Cooper wrote:
Grygorii,
On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
On Keystone SOCs, DSP cores can send interrupts to ARM
host using the IRQ controller IP. It provides
Hi Jason,
On Friday 18 July 2014 08:59 AM, Jason Cooper wrote:
> Grygorii,
>
> On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
>> On Keystone SOCs, DSP cores can send interrupts to ARM
>> host using the IRQ controller IP. It provides 28 IRQ
>> signals to ARM. The IRQ handler
Grygorii,
On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
> On Keystone SOCs, DSP cores can send interrupts to ARM
> host using the IRQ controller IP. It provides 28 IRQ
> signals to ARM. The IRQ handler running on HOST OS can
> identify DSP signal source by analyzing SRCCx
Grygorii,
On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
On Keystone SOCs, DSP cores can send interrupts to ARM
host using the IRQ controller IP. It provides 28 IRQ
signals to ARM. The IRQ handler running on HOST OS can
identify DSP signal source by analyzing SRCCx bits in
Hi Jason,
On Friday 18 July 2014 08:59 AM, Jason Cooper wrote:
Grygorii,
On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
On Keystone SOCs, DSP cores can send interrupts to ARM
host using the IRQ controller IP. It provides 28 IRQ
signals to ARM. The IRQ handler running on
On Keystone SOCs, DSP cores can send interrupts to ARM
host using the IRQ controller IP. It provides 28 IRQ
signals to ARM. The IRQ handler running on HOST OS can
identify DSP signal source by analyzing SRCCx bits in
IPCARx registers. This is one of the component used by
the IPC mechanism used on
On Keystone SOCs, DSP cores can send interrupts to ARM
host using the IRQ controller IP. It provides 28 IRQ
signals to ARM. The IRQ handler running on HOST OS can
identify DSP signal source by analyzing SRCCx bits in
IPCARx registers. This is one of the component used by
the IPC mechanism used on
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