On Thu, Apr 21, 2016 at 12:39 PM, Babu Moger wrote:
> Hi Alex,
>
> On 4/21/2016 2:22 PM, Alexander Duyck wrote:
>> On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
>> wrote:
>>> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger
On Thu, Apr 21, 2016 at 12:39 PM, Babu Moger wrote:
> Hi Alex,
>
> On 4/21/2016 2:22 PM, Alexander Duyck wrote:
>> On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
>> wrote:
>>> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
Current code writes the tx/rx relaxed order without reading
Hi Alex,
On 4/21/2016 2:22 PM, Alexander Duyck wrote:
> On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
> wrote:
>> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
>>> Current code writes the tx/rx relaxed order without reading it first.
Hi Alex,
On 4/21/2016 2:22 PM, Alexander Duyck wrote:
> On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
> wrote:
>> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
>>> Current code writes the tx/rx relaxed order without reading it first.
>>> This can lead to unintended consequences as we
On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
wrote:
> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
>> Current code writes the tx/rx relaxed order without reading it first.
>> This can lead to unintended consequences as we are forcibly
On Thu, Apr 21, 2016 at 11:13 AM, Alexander Duyck
wrote:
> On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
>> Current code writes the tx/rx relaxed order without reading it first.
>> This can lead to unintended consequences as we are forcibly writing
>> other bits.
>
> The consequences were
On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
> Current code writes the tx/rx relaxed order without reading it first.
> This can lead to unintended consequences as we are forcibly writing
> other bits.
The consequences were very much intended as there are situations
On Thu, Apr 21, 2016 at 10:21 AM, Babu Moger wrote:
> Current code writes the tx/rx relaxed order without reading it first.
> This can lead to unintended consequences as we are forcibly writing
> other bits.
The consequences were very much intended as there are situations where
enabling relaxed
Current code writes the tx/rx relaxed order without reading it first.
This can lead to unintended consequences as we are forcibly writing
other bits.
We noticed this problem while testing VF driver on sparc. Relaxed
order settings for rx queue were all messed up which was causing
performance drop
Current code writes the tx/rx relaxed order without reading it first.
This can lead to unintended consequences as we are forcibly writing
other bits.
We noticed this problem while testing VF driver on sparc. Relaxed
order settings for rx queue were all messed up which was causing
performance drop
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