Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 07/31/2014 03:01 PM, Addy Ke wrote:
> This patch focuses on clock setting for RK3288 mmc controller.
>
> In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
> and if DDR 8bit mode, CLKDIV register must be set 1.
>
>
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon Chung
On 07/31/2014 03:01 PM, Addy Ke wrote:
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Reported-by Doug Anderson
Suggested-by: Jaehoon Chung
Suggested-by: Doug Anderson
Signed-off-by: Addy Ke
---
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Reported-by Doug Anderson diand...@chromium.org
Suggested-by: Jaehoon Chung jh80.ch...@samsung.com
Suggested-by:
> Hi, Addy,
>
> On 07/05/2014 09:59 PM, addy ke wrote:
>> This patch focuses on clock setting for RK3288 mmc controller.
>>
>> In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
>> and if DDR 8bit mode, CLKDIV register must be set 1.
>>
>> Signed-off-by: addy ke
>> ---
>>
Hi, Addy,
On 07/05/2014 09:59 PM, addy ke wrote:
> This patch focuses on clock setting for RK3288 mmc controller.
>
> In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
> and if DDR 8bit mode, CLKDIV register must be set 1.
>
> Signed-off-by: addy ke
> ---
>
Hi, Addy,
On 07/05/2014 09:59 PM, addy ke wrote:
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: addy ke addy...@rock-chips.com
---
Hi, Addy,
On 07/05/2014 09:59 PM, addy ke wrote:
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: addy ke addy...@rock-chips.com
---
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: addy ke
---
.../devicetree/bindings/mmc/rockchip-dw-mshc.txt | 4 +-
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: addy ke addy...@rock-chips.com
---
.../devicetree/bindings/mmc/rockchip-dw-mshc.txt | 4 +-
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