Re: [PATCH] mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection

2017-03-30 Thread Ulf Hansson
On 28 March 2017 at 11:00, Ludovic Desroches wrote: > The controller has different timings for MMC_TIMING_UHS_DDR50 and > MMC_TIMING_MMC_DDR52. Configuring the controller with SDHCI_CTRL_UHS_DDR50, > when MMC_TIMING_MMC_DDR52 timings are requested, is not correct

Re: [PATCH] mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection

2017-03-30 Thread Ulf Hansson
On 28 March 2017 at 11:00, Ludovic Desroches wrote: > The controller has different timings for MMC_TIMING_UHS_DDR50 and > MMC_TIMING_MMC_DDR52. Configuring the controller with SDHCI_CTRL_UHS_DDR50, > when MMC_TIMING_MMC_DDR52 timings are requested, is not correct and can > lead to unexpected

[PATCH] mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection

2017-03-28 Thread Ludovic Desroches
The controller has different timings for MMC_TIMING_UHS_DDR50 and MMC_TIMING_MMC_DDR52. Configuring the controller with SDHCI_CTRL_UHS_DDR50, when MMC_TIMING_MMC_DDR52 timings are requested, is not correct and can lead to unexpected behavior. Signed-off-by: Ludovic Desroches

[PATCH] mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection

2017-03-28 Thread Ludovic Desroches
The controller has different timings for MMC_TIMING_UHS_DDR50 and MMC_TIMING_MMC_DDR52. Configuring the controller with SDHCI_CTRL_UHS_DDR50, when MMC_TIMING_MMC_DDR52 timings are requested, is not correct and can lead to unexpected behavior. Signed-off-by: Ludovic Desroches Fixes: bb5f8ea4d514