From: Sebastian Hesselbarth
Date: Sun, 7 Apr 2013 13:09:47 +0200
> Marvell mdio driver uses internal registers that can be clock gated on
> some SoCs. This patch just adds optional clock handling, to allow to pass
> and enable the corresponding clock.
>
> Signed-off-by: Sebastian Hesselbarth
Le 04/07/13 13:09, Sebastian Hesselbarth a écrit :
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth
Looks good to me:
Le 04/07/13 13:09, Sebastian Hesselbarth a écrit :
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth
From: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
Date: Sun, 7 Apr 2013 13:09:47 +0200
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth
---
Cc: "David S. Miller"
Cc: Florian Fainelli
Cc: Thomas Petazzoni
Cc:
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: David S. Miller da...@davemloft.net
Cc:
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