Re: [PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register.

2017-09-15 Thread Andrew Lunn
> Can you please point me to that email? I assume you can search the email lists just as well as i can. Andrew

Re: [PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register.

2017-09-15 Thread Michal Simek
On 14.9.2017 16:34, Andrew Lunn wrote: > On Thu, Sep 14, 2017 at 12:46:31PM +0530, Fahad Kunnathadi wrote: >> To clear Speed Selection in MDIO control register(0x10), >> ie, clear bits 6 and 13 to zero while keeping other bits same. >> Before AND operation,The Mask value has to be perform with bitw

Re: [PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register.

2017-09-15 Thread Fahad Kunnathadi
quot; , net...@vger.kernel.org, "Michal Simek" , linux-kernel@vger.kernel.org, "soren brinkmann" , linux-arm-ker...@lists.infradead.org Sent: Thursday, September 14, 2017 8:04:54 PM Subject: Re: [PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register. On Thu,

Re: [PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register.

2017-09-14 Thread Andrew Lunn
On Thu, Sep 14, 2017 at 12:46:31PM +0530, Fahad Kunnathadi wrote: > To clear Speed Selection in MDIO control register(0x10), > ie, clear bits 6 and 13 to zero while keeping other bits same. > Before AND operation,The Mask value has to be perform with bitwise NOT > operation (ie, ~ operator) > > Th

[PATCH] net: phy: Fix mask value write on gmii2rgmii converter speed register.

2017-09-14 Thread Fahad Kunnathadi
To clear Speed Selection in MDIO control register(0x10), ie, clear bits 6 and 13 to zero while keeping other bits same. Before AND operation,The Mask value has to be perform with bitwise NOT operation (ie, ~ operator) This patch clears current speed selection before writing the new speed settings