From: Filip Kokosinski <fkokosin...@antmicro.com>
This adds support for a basic LiteX-based SoC with a mor1kx soft CPU.
Signed-off-by: Filip Kokosinski <fkokosin...@antmicro.com>
Signed-off-by: Mateusz Holenko <mhole...@antmicro.com>
[shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.]
Signed-off-by: Stafford Horne <sho...@gmail.com>
---
MAINTAINERS | 1 +
arch/openrisc/boot/dts/or1klitex.dts | 55 +++++++++++++++++++++++
arch/openrisc/configs/or1klitex_defconfig | 18 ++++++++
3 files changed, 74 insertions(+)
create mode 100644 arch/openrisc/boot/dts/or1klitex.dts
create mode 100644 arch/openrisc/configs/or1klitex_defconfig
diff --git a/MAINTAINERS b/MAINTAINERS
index 0b1f39b3938d..9c55a54c9673 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10177,6 +10177,7 @@ M: Karol Gugala <kgug...@antmicro.com>
M: Mateusz Holenko <mhole...@antmicro.com>
S: Maintained
F: Documentation/devicetree/bindings/*/litex,*.yaml
+F: arch/openrisc/boot/dts/or1klitex.dts
F: drivers/soc/litex/litex_soc_ctrl.c
F: drivers/tty/serial/liteuart.c
F: include/linux/litex.h
diff --git a/arch/openrisc/boot/dts/or1klitex.dts
b/arch/openrisc/boot/dts/or1klitex.dts
new file mode 100644
index 000000000000..3f9867aa3844
--- /dev/null
+++ b/arch/openrisc/boot/dts/or1klitex.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * LiteX-based System on Chip
+ *
+ * Copyright (C) 2019 Antmicro <www.antmicro.com>
+ */
+
+/dts-v1/;
+/ {
+ compatible = "opencores,or1ksim";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&pic>;
+
+ aliases {
+ serial0 = &serial0;
+ };
+
+ chosen {
+ bootargs = "console=liteuart";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "opencores,or1200-rtlsvn481";
+ reg = <0>;
+ clock-frequency = <100000000>;
+ };
+ };
+
+ pic: pic {
+ compatible = "opencores,or1k-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ serial0: serial@e0002000 {
+ device_type = "serial";
+ compatible = "litex,liteuart";
+ reg = <0xe0002000 0x100>;
+ };
+
+ soc_ctrl0: soc_controller@e0000000 {
+ compatible = "litex,soc-controller";
+ reg = <0xe0000000 0xc>;
+ status = "okay";
+ };
+};
diff --git a/arch/openrisc/configs/or1klitex_defconfig
b/arch/openrisc/configs/or1klitex_defconfig
new file mode 100644
index 000000000000..3c2c70d3d740
--- /dev/null
+++ b/arch/openrisc/configs/or1klitex_defconfig
@@ -0,0 +1,18 @@
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BUG_ON_DATA_CORRUPTION=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_EMBEDDED=y
+CONFIG_HZ_100=y
+CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"
+CONFIG_OF_OVERLAY=y
+CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PRINTK_TIME=y
+CONFIG_LITEX_SOC_CONTROLLER=y
+CONFIG_SERIAL_LITEUART=y
+CONFIG_SERIAL_LITEUART_CONSOLE=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_TTY_PRINTK=y
--
2.26.2
