Hi Jason,
On Fri, Feb 21, 2014 at 9:58 PM, Jason Gunthorpe
wrote:
> On Fri, Feb 21, 2014 at 08:18:00PM +0530, Srikanth Thokala wrote:
>
>> 00:00.0 Class 0604: Device 10ee:7081
>
> So this is great, a root port bridge is exactly correct - I would
> recommend using device 1 for this (device 0 is
Hi Jason,
On Fri, Feb 21, 2014 at 9:58 PM, Jason Gunthorpe
jguntho...@obsidianresearch.com wrote:
On Fri, Feb 21, 2014 at 08:18:00PM +0530, Srikanth Thokala wrote:
00:00.0 Class 0604: Device 10ee:7081
So this is great, a root port bridge is exactly correct - I would
recommend using device 1
On Fri, Feb 21, 2014 at 08:18:00PM +0530, Srikanth Thokala wrote:
> 00:00.0 Class 0604: Device 10ee:7081
So this is great, a root port bridge is exactly correct - I would
recommend using device 1 for this (device 0 is the host bridge in most
cases), but I don't think that has any functional
On Thu, Feb 20, 2014 at 11:15 PM, Jason Gunthorpe
wrote:
> On Thu, Feb 20, 2014 at 12:39:48PM +0530, Srikanth Thokala wrote:
>
>> > These should use the standard ranges mechanism for translations and
>> > apertures.
>>
>> This AXI PCIe bridge IP do have two kind of BARs AXI-to-PCIe BAR and
>>
On Thu, Feb 20, 2014 at 11:15 PM, Jason Gunthorpe
jguntho...@obsidianresearch.com wrote:
On Thu, Feb 20, 2014 at 12:39:48PM +0530, Srikanth Thokala wrote:
These should use the standard ranges mechanism for translations and
apertures.
This AXI PCIe bridge IP do have two kind of BARs
On Fri, Feb 21, 2014 at 08:18:00PM +0530, Srikanth Thokala wrote:
00:00.0 Class 0604: Device 10ee:7081
So this is great, a root port bridge is exactly correct - I would
recommend using device 1 for this (device 0 is the host bridge in most
cases), but I don't think that has any functional
On Thu, Feb 20, 2014 at 12:39:48PM +0530, Srikanth Thokala wrote:
> > These should use the standard ranges mechanism for translations and
> > apertures.
>
> This AXI PCIe bridge IP do have two kind of BARs AXI-to-PCIe BAR and
> PCIe-to-AXI BAR. The former specifies the AXI Base address and are
On Thu, Feb 20, 2014 at 12:39:48PM +0530, Srikanth Thokala wrote:
These should use the standard ranges mechanism for translations and
apertures.
This AXI PCIe bridge IP do have two kind of BARs AXI-to-PCIe BAR and
PCIe-to-AXI BAR. The former specifies the AXI Base address and are the
On Wed, Feb 19, 2014 at 6:05 AM, Jason Gunthorpe
wrote:
> On Tue, Feb 18, 2014 at 02:32:58PM -0700, Bjorn Helgaas wrote:
>> [+cc Arnd]
>>
>> On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala wrote:
>> > This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>> >
>> > Signed-off-by: Srikanth
On 02/18/2014 10:32 PM, Bjorn Helgaas wrote:
> [+cc Arnd]
>
> On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala wrote:
>> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>>
>> Signed-off-by: Srikanth Thokala
>> ---
>> - Rebased on v3.14.0-rc2
>> ---
>>
On 02/18/2014 10:32 PM, Bjorn Helgaas wrote:
[+cc Arnd]
On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala stho...@xilinx.com wrote:
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala stho...@xilinx.com
---
- Rebased on v3.14.0-rc2
---
On Wed, Feb 19, 2014 at 6:05 AM, Jason Gunthorpe
jguntho...@obsidianresearch.com wrote:
On Tue, Feb 18, 2014 at 02:32:58PM -0700, Bjorn Helgaas wrote:
[+cc Arnd]
On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala stho...@xilinx.com wrote:
This is the driver for Xilinx AXI PCIe Host Bridge
On Tue, Feb 18, 2014 at 02:32:58PM -0700, Bjorn Helgaas wrote:
> [+cc Arnd]
>
> On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala wrote:
> > This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
> >
> > Signed-off-by: Srikanth Thokala
> > - Rebased on v3.14.0-rc2
> >
[+cc Arnd]
On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala wrote:
> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>
> Signed-off-by: Srikanth Thokala
> ---
> - Rebased on v3.14.0-rc2
> ---
> .../devicetree/bindings/pci/xilinx-pcie.txt| 43 +
> drivers/pci/host/Kconfig
[+cc Arnd]
On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala stho...@xilinx.com wrote:
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala stho...@xilinx.com
---
- Rebased on v3.14.0-rc2
---
.../devicetree/bindings/pci/xilinx-pcie.txt| 43 +
On Tue, Feb 18, 2014 at 02:32:58PM -0700, Bjorn Helgaas wrote:
[+cc Arnd]
On Sun, Feb 16, 2014 at 8:33 AM, Srikanth Thokala stho...@xilinx.com wrote:
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala stho...@xilinx.com
- Rebased on v3.14.0-rc2
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala
---
- Rebased on v3.14.0-rc2
---
.../devicetree/bindings/pci/xilinx-pcie.txt| 43 +
drivers/pci/host/Kconfig |7 +
drivers/pci/host/Makefile
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala stho...@xilinx.com
---
- Rebased on v3.14.0-rc2
---
.../devicetree/bindings/pci/xilinx-pcie.txt| 43 +
drivers/pci/host/Kconfig |7 +
drivers/pci/host/Makefile
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