On Tue, 21 May 2019, Wesley Terpstra wrote:
> Signed.
Thanks, will repost with that and add the PCI folks also
- Paul
Signed.
On Tue, May 21, 2019 at 1:11 AM Paul Walmsley wrote:
>
> On Mon, 20 May 2019, Christoph Hellwig wrote:
>
> > On Mon, May 20, 2019 at 11:25:28AM -0700, Paul Walmsley wrote:
> > > Some RISC-V systems include PCIe host controllers that support PCIe
> > > message-signaled interrupts. For th
On Mon, 20 May 2019, Christoph Hellwig wrote:
> On Mon, May 20, 2019 at 11:25:28AM -0700, Paul Walmsley wrote:
> > Some RISC-V systems include PCIe host controllers that support PCIe
> > message-signaled interrupts. For this to work on Linux, we need to
> > enable PCI_MSI_IRQ_DOMAIN and define st
On Mon, May 20, 2019 at 11:25:28AM -0700, Paul Walmsley wrote:
> Some RISC-V systems include PCIe host controllers that support PCIe
> message-signaled interrupts. For this to work on Linux, we need to
> enable PCI_MSI_IRQ_DOMAIN and define struct msi_alloc_info. Support
> for the latter is enabl
Some RISC-V systems include PCIe host controllers that support PCIe
message-signaled interrupts. For this to work on Linux, we need to
enable PCI_MSI_IRQ_DOMAIN and define struct msi_alloc_info. Support
for the latter is enabled by including the architecture-generic msi.h
include.
Based on a pat
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