On 12/10/2015 02:11 AM, Mark Brown wrote:
On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present
On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
This doesn't apply against,
On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
This doesn't apply against,
On 12/10/2015 02:11 AM, Mark Brown wrote:
On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
implementation CTAR offset is derived from CS instance which will
lead to out of bound access if chip
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
implementation CTAR offset is derived from CS instance which will
lead to out of bound access if chip
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