Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
> > ok, understood. I wasn't able to dig up an imx1 specification. Do you
> > know if it's publicly available?
> http://www.nxp.com/assets/documents/data/en/reference-manuals/MC9328MX1RM.pdf
Thanks.
> So you put the values to use in
Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
> > ok, understood. I wasn't able to dig up an imx1 specification. Do you
> > know if it's publicly available?
> http://www.nxp.com/assets/documents/data/en/reference-manuals/MC9328MX1RM.pdf
Thanks.
> So you put the values to use in
On Wed, Nov 23, 2016 at 10:31:13AM +0100, Martin Kaiser wrote:
> Hello Uwe, all,
>
> Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
>
> > For the MX1 which is also supported by this driver, the definitions are
> > right.
>
> ok, understood. I wasn't able to dig up an imx1
On Wed, Nov 23, 2016 at 10:31:13AM +0100, Martin Kaiser wrote:
> Hello Uwe, all,
>
> Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
>
> > For the MX1 which is also supported by this driver, the definitions are
> > right.
>
> ok, understood. I wasn't able to dig up an imx1
Hello Uwe, all,
Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
> For the MX1 which is also supported by this driver, the definitions are
> right.
ok, understood. I wasn't able to dig up an imx1 specification. Do you
know if it's publicly available?
> So this needs a more
Hello Uwe, all,
Thus wrote Uwe Kleine-König (u.kleine-koe...@pengutronix.de):
> For the MX1 which is also supported by this driver, the definitions are
> right.
ok, understood. I wasn't able to dig up an imx1 specification. Do you
know if it's publicly available?
> So this needs a more
On Tue, Nov 22, 2016 at 08:54:18AM +0100, Martin Kaiser wrote:
> The HM and TM fields in the LCDC DMA Control Register are 7 bits wide.
> Use the correct mask to allow setting all possible bits.
>
> Signed-off-by: Martin Kaiser
> ---
>
> This bug was discovered on a board that
On Tue, Nov 22, 2016 at 08:54:18AM +0100, Martin Kaiser wrote:
> The HM and TM fields in the LCDC DMA Control Register are 7 bits wide.
> Use the correct mask to allow setting all possible bits.
>
> Signed-off-by: Martin Kaiser
> ---
>
> This bug was discovered on a board that uses
The HM and TM fields in the LCDC DMA Control Register are 7 bits wide.
Use the correct mask to allow setting all possible bits.
Signed-off-by: Martin Kaiser
---
This bug was discovered on a board that uses DMACR_TM(16). We ended up
with TM==0 in the register, the upper three
The HM and TM fields in the LCDC DMA Control Register are 7 bits wide.
Use the correct mask to allow setting all possible bits.
Signed-off-by: Martin Kaiser
---
This bug was discovered on a board that uses DMACR_TM(16). We ended up
with TM==0 in the register, the upper three bits were filtered
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