On Thu, Jun 29, 2017 at 01:08:28PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> Current SMCA implementations have the same banks on each CPU with the
> non-core banks only visible to a "master thread" on each Die. Practically,
> this means the smca_banks array,
On Thu, Jun 29, 2017 at 01:08:28PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> Current SMCA implementations have the same banks on each CPU with the
> non-core banks only visible to a "master thread" on each Die. Practically,
> this means the smca_banks array, which describes the
This patch works for me, thanks!
Jack
On Thu, Jun 29, 2017 at 1:08 PM, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> Current SMCA implementations have the same banks on each CPU with the
> non-core banks only visible to a "master thread" on each
This patch works for me, thanks!
Jack
On Thu, Jun 29, 2017 at 1:08 PM, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> Current SMCA implementations have the same banks on each CPU with the
> non-core banks only visible to a "master thread" on each Die. Practically,
> this means the smca_banks
From: Yazen Ghannam
Current SMCA implementations have the same banks on each CPU with the
non-core banks only visible to a "master thread" on each Die. Practically,
this means the smca_banks array, which describes the banks, only needs to
be populated once by a single
From: Yazen Ghannam
Current SMCA implementations have the same banks on each CPU with the
non-core banks only visible to a "master thread" on each Die. Practically,
this means the smca_banks array, which describes the banks, only needs to
be populated once by a single master thread.
CPU0 seemed
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