Re: [PATCH] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems

2017-11-27 Thread Borislav Petkov
On Mon, Nov 20, 2017 at 10:26:46AM -0600, Yazen Ghannam wrote: > From: Yazen Ghannam > > The McaIntrCfg register at MSRC000_0410, previously known as CU_DEFER_ERR, > is used on SMCA systems to set the LVT offset for the Threshold and > Deferred error interrupts. > > This

Re: [PATCH] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems

2017-11-27 Thread Borislav Petkov
On Mon, Nov 20, 2017 at 10:26:46AM -0600, Yazen Ghannam wrote: > From: Yazen Ghannam > > The McaIntrCfg register at MSRC000_0410, previously known as CU_DEFER_ERR, > is used on SMCA systems to set the LVT offset for the Threshold and > Deferred error interrupts. > > This register was used on

[PATCH] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems

2017-11-20 Thread Yazen Ghannam
From: Yazen Ghannam The McaIntrCfg register at MSRC000_0410, previously known as CU_DEFER_ERR, is used on SMCA systems to set the LVT offset for the Threshold and Deferred error interrupts. This register was used on non-SMCA systems to also set the Deferred interrupt type

[PATCH] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems

2017-11-20 Thread Yazen Ghannam
From: Yazen Ghannam The McaIntrCfg register at MSRC000_0410, previously known as CU_DEFER_ERR, is used on SMCA systems to set the LVT offset for the Threshold and Deferred error interrupts. This register was used on non-SMCA systems to also set the Deferred interrupt type in bits 2:1. However,